AT & T MELEC (I C) 2SE D M@@ 0050026 O00e7b1 7 mm SWITCHED-MODE PULSE-WIDTH MODULATOR LB1132AC T-53- 1-3) Description The LB1132AC Switched-Mode Pulse-Width Modulator (PWM) features a single-ended output which can either sink or source currents up to 200 mA. Consisting of eight functional blocks, the device is suitable for performing the basic pulse-width modulation function in switching power supplies. Functionally, the PWM includes a 1.25 V temperature-compensated reference capable of supplying up to 1 mA to external circuitry. It also features supervisory circuitry for current limiting, maximum duty-cycle limiting, shutdown and adaptive startup. An internal triangular wave-shape oscillator (providing equal rise and fall times) is controlled by external components. The output from the comparator is an ECL tree-contigured. signal feeding into the logic block. Additionally, the logic section provides noise immunity using an edge-triggered input which allows only one transition per clock cycle. The LB1132AC is characterized chiefly by high speed and a powerful FET driver. It is capable of operating at a clock frequency of 500 kHz, and can turn on or off a 1000 pF external gate FET in less than 50 ns. Offering superior thermal stability, the PWM incorporates a bandgap voltage reference with a temperature coefficient of less than 100 ppm/C. The PWM cannot operate directly from a 48 V battery, thus it generates a 9 V external supply using an infernal linear regulator to control an off-chip, discrete, high-voltage bipolar transistor. To control the amount of power delivered to a power supply load, the PWM adjusts the on-time of the primary transformer FET switch. On-time is regulated by comparing a feedback signal from the power supply output (load) with a slope-compensated pulse; the pulse is proportional to the primary transformer current. Also, the comparator limits the maximum duration of FET switch on-time, and keeps the FET switch off during startup conditions. The LB1132AC Switched-Mode Pulse-Width Modulator is available in a 16-pin plastic DIP. Features High clock frequency 500 kHz clock frequency (adjustable) Manual power-down override Powerful FET driver Prevents start-up damage Shutdown lead Noise immunity logic Double-pulse suppression Eliminates excessive on time Maximum duty cycle contro! Excellent thermal stability Vcc temperature coefficient, 200 ppm/C Low power consumption Quiescent current less than 7.0 mA Adaptive startup and shutdown control Single source/sink output: +200 mA = External oscillator synchronization Functional Diagram Pin Diagram LSENSE AMP- 0 u vec (1 16] comP- 18 CLK-FR (2 45 [7] MAXSET/MAX+ ese OA cLK-c []3 14.) AMP- cLK-AR (4 13] AMPOUT DA-ATN, GND (5 12] COMP+ DRIVER (16 11 FI SHUTON or-sup (]7 1o CI LSENSE pass-E C8 9] PASS-BAT & T MELEC (I C) 2eS5SE D @@ 00500cb c00e7be 0 Mm LB1132AC SWITCHED-MODE PULSE-WIDTH MODULATOR T- 58-II-3( Maximum Ratings ; Stresses exceeding the values listed under Maximum Ratings may cause permanent damage to the device. Thisis an < absolute stress rating only. Functional operation of the device at these or any other conditions in excess of those indicated in the operational sections of this data sheet is not implied. Exposure to maximum-rating conditions for extended periods of time may adversely affect device reliability. Rating Value Unit * Vv 550 mW Te 40 to +125 C Temperature Range 25 to +85 C * AQ V power supply is generated internally through a pass transistor (Vcc at pin 1). The requirements on the external pass transisitor collector emitter breakdown voltage (BVceo) range is the line voltage minus 9 V. The line voltage must be greater than 12 V. Pin Descriptions Pin Symbol Name/Function | 1 Veco Provides a regulated output voltage of 9.0 (+ 0.5) V. 2 CLK-FR Clock connection to an external amplitude-adjusting resistor, and an external 3 CLK-C frequency-adjusting resistor. The clock provides a iriangulat waveshape with a 4 CLK-AR frequency of 1/2 (RC), and an amplitude of 3 to 6 V. 5 DR-RTN, Return (common) for the high-current output stage of the driver circuit. Pin 5 GND should be connected to a low-ohmic ground because of its high noise content. 6 DRIVER The output of the driver is capable of sourcing or sinking in excess of 200 mA. The driver can turn on or turn off a 100 pF gate FET in less than 50 ns. 7 DR-SUP Provides the current surge needed (as high as 200 mA) to switch the FET. This pin must be tied to a capacitor to ground. . 8 PASS-B Connections to the base and emitter, respectively, of an external NPN transistor. 9 . PASS-E Pass-E terminal provides de power for the LB1132AC. 10 LSENSE Line sense monitors the line voltage to provide adaptive start-up. ; 11 SHUTDN Input pin intended for emergency shutdown of the FET driver and is TTL- compatible. A logic high shuts off the FET driver. ; . 12 COMP + Noninverting and inverting inputs, respectively, to a 3-input comparator. The 16 COMP comparator controls the duty cycle of the FET by comparing the operational signal to the clock signal. 14 AMP Inverting input and output, respectively, to the operational amplifer. Functionally, 13 AMPOUT the operational amplifier provides a dc signal for comparison with the clock. _ 15 MAXSET/ Limits the duty cycle of the FET driver and is connected to the positive lead of the MAX + operational amplifier. 6-42 a ee me a wr cee a a aa Rage TETAT & T MELEC (I C) 2SE D WH OOSO0e2b O00e7b3 2 ml SWITCHED-MODE PULSE-WIDTH MODULATOR LB1132AC | T-58-1/-3] Electrical Characteristics (Ta = 25 C unless otherwise specified) Minimum and maximum vatues are testing requirements. Typical values are characteristics of the device and are the result of engineering evaluations. Typical values are for information purposes only and are not part of the testing requirements. Characteristic and Conditions Symbol Min. Typ - Max Unit Quiescent de Operating Current loc 40 | 65 7.0 mA Veco with 3 KO. toad Voc 8.5 9.0 9.5 Vv Op-Amp Output Low Op-Ampot 1.2 15 | 20 V- Op-Amp Output High Op-Ampou 6.5 8.0 8.5 Vv Op-Amp ac Gain @ 10 kHz Op-Ampa 37 57 60 dB Op-Amp Offset Voltage Op-Ampv 6.0 14 +1.0 mV Clock-C Current Source with 12.5 k @ RFR lickKL SOURCE 80 400 120 pA Clock-C Current Sink with 12.5 k @ RFR IcLK SINK 80 _ 100 420 BA Source and Sink Current Ratio 96 | 1.0 1.04 = Voltage LSENSE High VLSENSE H 4.0 4.5 5.0 Vv rd Voltage LSENSE Low VLSENSE L 2.0 1.0 2.0 Vv Drive Supply Voltage Vos 10.0 10.7 11.0 Vv Driver Voltage High with 35 Load VosH | 7.0 8.8 a4 | Vv Driver Current Sink @ 2 V IDR SINK 200 235 500 mA Test Requirements (At 25. C unless otherwise specified) Characteristic Conditions Min Typ Max Unit dc Operating Current Figure 1; Measure loc 4.0 6.5 7.0 mA Reference Voltage (Vcco) Figure 2; Measure Pin 4 (Vcc) 8.5 9.0 9.5 Vv Figure 3; Measure Pin 13 (AMPOUT} Operational Amplifier, Output Voltage Swing (High) Pin 14 = 1.00 V (AMP 6.5 8.0 8.5 Vv Pin 15 = 1.25 V (MAXSET/MAX + Figure 3; Measure Pin 13 (AMPOUT) Operational Amplifier, Output Voltage Swing (Low) in 6 = i 00 v (MAXSET/ MAX + " " a Y Driver Supply Voltage Figure 4; Measure Pin 7 (DR-SUP) 10.0 ~ 10.7 11.0 Vv Figure 4; Measure Pin 6 (DRIVER) Driver Voltage (High) Pin 11 = 35 O, 2 W Resistor 7.0 8.8 9.4 Vv to GND. Driver Current, Sink Figure 4* / - 200 235 500 mA Clock-C, Source Current Figure 5; Pin 2 = +7.0 V (CLK-C) 80 100 4120 pA. Clock-C, Sink Current Figure 5; Pin 2 = +2.0 V (CLK-C) 80 100 120 BA Clock-C Ratio (Sink I/Source !)_ Figure 5 0.96 | 1.00 | 1.04 _ * Shutdown must be kept high during this test. 6-43AT & T MELEC (I C) ese D LB1132AC ME 00S002b o0027b4 4 me SWITCHED-MODE PULSE-WIDTH MODULATOR Electrical Requirements (At 25 C unless otherwise specified) The characteristics shown below are certified through production (ac with feedback loop) op-amp tests. T-58-11-3] > Characteristic Test Condition Min | Typ Max Unit Operational Amplifier, Open- . . = - Loop Voltage Gain vanes ar 100 mVrms 37 57 es | B @ 10 kHz Operational Amplifier, Figure 6; Vin = 0 _ _ + 1.0 Vv Input-Offset Vom = 1.25 V ~6.0 m Test Circuits Resistor values selected for use in all test circuits are characterized by.a nominal +1% tolerance; capacitors, +10%. 1.909 kQ F L 16 11 (7 10 amma 10 ka 3 9.0 V 14[7}+ 0.3 v C1 16 tl2 st p{ 13 4 13[) -(15 12[-}-e-X +1.0 V Figure 1. de Operating Current ay 10 MEASURE Ipc ka 1.0 pF 25 VA T & T MELEC (I C) 25E D m@ OOS00cb 0002765 b SWITCHED-MODE PULSE-WIDTH MODULATOR LB1132AC T-58-II-3| Test Circuits (Continued) [4 33 ka MEASURE a 1 161) | C2 1s] 1k 6.0 V > 13 14 C4 1317 aH 12 ry re 6 1" 25 V C7 tof }-~< 70 v [ 8 ) 3 10 ka 1.0 pF 4 Figure 2. Reference Voltage : ch 16 C2 15 pane 3 44} C4 13 (>}+_~ MEASURE 5 5 1210 1.909 ko 5 WH <25V cl? 0 10 kn 3 [4 8 9(}___"4 $10 kQ 1.0 pF P44 Figure 3. Op Amp Output Voltage SwingAT & T MELEC (TI C) 2SE D MM 0050026 O00e7bb & Ml LB1132AC SWITCHED-MODE PULSE-WIDTH MODULATOR T-58-//-3| Test Circuits (Continued) qi 16 3.0V poet 2 18[}-4.5 v 5.0 V >_-_{]3 160 12.7 kot | sh 1.909 ka a4 TTL 6 "1 Hs row eC 25 V MEASURE a 7 tof}}~<e0v g10K0 J MEASURE > rs he 3 10 kn T 1.0 pF Figure 4A. Driver Output Test Note: Shutdown must be kept high during driver current (sink) test. CLK 5.0 Vf 0 1 1 25V _ sD TTL ON SHUTDN 1 1 0 Figure 4B. Driver ON Sequence 1 16 SOURCE q HL => =_ 2 15 SINK 1k2 1, 6.0 V >w 113 14 13 5 12 " v 6 n 25V 12.7 ka 3 -7 tof }<25V 310 kn 1.909 k2 8 94+ 5 10 kt =z 1.0 pF Figure 5. Clock-C TestAT & T MELEC (I C) 25E D M@ OOS002b o00c7L7 T SWITCHED-MODE PULSE-WIDTH MODULATOR . : LB1132AC } T-58-11-3l Test Circuits (Continued) vCM 1.25 V L ci 16) 3 100 9 24 ko {|2 15 [+ 400 9 AC VIN , C3 14 3 100 ka 12.7 kQ k Cha 3 100 ko , to 5 21D 2 Ke } ASURI 1.909 ka nh 10 ka 400 9 ME E MEASURE 10/-}+_-5 V 8 9 | 25V 3 10 ko __| 310 ka T. pF Figure 6. Open Loop Voltage Gain @ 10 kHz Characteristic Curve VcLOcK VMAX Vain T = t Figure 7. Voltage vs. Time Crr, Rea and Rar accurately set the clock frequency as well as the maximum and minimum voltages. Vmax is set to 6 V for normal operation. _ VBG ReR = Vmax RAR Cra = VMIN = VMAX Al - Rar IRAR 2 VBG 2 Rer 2 Typical Values: Iran = 100 nA, VBG ~ 1.25 V 6-47 hee tn ont creer Saree cee eg ge en nie. weeAT & T MELEC (TI C) 2SE D M@ O00500cb 0002744 1 LB1132AC SWITCHED-MODE PULSE-WIDTH MODULATOR T-58-1]-3| Application Rt La R2 * | Vcc. R2 AR 2 15 et _j A1+R2 c Lop 3 1417] Vour Vour |FILTER Tan] * oa dl a yo 8 LOGIC SHUTDOWN |} 1 6 11 + | Vec R3 R3+R4 R4 qirer l} C7 10 Vec Ct R3 WY a . . RS --O INPUT VOLTAGE m7 | } . POWER Figure 8. LB1132AC Switched-Mode PWM Application Diagram 6-48AT & T MELEC (I C) 25E D MM O0S00cbh 0002749 3 SWITCHED-MODE PULSE-WIDTH MODULATOR LB1132AC T-53-})-3\ Outline Drawing (Dimensions in inches) Too ooo 315 MAX "Ch db db ob Cb od bd db Cd 8 LEAD NO, 1 810 MAX ALTERNATE INDEX MARKS SEATING PLANE -400 MAX [ \ 4 215 : MAX i { AAR ARAC | | 160 iH MAX | et { ' al 013 | Li 4 090 015 009 |..280 _-| 110 4 Ordering Information Device Comcode LB1132AC 104413802 6-49