BTM7741G
TrilithIC
Data Sheet, Rev. 1.0, May 2007
Automotive Power
Data Sheet 2 Rev. 1.0, 2007-05-21
BTM7741G
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3 Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.4 Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.5 Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.6 Open Load Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.7 Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.3 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table of Contents
PG-DSO-28-22
Type Package Marking
BTM7741G PG-DSO-28-22 BTM7741G
Data Sheet 3 Rev. 1.0, 2007-05-21
TrilithIC
BTM7741G
1Overview
Features
Quad D-MOS switch driver
Free configurable as bridge or quad-switch
Optimized for DC motor management applications
•Low
RDS ON
High side: 110 mtyp. @ 25°C, 270 mmax. @ 150°C
Low side: 100 mtyp. @ 25°C, 230 mmax. @ 150°C
Maximum peak current: typ. 10 A @ 25 °C
Very low quiescent current: typ. 5 µA @ 25 °C
Small outline, enhanced power PG-DSO-package
Operates up to 40 V
PWM frequencies up to 1 kHz
Status flag diagnosis
Short-circuit-protection
Overtemperature shut down with hysteresis
Internal clamp diodes
Open load detection in Off-mode
Under-voltage detection with hysteresis
Green Product (RoHS compliant)
AEC Qualified
Description
The BTM7741G is part of the TrilithIC family containing three dies in one package: One double high-side switch
and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated lead frames.
The sources are connected to individual pins, so the BTM7741G can be used in H-bridge- as well as in any other
configuration. Both the double high-side and the two low-side switches of the BTM7741G are manufactured in
SMART SIPMOS® technology which combines low RDS ON vertical DMOS power stages with CMOS circuitry for
control, protection and diagnosis.
BTM7741G
Data Sheet 4 Rev. 1.0, 2007-05-21
2 Pin Configuration
2.1 Pin Assignment
Figure 1 Pin Assignment BTM7741G (Top View)
28 DL1
25 DL1
27 SL1
26 SL1
24 DHVS
23 SH1
22 SH1
21 SH2
20 SH2
19 DHVS
18 DL2
15 DL2
16 SL2
17 SL2
1DL1
5DHVS
4N.C.
3DL1
2IL1
6GND
7IH1
8ST
9IH2
10DHVS
11
DL2
14
N.C.
13
DL2
12
IL2
HS-Leadframe
LS-Leadframe
LS-Leadframe
Data Sheet 5 Rev. 1.0, 2007-05-21
BTM7741G
Pins written in bold type need power wiring.
Table 1 Pin Definitions and Functions
Pin No. Symbol Function
1, 3, 25, 28 DL1 Drain of low-side switch1, lead frame 1 1)
1) To reduce the thermal resistance these pins are direct connected via metal bridges to the lead frame.
2 IL1 Analog input of low-side switch1
4 N.C. not connected
5, 10, 19, 24 DHVS Drain of high-side switches and power supply voltage, lead frame 2 1)
6 GND Ground
7 IH1 Digital input of high-side switch1
8 ST Status of high-side switches; open Drain output
9 IH2 Digital input of high-side switch2
11 N.C. not connected
12, 14, 15, 18 DL2 Drain of low-side switch2, lead frame 3 1)
13 IL2 Analog input of low-side switch2
16,17 SL2 Source of low-side switch2
20,21 SH2 Source of high-side switch2
22,23 SH1 Source of high-side switch1
26,27 SL1 Source of low-side switch1
BTM7741G
Data Sheet 6 Rev. 1.0, 2007-05-21
2.2 Terms
Figure 2 Terms BTM7741G
Table 2
HS-Source-Current Named during Short Circuit Named during Leakage-Cond.
ISH1,2 ISCP H IDL LK
SH2
DHVS
ST
IL1
GND
IH1
SL2
5,10,19,24
9
7
20,21
16,17
6
13
2
R
O1
R
O2
Biasing and Protection
22,23
1,3,25,28
8
IH2
IL2
26,27
12,14,15,18
SL1
DL2
SH1
DL1
I
GND
I
LKCL
V
S
=12V
C
L
100µF
C
S
470nF
I
FH1,2
I
S
I
SH2
I
DL2
I
SH1
I
DL1
I
DL LK 2
I
DL LK 1
V
DSL1
-V
FL1
V
DSL2
-V
FL2
-V
FH2
V
DSH2
-V
FH1
V
DSH1
V
UVON
V
UVOFF
I
SL2
I
SL1
I
SCP L 1
I
SCP L 2
V
IL2
V
IL th 2
V
IL1
V
IL th 1
V
ST
V
STL
V
STZ
V
IH1
V
IH2
Gate
Driver
Gate
Driver
Diagnosis
I
ST
I
ST LK
I
IH1
I
IH1
I
IL1
I
IL2
Protection
Gate
Driver
Protection
Gate
Driver
Data Sheet 7 Rev. 1.0, 2007-05-21
BTM7741G
3 Block Diagram
Figure 3 Block Diagram BTM7741G
SH2
DHVS
ST
SL2
5,10,19,24
9
7
20,21
16,17
6
13
2
RO1 RO2
Biasing and Protection
22,23
1,3,25,28
8
26,27
12,14,15,18
SL1
DL2
SH1
DL1
Gate
Driver
Gate
Driver
Diagnosis
Protection
Gate
Driver
Protection
Gate
Driver
IL1
GND
IH1
IH2
IL2
BTM7741G
Data Sheet 8 Rev. 1.0, 2007-05-21
4 Circuit Description
4.1 Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are
driven by these stages and convert the logic signal into the necessary form for driving the power output stages.
The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the internal gate-driving
units of the N-channel vertical power-MOS-FETs.
4.2 Output Stages
The output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body
diodes can be used for freewheeling when communicating inductive loads. If the high-side switches are used as
single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
4.3 Short Circuit Protection
The outputs are protected against
output short circuit to ground
output short circuit to the supply voltage, and
overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-Drop with an internal
reference voltage. Above this trip point the OP-Amp reduces the output current depending on the junction
temperature and the drop voltage.
4.4 Overtemperature Protection
The high-side and the low-side switches also incorporate an over temperature protection circuit with hysteresis
which switches off the output transistors. In the case of the high-side switches, the status output is set to low.
4.5 Undervoltage Lockout
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The High-Side output
transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF.
4.6 Open Load Detection
The open load detection of the BTM7741G works in OFF condition and is based on a voltage measurement at the
source of the high side switch. In order to use the open load detection SH2 has to be connected to Vcc via a pull
up resistor. Because this pull up resistor would connect the bridge output to the µC supply it needs to be
disconnected whenever the high side switch is on. This can be done by a transistor as shown in the application
example (Figure 4 “Application Example BTM7741G” on Page 15). To check for open load:
Set IH1 = IH2 = LOW (both high side switches off)
Set IL2 = LOW, IL1 = HIGH (only low side switch 1 is on)
Connect Rol (open load pull up) to 5V via transistor
If the load is connected properly it will pull down the voltage at SH2 to a value close to 0V.
If the load is disconnected the resistor will pull the voltage at SH2 to value close to Vcc.
If the voltage at SH2 is higher than the open load detection voltage VOUT(OL) then ST will be pulled down.
Data Sheet 9 Rev. 1.0, 2007-05-21
BTM7741G
4.7 Status Flag
The status flag output is an open drain output with zener-diode which requires a pull-up resistor, as shown in the
application circuit in Figure 4 “Application Example BTM7741G” on Page 15. Various errors as listed in the
table “Diagnosis” are reported by switching the open drain output ST to low.
Table 3 Truth table and Diagnosis (valid only for the High-Side-Switches)
Flag IH1 IH2 SH1 SH2 ST Remarks
Inputs Outputs
Normal operation;
identical with functional truth table
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
H
1
1
1
1
stand-by mode
switch2 active
switch1 active
both switches
active
Open load at high-side switch 1
Open load at high-side switch 2
0
1
X
X
X
X
0
1
Z
H
X
X
X
X
Z
H
0
1
0
1
detected
detected
Overtemperature high-side switch1 0
1
X
X
L
L
X
X
1
0 detected
Overtemperature high-side switch2 X
X
0
1
X
X
L
L
1
0 detected
Overtemperature both high-side switches 0
X
1
0
1
X
L
L
L
L
L
L
1
0
0
detected
detected
Under voltage X X L L 1 not detected
Inputs: Outputs: Status:
0 = Logic LOW Z = Output in tristate condition 1 = No error
1 = Logic HIGH L = Output in sink condition 0 = Error
X = don’t care H = Output in source condition
X = Voltage level undefined
BTM7741G
Data Sheet 10 Rev. 1.0, 2007-05-21
5 Electrical Characteristics
5.1 Absolute Maximum Ratings
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Absolute Maximum Ratings1)
– 40 °C < Tj < 150 °C
1) Not subject to production test; specified by design
Pos. Parameter Symbol Limit Values Unit Remarks
min. max.
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)
5.1.1 Supply voltage VS– 0.3 42 V
5.1.2 Supply voltage for full short circuit
protection
VS(SCP) –28V
5.1.3 HS-drain current2)
2) Single pulse
IS– 7 3)
3) Internally limited
ATA = 25°C; tP < 100 ms
5.1.4 HS-input current IIH – 5 5 mA Pin IH1 and IH2
5.1.5 HS-input voltage VIH – 10 16 V Pin IH1 and IH2
Status Output ST
5.1.6 Status pull up voltage VST – 0.3 5.4 V
5.1.7 Status Output current IST – 5 5 mA Pin ST
5.1.8 Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
5.1.9 Drain-Source-Clamp voltage VDSL 42 V VIL =0V; ID1mA
5.1.10 Supply voltage for short circuit protection VDSL(SCP) –30VVIL =5V
5.1.11 20 V VIL =10V
5.1.12 LS-drain current2) IDL – 7 3) ATA = 25°C; tP < 100 ms
5.1.13 LS-input voltage VIL – 0.3 10 V
Temperatures
5.1.14 Junction temperature Tj– 40 150 °C–
5.1.15 Storage temperature Tstg – 55 150 °C–
ESD Protection4)
4) ESD susceptibility HBM according to EIA/JESD22-A114-B (1.5k, 100pF)
5.1.16 Input LS-Switch VESD –2kV
5.1.17 Input HS-Switch VESD –1kV
5.1.18 Status HS-Switch VESD –2kV
5.1.19 Output LS and HS-Switch VESD 8 kV all other pins connected
to Ground
Data Sheet 11 Rev. 1.0, 2007-05-21
BTM7741G
5.2 Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table
5.3 Thermal Resistance
Pos. Parameter Symbol Limit Values Unit Remarks
min. max.
5.2.20 Supply voltage VSVUVOFF 42 V After VS rising above
VUVON
5.2.21 Input voltage HS VIH – 0.3 15 V
5.2.22 Input voltage LS VIL – 0.3 10 V
5.2.23 Status output current IST 02mA
5.2.24 Junction temperature Tj– 40 150 °C–
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
5.3.25 LS-junction to soldering point1)
1) Not subject to production test, specified by design.
RthJSP 20 K/W measured to pin 3 or 12
5.3.26 HS-junction to soldering point1) RthJSP 20 K/W measured to pin 19
5.3.27 Junction to Ambient1)
RthJA = Tj(HS) / (P(HS)+ P(LS))
RthJA –36 K/W
2)
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
BTM7741G
Data Sheet 12 Rev. 1.0, 2007-05-21
5.4 Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V
unless otherwise specified
Pos. Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Current Consumption HS-switch
5.4.28 Quiescent current IS–59µA IH1 = IH2 = 0 V
Tj = 25 °C
––13µA IH1 = IH2 = 0 V
5.4.29 Supply current;
one HS-switch active
IS 1.6 3.2 mA IH1 or IH2 = 5 V
VS = 12 V
5.4.30 Supply current;
both HS-switches active
IS 3.2 6.4 mA IH1 and IH2 = 5 V
VS = 12 V
5.4.31 Leakage current of
high-side switch
ISH LK ––6µAVIH = VSH = 0 V
VS = 12 V
5.4.32 Leakage current through logic GND
in free wheeling condition
ILKCL = IFH +
ISH
––10mAIFH = 3 A
VS = 12 V
Current Consumption LS-switch
5.4.33 Input current IIL –830µAVIL = 5 V;
normal operation
160 300 µAVIL = 5 V;
failure mode
5.4.34 Leakage current of low-side switch IDL LK –210µAVIL = 0 V
VDSL = 18 V
Under Voltage Lockout HS-switch
5.4.35 Switch-ON voltage VUVON ––4.8VVS increasing
5.4.36 Switch-OFF voltage VUVOFF 1.8– 3.5VVS decreasing
5.4.37 Switch ON/OFF hysteresis VUVHY –1–VVUVONVUVOFF
Output stages
5.4.38 Inverse diode of high-side switch;
Forward-voltage
VFH –0.81.2VIFH = 3 A
5.4.39 Inverse diode of low-side switch;
Forward-voltage
VFL –0.81.2VIFL = 3 A
5.4.40 Static drain-source on-resistance of
high-side switch
RDS ON H 110 mISH =1A; VS = 12 V
Tj = 25 °C
200 270 mISH =1A; VS = 12 V
Tj = 150 °C
5.4.41 Static drain-source
on-resistance of low-side switch
RDS ON L 100 mISL =1A; VIL = 5 V
Tj = 25 °C
160 230 mISL =1A; VIL = 5 V
Tj = 150 °C
Data Sheet 13 Rev. 1.0, 2007-05-21
BTM7741G
Short Circuit of high-side switch to GND
5.4.42 Initial peak SC current
tdel = 360 µs; VS = 12 V; VDSH = 12V
ISCP H 9 1114ATj = – 40 °C
–10–A
Tj = + 25 °C
6810A
Tj = + 150 °C
Short Circuit of high-side switch to VS
5.4.43 Output pull-down-resistor RO12 22 50 kVDSL = 3 V
Short Circuit of low-side switch to VS
5.4.44 Initial peak SC current
VDSL =12V; VIL =5V;
tdel = 250 µs
ISCP L 14 17 22 A Tj = – 40 °C
–15–A
Tj = 25 °C
8.51015A
Tj = 150 °C
Thermal Shutdown1)
5.4.45 Thermal shutdown junction
temperature
Tj SD 155 180 190 °C–
5.4.46 Thermal switch-on junction
temperature
Tj SO 150 170 180 °C–
5.4.47 Temperature hysteresis
∆Τ
–10°C
∆Τ
= TjSD TjSO
Status Flag Output ST of high-side switch
5.4.48 Low output voltage VST L –0.20.6VIST = 1.6 mA
5.4.49 Leakage current IST LK ––10µAVST = 5 V
5.4.50 Zener-limit-voltage VST Z 5.4 V IST = 1.6 mA
Open load detection in Off condition
5.4.51 Open load detection voltage VOUT(OL) 1.8 2.8 4 V
5.4.52 Status change after neg. input slope
with OL
td(OL) ––500µsVS = 12 V
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V
unless otherwise specified
Pos. Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
BTM7741G
Data Sheet 14 Rev. 1.0, 2007-05-21
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical
characteristics specified mean values expected over the production spread. If not otherwise specified,
typical characteristics apply at TA = 25 °C and the given supply voltage.
Switching times of high-side switch1)
5.4.53 Turn-ON-time to 90% VSH tON –85180µsR
Load = 12
VS = 12 V
5.4.54 Turn-OFF-time to 10% VSH tOFF –80180µs
5.4.55 Slew rate on 10 to 30% VSH dV/dtON ––1.2V/µs
5.4.56 Slew rate off 70 to 40% VSH -dV/dtOFF ––1.6V/µs
Switching times of low-side switch1)
5.4.57 Turn-ON-time to 10% VDL tON –60150µsR
Load = 10
VS = 12 V
VIL = 0 to 5 V
5.4.58 Turn-OFF-time to 90% VDL tOFF –60150µs
5.4.59 Slew rate on 70 to 50% VDL -dV/dtON –11.5V/µsR
Load = 4.7
VS = 12 V
VIL = 0 to 5 V
5.4.60 Slew rate off 50 to 70% VDL dV/dtOFF –11.5V/µs
Control Inputs of high-side switches IH 1, 2
5.4.61 H-input voltage VIH High ––2.5V
5.4.62 L-input voltage VIH Low 1––V
5.4.63 Input voltage hysteresis VIH HY –0.3–V
5.4.64 H-input current IIH High 15 30 60 µAVIH = 5 V
5.4.65 L-input current IIH Low 5–20µAVIH = 0.4 V
5.4.66 Input series resistance RI2.74 5.5k
5.4.67 Zener limit voltage VIH Z 5.4 V IIH = 1.6 mA
Control Inputs IL1, 2
5.4.68 Gate-threshold-voltage VIL th 0.91.72.2VIDL = 2 mA
1) Not subject to production test; specified by design
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V
unless otherwise specified
Pos. Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Data Sheet 15 Rev. 1.0, 2007-05-21
BTM7741G
6 Application Information
Note: The following simplified application examples are given as a hint for the implementation of the device only
and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the
device. The function of the described circuits must be verified in the real application
Figure 4 Application Example BTM7741G
SH2
DHVS
ST
IL1
GND
IH1
SL2
5,10,19,24
9
7
20,21
16,17
6
13
2
TLE
4278G
V
S
=12V
D01
Z39
C
S
10µF
C
D
47nF
D
I
Q
Reset
Watchdog
C
Q
22µF
V
CC
WD R
GND
µP
Protection
Gate
Driver
Protection
Gate
Driver
R
O1
R
O2
Biasing and Protection
M
22,23
1,3,25,28
8
IH2
IL2
26,27
12,14,15,18
SL1
DL2
SH1
DL1
R
Q
100 k
R
S
10 k
Gate
Driver
Gate
Driver
Diagnosis
In case of V
DSL
<-0.6V or reverse battery the current into the µC might be limited by external resitors to protect the µC
optional for
open load
in off
R
OL
10 k
to µC
BCR192W
XC866
BTM7741G
Data Sheet 16 Rev. 1.0, 2007-05-21
7 Package Outlines
Figure 5 PG-DSO-28-22 (Plastic Transistor Single Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
114
1528
18.1-0.4
Index Marking
1)
2.45
-0.1
7.6
10.3 ±0.3
-0.2
0.2
2.65 max
-0.2
1.27
0.23 +0.09
0.1
0.4
0.35 x 45˚
+0.8
+0.15
0.35 2)
8˚ max
0.2 28x
1)
2) Does not include dambar protrusion of 0.05 max per side
1) Does not include plastic or metal protrusions of 0.15 max rer side
GPS05123
Dimensions in mm
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet 17 Rev. 1.0, 2007-05-21
BTM7741G
8 Revision History
Rev. Date Changes
1.0 2007-05-21 Initial Version
Edition 2007-05-21
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
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and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
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