Product Data Sheet Industrial SD / SDHC / SDXC Memory Card S-46 Series UHS-I Interface, pSLC PRELIMINARY Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 1 of 19 S-46 Series (pSLC) Industrial SD/SDHC/SDXC Memory Card-2/4/8/16/32/64GByte Main Features Fully compliant with SD Memory Card specification 3.0 o SD / SDHC / SDXC high speed mode, UHS-I o Speed class 10 and U1 according SD3.0 specification o SD2.0 backward compliant o FAT16 / FAT32 / exFAT preformatted High performance 3.0 specification o SD burst up to 104MB/s o SD Normal speed 0...25MHz clock rate o SD High speed 25...50MHz clock rate o SD UHS-I speed 0...50MHz (DDR) and 0...208MHz (SDR) o Up to 50MByte/sec sequential data rate o durabit firmware optimized for random write performance, up to 1400 write IOPs (4kB) Power Supply: (Low-power CMOS technology) o 2.7...3.6V normal operating voltage Standard SD Memory card form factor o 32.0mm x 24.0mm x 2.1mm and Write Protect slider Optimized FW algorithms especially for high read access and long data retention applications o Patented power-off reliability technology o Wear Leveling technology Equal wear leveling of static and dynamic data. The wear leveling assures that dynamic data as well as static data is balanced evenly across the memory. With that the maximum write endurance of the device is guaranteed o Write Endurance technology Due to intelligent wear leveling an even use of the entire flash is guaranteed, regardless how much "static" (OS) data is stored. o Read Disturb Management The read commands are monitored and the content is refreshed when critical levels have occurred o Data Care Management The interruptible background process maintain the user data for Read Disturb effects or Retention degradation due to high temperature effects o Near miss ECC technology Minimize the risk of uncorrectable bit failure over the product life time. Each read command analyzes the ECC margin level and refresh data if necessary o Diagnostic features with Life Time Monitoring tool support High reliability o Designed for industrial market especially read intensive application like navigation, infotainment, POS/POI, Medical and general boot medium use case: o The product is optimized for long life cycle that requires a good data retention because of high temperature mission profile. o S-46 cards with pseudo SLC (pSLC) feature higher write performance and endurance than MLC based cards (S-45) and have a cost advantage over SLC based cards (S-450) o Number of card insertions/removals up to 20,000 o Extended and Industrial Temperature range -25 up to 85C and -40 up to 85C, respectively o SIP (System In Package) process for extreme dust, water and ESD proof Controlled BOM & PCN process Customized options like CID registers, CPRM keys, firmware incl. settings and marking by projects Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 2 of 19 1 Order Information 1.1 Standard product list Table 1: Standard Product List Density 2GB 4GB 8GB 16GB 32GB 64GB Part Number SFSD2048LgBM1TO-t-xx-2fP-STD SFSD4096LgBM1TO-t-xx-2fP-STD SFSD8192LgBM1TO-t-xx-2fP-STD SFSD016GLgBM1TO-t-xx-2fP-STD SFSD032GLgBM1TO-t-xx-2fP-STD SFSD064GLgBM1TO-t-xx-2fP-STD Temp. Range Flash Technology t = E -25C to 85C t = I -40C to 85C pSLC NAND Flash 15nm g = 2, 3 generation; xx flash configuration, depending on generation, f = B, C, ...firmware 1.2 Current product generation Table 2: Standard Product List Density 2GB 4GB 8GB 16GB 32GB 64GB 2GB 4GB 8GB 16GB 32GB 64GB Part Number SFSD2048L3BM1TO-E-GE-2CP-STD SFSD4096L3BM1TO-E-GE-2CP-STD SFSD8192L3BM1TO-E-GE-2CP-STD SFSD016GL3BM1TO-E-LF-2CP-STD SFSD032GL3BM1TO-E-HG-2CP-STD SFSD064GL3BM1TO-E-OG-2CP-STD SFSD2048L3BM1TO-I-GE-2CP-STD SFSD4096L3BM1TO-I-GE-2CP-STD SFSD8192L3BM1TO-I-GE-2CP-STD SFSD016GL3BM1TO-I-LF-2CP-STD SFSD032GL3BM1TO-I-HG-2CP-STD SFSD064GL3BM1TO-I-OG-2CP-STD Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Temp. Range Flash Technology -25C to 85C pSLC NAND Flash 15nm -40C to 85C Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 3 of 19 Contents MAIN FEATURES ............................................................................................................................................................................. 2 1 ORDER INFORMATION .................................................................................................................................................................. 3 1.1 STANDARD PRODUCT LIST........................................................................................................................................................... 3 1.2 CURRENT PRODUCT GENERATION................................................................................................................................................. 3 2 PRODUCT SPECIFICATION ............................................................................................................................................................. 5 2.1 SYSTEM PERFORMANCE ............................................................................................................................................................ 5 2.2 ENVIRONMENTAL SPECIFICATIONS ............................................................................................................................................... 6 2.3 RECOMMENDED OPERATING CONDITIONS ..................................................................................................................................... 6 2.3.1 Recommended Storage Conditions .................................................................................................................... 6 2.3.2 Humidity & EMC ................................................................................................................................................... 6 2.3.3 Environmental Conditions .................................................................................................................................. 6 2.4 PHYSICAL DIMENSIONS............................................................................................................................................................ 6 2.5 RELIABILITY .......................................................................................................................................................................... 6 3 CAPACITY SPECIFICATION ............................................................................................................................................................. 7 4 CARD PHYSICAL ........................................................................................................................................................................... 7 4.1 PHYSICAL DESCRIPTION ............................................................................................................................................................ 7 5 ELECTRICAL INTERFACE ................................................................................................................................................................ 8 5.1 ELECTRICAL DESCRIPTION .......................................................................................................................................................... 8 5.2 POWER UP / POWER DOWN BEAVIOUR AND RESET ......................................................................................................................... 9 5.2.1 Power up ............................................................................................................................................................... 9 5.2.2 Power down ......................................................................................................................................................... 9 5.2.3 Power drop ........................................................................................................................................................... 9 5.2.4 Operation below minimum voltage ................................................................................................................. 9 5.3 DC CHARACTERISTICS............................................................................................................................................................... 9 5.4 SIGNAL LOADING ..................................................................................................................................................................10 5.5 AC CHARACTERISTICS..............................................................................................................................................................10 5.5.1 Default Speed mode (0 - 25MHz) .....................................................................................................................10 5.5.2 High Speed mode (0 - 50MHz) ........................................................................................................................10 5.5.3 UHS modes ..........................................................................................................................................................10 6 HOST ACCESS SPECIFICATION ......................................................................................................................................................11 6.1 SD AND SPI BUS MODES .......................................................................................................................................................11 6.1.1 SD Bus Mode Protocol .........................................................................................................................................11 6.1.2 SPI Bus Mode Protocol ........................................................................................................................................11 6.1.3 Mode Selection ....................................................................................................................................................11 6.2 CARD REGISTERS...................................................................................................................................................................12 7 PART NUMBER DECODER ............................................................................................................................................................16 8 SWISSBIT LABEL SPECIFICATION.................................................................................................................................................18 8.1 FRONT SIDE LABEL .................................................................................................................................................................18 8.2 BACK SIDE MARKING .............................................................................................................................................................18 9 REVISION HISTORY .....................................................................................................................................................................19 Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 4 of 19 2 Product Specification The SD Memory Card is a small form factor non-volatile memory card which provides high capacity data storage. Its aim is to capture, retain and transport data, audio and images, facilitating the transfer of all types of digital information between a large variety of digital systems. The card operates in two basic modes: SDHC/SDXC and UHS-I card modes SPI mode The SD Memory Card also supports SD Default and High Speed mode with up to 50MHz clock frequency as well as UHS-I modes DDR50, SDR12/25/50/104 with up to 208MHz clock frequency. SD Memory card Specification Part 1, Physical layer Specification V3.01 SD Memory card Specification Part 2, File System Specification V3.00 SD Memory card Specification Part 3, Security Specification V3.00 SD Memory Card Addendum V4.00 Simplified specifications are available at https://www.sdcard.org/downloads/pls/simplified_specs/ The Card has an internal intelligent controller which manages interface protocols, data storage and retrieval as well as hardware BCH Error Correction Code (ECC), defect handling, diagnostics and clock control. The advanced wear leveling mechanism assures an equal usage of the Flash memory cells to extend the life time. The hardware BCH-code ECC allows to detect and correct up to 40 defect bits per 1kByte. The controller performs control read operations and checks the consistence of the data. If an error of some bits is detected, the card refreshes all data in the flash cells to prevent data retention problems. The card has a power-loss management feature to prevent data corruption after power-down. The cards are RoHS compliant and lead-free. 2.1 System Performance Table 3: Performance (1)(2) (1)(3) typ max System Performance Burst Data transfer Rate (max SD clock 208MHz) 104 (4) 2GB Sustained Sequential Read 46 50 Sustained Sequential Write 40 45 Sustained Random Read 4k 4.4 5.5 Sustained Random Write 4k 4.6 5.5 4 to 64GB Sustained Sequential Read 46 50 Sustained Sequential Write 49 55 Sustained Random Read 4k 3.9 5.0 Sustained Random Write 4k 4.8 5.7 1. All values refer to Toshiba Flash 16/32/64Gb 2. Sustained Speed measured with USB-SD Memory Card reader with crystal disk test tool. Unit MB/s MB/s MB/s MB/s MB/s It depends on burst speed, flash number, previous operations, and file size. 3. Target values 4. Swissbit SDSC cards (up to 2GB) also supports UHS speed modes Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 5 of 19 2.2 Environmental Specifications 2.3 Recommended Operating Conditions Table 4: SD Memory Card Recommended Operating Conditions Parameter min typ max unit Extended Operating Temperature Industrial Operating Temperature -25 -40 25 25 85*) 85*) C C 2.3.1 Recommended Storage Conditions Table 5: SD Memory Card Recommended Storage Conditions Parameter min typ max unit Extended Storage Temperature -25 25 100*) C Industrial Operating Temperature -40 25 100*) C *) high temperature storage without operation reduces the data retention, in operation the data will be refreshed, if data error issues were detected 2.3.2 Humidity & EMC Table 6: Humidity & EMC Parameter Humidity (non-condensing) ESD Condition 85% RH @85C 1000h up to 4 kV (contact discharge), according to IEC61000-4-2 and SDA, Human Body Model 150pF/ 330Ohm, on each contact pad, non-operating up to 15 kV, (air discharge), according to IEC61000-4-2 and SDA, Human Body Model 150pF/ 330Ohm, isolated contact pad area, non-operating 2.3.3 Environmental Conditions Table 7: Environmental Conditions Parameter UV light exposure X-Ray Durability Drop Test Bending / Torque Mechanical Shock Vibration Condition UV: 254nm, 15Ws/cm2 according to ISO7816-1 0.1 Gy 70keV to 140keV (ISO7816-1) according SDA 20,000 mating cycles 1.5m free fall 10N / 0.15Nm 2.5 max 1500G, 0.5ms, half sine wave xyz-axis, 4 pulses each non-operating, JESD22B110/B104 Condition B 50G, p-p, 20..2000Hz, sweep xyz-axis, 4 pulses each, non-operating, MIL-STD-883 M2007.3 Condition B 2.4 Physical Dimensions Table 8: Physical Dimensions Outer Physical Dimensions Length Width Thickness Weight (typ.) Value 32.000.1 24.000.1 2.100.15 2 Unit mm g 2.5 Reliability Table 9: Reliability Parameter Value Data Retention at beginning @ 40C 10 years *) Data Retention at life end (20k PE cycles) @ 40C 1 year *) *) After every power on the card reads the whole flash and performs a data refresh if necessary. So the data retention can be much longer in most use cases. Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 6 of 19 3 Capacity specification Table 10: SD Memory Card capacity specification Capacity Sectors 2GB 3,938,304 4GB 7,774,208 8GB 15,802,368 16GB 31,834,112 32GB 62,333,952 64GB 124,735,488 Total addressable capacity (Byte) 2,016,411,648 3,980,394,496 8,090,812,416 16,299,065,344 31,914,983,424 63,864,569,856 4 Card physical 4.1 Physical description The SD Memory Card contains a single chip controller and Flash memory module(s). The controller interfaces with a host system allowing data to be written to and read from the Flash memory module(s). Figure 1 shows card dimensions. Figure 1: Simplified mechanical dimensions SD card Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 7 of 19 5 Electrical interface 5.1 Electrical description Figure 2: SD Memory Card Shape and Interface (Top View) Table 11: SD Memory Card Pad Assignment Pin # SD Mode SPI Mode Name Type1 Description Name Type1 Description 1 CD/DAT32 I/O/PP3 Card Detect/ Data Line [Bit 3] CS I3 Chip Select (neg true) 2 CMD PP Command/Response DI I Data In 3 VSS1 S Supply voltage ground VSS S Supply voltage ground 4 VDD S Supply voltage VDD S Supply voltage 5 CLK I Clock SCLK I Clock 6 VSS2 S Supply voltage ground VSS2 S Supply voltage ground 7 DAT0 I/O/PP Data Line [Bit 0] DO O/PP Data Out 8 DAT14 I/O/PP Data Line [Bit 1] RSV 9 DAT25 I/O/PP Data Line [Bit 2] RSV Notes: 1) S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers; 2) The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. 3) At power up this line has a 50kOhm pull up enabled in the card. This resistor serves two functions Card detection and Mode Selection. For Mode Selection, the host can drive the line high or let it be pulled high to select SD mode. If the host wants to select SPI mode it should drive the line low. For Card detection, the host detects that the line is pulled high. This pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command 4) DAT1 line may be used as Interrupt Output (from the Card) in SDIO mode during all the times that it is not in use for data transfer operations (refer to "SDIO Card Specification" for further details). 5) DAT2 line may be used as Read Wait signal in SDIO mode (refer to "SDIO Card Specification" for further details). Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 8 of 19 5.2 Power up / Power down beaviour and reset 5.2.1 Power up When the voltage is ramped up the controller is ready (internal reset pin released) if the voltage reaches 1.65V. The host can start with communication 1ms after 2.7V is reached according the SDA soecification. That should perform 74 clock cycles and start with the sequence CMD0, CMD8, ACMD41 until card is ready as described in the SD specification 3.01. 5.2.2 Power down When the power falls below 2.6V the controller stopps the communication to the flash, but enables the flash to finish a started flash program operation (if voltage drop is not fast). After next initialization the controller checks the last written data for consistency and refreshs the data. Either the new or the old data (if the write operation could not be finished) are available. 5.2.3 Power drop If the voltage drops below 2.6V and rises again, the card performes a reset. The card must be initialized like after a power on. 5.2.4 Operation below minimum voltage If the card initialization is perfomed below the specified voltage of 2.7V, the card may be detected as 1MB card with no usefull data. In this case the host should power off and on the card and start initialization above 2.7V. 5.3 DC characteristics Measurements are at Recommended Operating Conditions unless otherwise specified. Table 12: DC Characteristics Symbol Parameter min typ max unit notes Operating Current Read 75 120 mA @ 25C @ 25C Operating Current Write 80 120 mA @ 25C Background read and refresh 1) 80 120 mA IDD @ 25C Pre-initialization Standby Current 5 15 mA @ 25C 2 9 mA Post-initialization Standby Current 2) @ 85C 5 15 mA ILI Input Leakage Current -2 2 A without pull up R ILO Output Leakage Current -2 2 A Notes: 1) The card can perform auto data read of the whole card to check for ECC errors and performs data refresh. 2) Before auto read the idle current is larger than the typical idle current after auto read. Table 13: SD Memory Card Recommended Operating Conditions Symbol Parameter VDD Supply Voltage Normal Operating Status Power Up Time (from 0V to VDD min) Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland min 2.7 typ 3.3 max 3.6 250 unit V ms Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 9 of 19 5.4 Signal Loading according to SD specification 5.5 AC characteristics 5.5.1 Default Speed mode (0 - 25MHz) according to SD specification 5.5.2 High Speed mode (0 - 50MHz) according to SD specification 5.5.3 UHS modes UHS modes were driven with a signal level of 1.8V. The cards support following UHS-I modes: Table 14: Supported UHS-I modes Mode max. Burst MB/s SDR12 12.5 SDR25 25 SDR50 50 SDR104 104 DDR50 50 max. Clock frequency MHz 25 50 100 208 50 (rising and falling edge) According to SD specification Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 10 of 19 6 Host access Specification The following chapters summarize how the host accesses the card: Chapter 6.1 summarizes the SD and SPI buses. Chapter 4summarizes the registers. 6.1 SD and SPI Bus Modes The card supports SD and the SPI Bus modes. Application can chose either one of the modes. Mode selection is transparent to the host. The card automatically detects the mode of the reset command and will expect all further communication to be in the same communication mode. The SD mode uses a 4-bit high performance data transfer, and the SPI mode provides compatible interface to MMC host systems with little redesign, but with a lower performance. 6.1.1 SD Bus Mode Protocol The SD Bus mode has a single master (host) and multiple slaves (cards) synchronous topology. Clock, power, and ground signals are common to all cards. After power up, the SD Bus mode uses DAT0 only; after initialization, the host can change the cards' bus width from 1 bit (DAT0) to 4 bits (DAT0-DAT3). In high speed mode, only one card can be connected to the bus. Communication over the SD bus is based on command and data bit streams which are initiated by a start bit and terminated by a stop bit. Command: a command is a token which starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). A command is transferred serially on the CMD line. Response: a response is a token which is sent from an addressed card, or (synchronously) from all connected cards, to the host as an answer to a previously received command. A response is transferred serially on the CMD line. Data: data can be transferred from the card to the host or vice versa. Data is transferred via the data lines. 6.1.2 SPI Bus Mode Protocol The Serial Parallel Interface (SPI) Bus is a general purpose synchronous serial interface. The SPI mode consists of a secondary communication protocol. The interface is selected during the first reset command after power up (CMD0) and it cannot be changed once the card is powered on. While the SD channel is based on command and data bit streams which are initiated by a start bit and terminated by a stop bit, the SPI channel is byte oriented. Every command or data block is built of 8-bit bytes and is byte aligned to the CS signal. The card identification and addressing methods are replaced by a hardware Chip Select (CS) signal. There are no broadcast commands. For every command, a card (slave) is selected by asserting (active low) the CS signal. The CS signal must be continuously active for the duration of the SPI transaction (command, response and data). The only exception occurs during card programming, when the host can de-assert the CS signal without affecting the programming process. The bidirectional CMD and DAT lines are replaced by unidirectional dataIn and dataOut signals. Table 15: SPI Bus Signals Signal Description /CS Host to card chip select CLK Host to card clock signal Data In Host to card data signal Data Out Card to host data signal Vdd, Vss Power and ground 6.1.3 Mode Selection The SD Memory Card wakes up in the SD mode. It will enter SPI mode if the CS signal is asserted (negative) during the reception of the reset command (CMD0) and the card is in idle_state. If the card recognizes that the SD mode is required it will not respond to the command and remain in the SD mode. If SPI mode is required the card will switch to SPI and respond with the SPI mode R1 response. Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 11 of 19 The only way to return to the SD mode is by entering the power cycle. In SPI mode the SD Memory Card protocol state machine is not observed. All the SD Memory Card commands supported in SPI mode are always available. During the initialization sequence, if the host gets Illegal Command indication for ACMD41 sent to the card, it may assume that the card is Multimedia Card. In that case it should re-start the card as Multimedia Card using CMD0 and CMD1. 6.2 Card Registers The SD Memory Card has registers. Refer to Table 16 to Table 22 for detail. Table 16: SD Memory Card registers Register Bit Description Function Name Width Card Identification This register contains the card identification information used during the CID 128 information Card Identification phase. Operation This register describes the operating voltage range and contains the status OCR 32 Conditions Registers bit in the power supply. Card specific This register provides information on how to access the card content. Some CSD 128 information fields of this register are writeable by PROGRAM_CSD (CMD27). SD Memory Card's SCR 64 This register provides information on special features. Special features Relative Card RCA 1) 16 This register carries the card address is SD Card mode. Address information about the card proprietary features and vendor specific life SSR 512 SD Status time information Notes 5. RCA register is not available in SPI mode Table 17: CID register Register Name MID OID PNM PRV PSN -- MDT CRC -- Table 18: OCR register OCR bit VDD voltage position window 0-3 Reserved 4 1.6-1.7 5 1.7-1.8 6 1.8-1.9 7 1.9-2.0 8 2.0-2.1 9 2.1-2.2 10 2.2-2.3 11 2.3-2.4 12 2.4-2.5 13 2.5-2.6 14 2.6-2.7 Bit Width 8 16 40 8 32 4 12 7 1 Description Manufacture ID OEM/Application ID Product Name Product Revision Product Serial Number Reserved Manufacture Date Check sum of CID contents Not used; always=1 typ. value 0 0 0 0 0 0 0 0 0 0 0 0 OCR bit position 15 16 17 18 19 20 21 22 23 24 25-30 30 31 typ. value 0x5d 0x5342 e.g."0008G" 0xgg xxxxxxxx 0x0 0xyym chksum 1 VDD voltage window typ. value 2.7-2.8 2.8-2.9 2.9-3.0 3.0-3.1 3.1-3.2 3.2-3.3 3.3-3.4 3.4-3.5 3.5-3.6 Switching to 1.8V accepted Reserved Card Capacity Status (CCS) 0=busy; 1=ready 1 1 1 1 1 1 1 1 1 1 *1) *2) Notes 6. This bit is valid only when the card power up status bit is set. 7. This bit is set to LOW if the card has not finished the power up routine. Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 12 of 19 Table 19: CSD register Register Name CSD_STRUCTURE -- TAAC NSAC TRAN_SPEED Bits 127:126 125:120 119:112 111:104 103:96 Bit Width 2 6 8 8 8 Description CSD structure Reserved Data read access time 1 Data read access time 2 (CLK cycle) Data transfer rate CCC READ_BL_LEN READ_BL_PARTIAL WRITE_BLK_MISALIGN READ_BLK_MISALIGN DSR_IMP -- C_SIZE -- C_SIZE VDD_R_CURR_MIN VDD_R_CURR_MAX VDD_W_CURR_MIN VDD_W_CURR_MAX C_SIZE_MULT ERASE_BLK_EN SECTOR_SIZE WP_GRP_SIZE WP_GRP_ENABLE -- R2W_FACTOR WRITE_BL_LEN WRITE_BL_PARTIAL -- FILE_FORMAT_GRP COPY PERM_WRITE_PROTECT TMP_WRITE_PROTECT FILE_FORMAT -- CRC -- *) Drive Size and block 95:84 12 Card command classes 83:80 4 Read data block length 79 1 Partial blocks for read allowed 78 1 Write block misalignment 77 1 Read block misalignment 76 1 DSR implemented 75:70 6 Reserved 69:48 22 Device size 47 1 Reserved 75:74 2 reserved 73:62 12 device size 61:59 3 max. read current @VDD min 58:56 3 max. read current @VDD max 55:53 3 max. write current @VDD min 52:50 3 max. write current @VDD max 49:47 3 device size multiplier 46 1 Erase single block enable 45:39 7 Erase sector size 38:32 7 Write protect group size 31 1 Write protect group enable 30:29 2 Reserved 28:26 3 Write speed factor 25:22 4 Write data block length 21 1 Partial blocks for write allowed 20:16 5 Reserved 15 1 File format group 14 1 Copy flag 13 1 Permanent write protection 12 1 Temporary write protection 11:10 2 File format 9:8 2 Reserved 7:1 7 Checksum of CSD contents 0 1 Always=1 sizes vary with card capacity typ. Value SDSC 00 typ. Value SDHC/SDXC 01 00000 00001110 00000000 00110010 Default speed 00101011 SDR 104 or other values 010110111101 010110110101 1010 1001 1 0 0 0 0 000000 xxx*) 0 00 xxx*) 7 7 7 7 xxx*) 1 1 1111111 1111111 0000000 0000000 0 0 00 00 010 010 1001*) 1001*) 0 0 00000 00000 0 W(1) 0 W(1) 0 W(1) 0 W(1) 0 W(1) 0 W(1) 0W 0W 00 W(1) 00 W(1) 00 W 00 W xxxxxxx W xxxxxxx W 1 1 memory capacity = (C_SIZE+1) * 512kByte W W(1) value can be changed with CMD27 (PROGRAM_CSD) value can be changed ONCE with CMD27 (PROGRAM_CSD) Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 13 of 19 Table 20: SCR register Field SCR_STRUCTURE SD_SPEC DATA_STAT_AFTER_ERASE Bits 63:60 59:56 55 Bit Width 4 4 1 SD_SECURITY 54:52 3 SD_BUS_WIDTHS SD_SPEC3 EX_SECURITY Reserved CMD_SUPPORT Reserved 51:48 47 46:43 42:34 33:32 31:0 4 1 4 9 2 32 Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland typ Value 0000 0010 1 010 011 100 0101 1 0000 0 11 0 remark SCR 1.01...2.00 SD 2.0 or 3.0 data are 0xFF after erase SDSC SDHC 3.xx SDXC 1 or 4 bit yes SD3.0 no extended security 0 CMD23 and CMD20 supported 0 Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 14 of 19 Table 21: RCA register Field Bit Width RCA 16 *) After Initialization the card can change the RCA register. typ Value 0x0000*) Table 22: SSR register Field Bits Data bus width Secured mode Reserved for security Reserved SD card type 511:510 509:509 508:502 501:496 495:480 Bit Width 2 1 7 6 16 Size protected area 479:448 32 Speed class Move performance Allocation unit size Reserved Erase unit size Erase unit timeout Erase unit offset UHS mode Speed Grade Allocation unit size in UHS mode Reserved Data structure version identifier, currently 1 Number of manufacturer marked defect blocks Number of initial spare blocks (worst chip) Number of initial spare blocks (sum over all chips) Percentage of remaining spare blocks (worst chip) Percentage of remaining spare blocks (all chips) Number of uncorrectable ECC errors (not including ECC errors during startup) Number of correctable ECC errors (not including ECC errors during startup) Lowest wear level class Highest wear level class Wear level threshold 447:440 439:432 431:428 427:424 423:408 407:402 401:400 399:396 395:392 391:312 311:304 303:288 287:272 271:256 255:248 247:240 8 8 4 4 16 6 2 4 4 80 8 16 16 16 8 8 0x9 1 AU 1 second 1 seconds UHS Grade1 4MB/s 0x01 0x0008 0x0074 0x0074 0x64*) 0x64*) version 1 8 initial BB 116 spare blocks 116 spare blocks 100% 100% 239:224 16 0x0000*) 0 uncorrectable errors 223:192 32 0x0045074b*) 191:176 175:160 16 16 0x0000*) 0x0000*) 159:144 16 0x003f 143:96 48 0x00...1ff0*) Number of flash blocks, in units of 256 blocks 95:80 Maximum flash block erase count target, in wear 79:64 level class units Power on count 63:32 Firmware version 31:0 Bit 311:0 are vendor specific, example values in the table *) value change in operation 16 0x0008 16 0x00xx 32 32 0x00000003*) 0xYYMMDDXX Total number of block erases Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland typ Value remark 0x2*) 0x0 0x00 0x00 0x0000 4 bit width not secured Regular SD 0x03000000 0x04000000 48MB 64MB 0x04 0x05 Class 10 5 MB/s 0x9 4 MiB 0x0 0x0001 0x01 0x1 0x1 4523851 correctable ECC errors 0 0 63 block erases per WL class 8176 block erase commands 2048 flash blocks Flash endurance xx WL classes 3x power on Firmware Version Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 15 of 19 7 Part Number Decoder S F SD 032G L 3 B M 1 TO - I - H G - 2CP - STD 1 2 3 4 5 6 7 8 9 10 13 Manuf. Memory Type. Product Type Capacity Platform Generation Memory Organization 1. Manufacturer 2. Memory Type 11 12 14 15 Option Configuration Manuf. Code: Flash Mode Manuf. Code: Flash Package Temp. Option Flash vendor Code Number of flash chips/channels Technology Swissbit code S Flash F 3. Product Type SD Memory Card SD 4. Capacity 2 GByte 4 GByte 8 GByte 16 GByte 32 GByte 64 GByte 2048 4096 8192 016G 032G 064G 5. Platform SD Memory Card L Generation 3 x8 B 6. Generation 7. Memory Organization 8. Technology SD Memory Card controller S-4xx Platform M 9. Channels 1 Flash Channel 1 10. Flash Code Toshiba Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland TO Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 16 of 19 11. Temp. Option Extended Temp. Range -25C to 85C Industrial Temp. Range -40C to 85C E I 12. DIE Classification MONO (single die package) DDP (dual die package) QDP (quad die package) ODP (octal die package) S-4x MLC/pSLC G L H O S-4xx SLC M D Q N 13. PIN Mode Single nCE & R/nB Dual nCE & Dual R/nB Quad nCE & Quad R/nB E F G 14. Configuration XYZ X Configuration Configuration default, non UHS UHS-I X 1 2 Y FW Revision FW Revision durabit Version 2 durabit Version 3 Y B C Z optional Optional Z standard 2plane pSLC (pseudo SLC) 1 2 P Swissbit / Standard STD 15. Option Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 17 of 19 8 Swissbit Label specification 8.1 Front side label 2GB SD 4GB SDHC 8GB SDHC 16GB SDHC 32GB SDHC 64GB SDXC 8.2 Back side marking SWISSBIT SFSDXXXXLXBM1 TO-X-XX-2CP-XXX 5016-6131210x Made in Germany Partnumber calendar week and year - Lot code CE WEEE Example of the back side laser marking Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 18 of 19 9 Revision History Table 23: Document Revision History Date Revision Description September 28, 2016 0.90 Initial preliminary release October 04, 2016 0.91 Update to newest firmware "C", lasermarking Revision Details Doc. req. no. 1294 Doc. req. no. 1300 Disclaimer: No part of this document may be copied or reproduced in any form or by any means, or transferred to any third party, without the prior written consent of an authorized representative of Swissbit AG ("SWISSBIT"). The information in this document is subject to change without notice. SWISSBIT assumes no responsibility for any errors or omissions that may appear in this document, and disclaims responsibility for any consequences resulting from the use of the information set forth herein. SWISSBIT makes no commitments to update or to keep current information contained in this document. The products listed in this document are not suitable for use in applications such as, but not limited to, aircraft control systems, aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. Moreover, SWISSBIT does not recommend or approve the use of any of its products in life support devices or systems or in any application where failure could result in injury or death. If a customer wishes to use SWISSBIT products in applications not intended by SWISSBIT, said customer must contact an authorized SWISSBIT representative to determine SWISSBIT willingness to support a given application. The information set forth in this document does not convey any license under the copyrights, patent rights, trademarks or other intellectual property rights claimed and owned by SWISSBIT. The information set forth in this document is considered to be "Proprietary" and "Confidential" property owned by SWISSBIT. ALL PRODUCTS SOLD BY SWISSBIT ARE COVERED BY THE PROVISIONS APPEARING IN SWISSBIT'S TERMS AND CONDITIONS OF SALE ONLY, INCLUDING THE LIMITATIONS OF LIABILITY, WARRANTY AND INFRINGEMENT PROVISIONS. SWISSBIT MAKES NO WARRANTIES OF ANY KIND, EXPRESS, STATUTORY, IMPLIED OR OTHERWISE, REGARDING INFORMATION SET FORTH HEREIN OR REGARDING THE FREEDOM OF THE DESCRIBED PRODUCTS FROM INTELLECTUAL PROPERTY INFRINGEMENT, AND EXPRESSLY DISCLAIMS ANY SUCH WARRANTIES INCLUDING WITHOUT LIMITATION ANY EXPRESS, STATUTORY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. (c)2016 SWISSBIT AG All rights reserved. Swissbit AG Industriestrasse 4 CH-9552 Bronschhofen Switzerland Revision: 0.91 www.swissbit.com industrial@swissbit.com S-46_data_sheet_SD-LxBM_Rev091.docx Page 19 of 19