SFSD4096L3BM1TO-I-GE-2CP-STD - Swissbit

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Product Data Sheet

Industrial

SD / SDHC / SDXC

Memory Card

S-46 Series

UHS-I Interface, pSLC

PRELIMINARY

BU: Flash Products

Date : Marc h 29, 2012

Revisio

n: 1.00

File :

S-

45_data_

sheet_SD

LxBM_Re

v090_pre

limi nary.

doc

Prod

uct

fact

shee

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S-46 Series (pSLC)

Industrial SD/SDHC/SDXC Memory Card-2/4/8/16/32/64GByte

Main Features

 Fully compliant with SD Memory Card specification 3.0

o SD / SDHC / SDXC high speed mode, UHS-I

o Speed class 10 and U1 according SD3.0 specification

o SD2.0 backward compliant

o FAT16 / FAT32 / exFAT preformatted

 High performance 3.0 specification

o SD burst up to 104MB/s

o SD Normal speed 0…25MHz clock rate

o SD High speed 25…50MHz clock rate

o SD UHS-I speed 0...50MHz (DDR) and 0…208MHz (SDR)

o Up to 50MByte/sec sequential data rate

o durabit firmware optimized for random write performance,

up to 1400 write IOPs (4kB)

 Power Supply: (Low-power CMOS technology)

o 2.7…3.6V normal operating voltage

 Standard SD Memory card form factor

o 32.0mm x 24.0mm x 2.1mm and Write Protect slider

 Optimized FW algorithms especially for high read access and long data retention applications

o Patented power-off reliability technology

o Wear Leveling technology

Equal wear leveling of static and dynamic data. The wear leveling assures that dynamic data as

well as static data is balanced evenly across the memory. With that the maximum write

endurance of the device is guaranteed

o Write Endurance technology

Due to intelligent wear leveling an even use of the entire flash is guaranteed, regardless how

much “static” (OS) data is stored.

o Read Disturb Management

The read commands are monitored and the content is refreshed when critical levels have occurred

o Data Care Management

The interruptible background process maintain the user data for Read Disturb effects or

Retention degradation due to high temperature effects

o Near miss ECC technology

Minimize the risk of uncorrectable bit failure over the product life time. Each read command

analyzes the ECC margin level and refresh data if necessary

o Diagnostic features with Life Time Monitoring tool support

 High reliability

o Designed for industrial market especially read intensive application like navigation,

infotainment, POS/POI, Medical and general boot medium use case:

o The product is optimized for long life cycle that requires a good data retention because

of high temperature mission profile.

o S-46 cards with pseudo SLC (pSLC) feature higher write performance and endurance than MLC

based cards (S-45) and have a cost advantage over SLC based cards (S-450)

o Number of card insertions/removals up to 20,000

o Extended and Industrial Temperature range -25° up to 85°C and -40° up to 85°C, respectively

o SIP (System In Package) process for extreme dust, water and ESD proof

 Controlled BOM & PCN process

 Customized options like CID registers, CPRM keys, firmware incl. settings and marking by projects

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1 Order Information

1.1 Standard product list

Table 1: Standard Product List

Density

Part Number

Temp. Range

Flash Technology

2GB

SFSD2048LgBM1TO-t-xx-2fP-STD

t = E -25°C to 85°C

t = I -40°C to 85°C

pSLC NAND Flash

15nm

4GB

SFSD4096LgBM1TO-t-xx-2fP-STD

8GB

SFSD8192LgBM1TO-t-xx-2fP-STD

16GB

SFSD016GLgBM1TO-t-xx-2fP-STD

32GB

SFSD032GLgBM1TO-t-xx-2fP-STD

64GB

SFSD064GLgBM1TO-t-xx-2fP-STD

g = 2, 3 generation; xx flash configuration, depending on generation, f = B, C, …firmware

1.2 Current product generation

Table 2: Standard Product List

Density

Part Number

Temp. Range

Flash Technology

2GB

SFSD2048L3BM1TO-E-GE-2CP-STD

-25°C to 85°C

pSLC NAND Flash

15nm

4GB

SFSD4096L3BM1TO-E-GE-2CP-STD

8GB

SFSD8192L3BM1TO-E-GE-2CP-STD

16GB

SFSD016GL3BM1TO-E-LF-2CP-STD

32GB

SFSD032GL3BM1TO-E-HG-2CP-STD

64GB

SFSD064GL3BM1TO-E-OG-2CP-STD

2GB

SFSD2048L3BM1TO-I-GE-2CP-STD

-40°C to 85°C

4GB

SFSD4096L3BM1TO-I-GE-2CP-STD

8GB

SFSD8192L3BM1TO-I-GE-2CP-STD

16GB

SFSD016GL3BM1TO-I-LF-2CP-STD

32GB

SFSD032GL3BM1TO-I-HG-2CP-STD

64GB

SFSD064GL3BM1TO-I-OG-2CP-STD

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Contents

MAIN FEATURES ............................................................................................................................................................................. 2

1 ORDER INFORMATION .................................................................................................................................................................. 3

1.1 STANDARD PRODUCT LIST........................................................................................................................................................... 3

1.2 CURRENT PRODUCT GENERATION ................................................................................................................................................. 3

2 PRODUCT SPECIFICATION ............................................................................................................................................................. 5

2.1 SYSTEM PERFORMANCE ............................................................................................................................................................ 5

2.2 ENVIRONMENTAL SPECIFICATIONS ............................................................................................................................................... 6

2.3 RECOMMENDED OPERATING CONDITIONS ..................................................................................................................................... 6

2.3.1 Recommended Storage Conditions .................................................................................................................... 6

2.3.2 Humidity & EMC ................................................................................................................................................... 6

2.3.3 Environmental Conditions .................................................................................................................................. 6

2.4 PHYSICAL DIMENSIONS ............................................................................................................................................................ 6

2.5 RELIABILITY .......................................................................................................................................................................... 6

3 CAPACITY SPECIFICATION ............................................................................................................................................................. 7

4 CARD PHYSICAL ........................................................................................................................................................................... 7

4.1 PHYSICAL DESCRIPTION ............................................................................................................................................................ 7

5 ELECTRICAL INTERFACE ................................................................................................................................................................ 8

5.1 ELECTRICAL DESCRIPTION .......................................................................................................................................................... 8

5.2 POWER UP / POWER DOWN BEAVIOUR AND RESET ......................................................................................................................... 9

5.2.1 Power up ............................................................................................................................................................... 9

5.2.2 Power down ......................................................................................................................................................... 9

5.2.3 Power drop ........................................................................................................................................................... 9

5.2.4 Operation below minimum voltage ................................................................................................................. 9

5.3 DC CHARACTERISTICS ............................................................................................................................................................... 9

5.4 SIGNAL LOADING ..................................................................................................................................................................10

5.5 AC CHARACTERISTICS ..............................................................................................................................................................10

5.5.1 Default Speed mode (0 – 25MHz) .....................................................................................................................10

5.5.2 High Speed mode (0 – 50MHz) ........................................................................................................................10

5.5.3 UHS modes ..........................................................................................................................................................10

6 HOST ACCESS SPECIFICATION ......................................................................................................................................................11

6.1 SD AND SPI BUS MODES .......................................................................................................................................................11

6.1.1 SD Bus Mode Protocol .........................................................................................................................................11

6.1.2 SPI Bus Mode Protocol ........................................................................................................................................11

6.1.3 Mode Selection ....................................................................................................................................................11

6.2 CARD REGISTERS ...................................................................................................................................................................12

7 PART NUMBER DECODER ............................................................................................................................................................16

8 SWISSBIT LABEL SPECIFICATION .................................................................................................................................................18

8.1 FRONT SIDE LABEL .................................................................................................................................................................18

8.2 BACK SIDE MARKING .............................................................................................................................................................18

9 REVISION HISTORY .....................................................................................................................................................................19

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2 Product Specification

The SD Memory Card is a small form factor non-volatile memory card which provides high capacity data

storage. Its aim is to capture, retain and transport data, audio and images, facilitating the transfer of all

types of digital information between a large variety of digital systems.

The card operates in two basic modes:

 SDHC/SDXC and UHS-I card modes

 SPI mode

The SD Memory Card also supports SD Default and High Speed mode with up to 50MHz clock frequency

as well as UHS-I modes DDR50, SDR12/25/50/104 with up to 208MHz clock frequency.

 SD Memory card Specification Part 1, Physical layer Specification V3.01

 SD Memory card Specification Part 2, File System Specification V3.00

 SD Memory card Specification Part 3, Security Specification V3.00

 SD Memory Card Addendum V4.00

Simplified specifications are available at https://www.sdcard.org/downloads/pls/simplified_specs/

The Card has an internal intelligent controller which manages interface protocols, data storage and retrieval

as well as hardware BCH Error Correction Code (ECC), defect handling, diagnostics and clock control.

The advanced wear leveling mechanism assures an equal usage of the Flash memory cells to extend the life

time.

The hardware BCH-code ECC allows to detect and correct up to 40 defect bits per 1kByte.

The controller performs control read operations and checks the consistence of the data. If an error of some

bits is detected, the card refreshes all data in the flash cells to prevent data retention problems.

The card has a power-loss management feature to prevent data corruption after power-down.

The cards are RoHS compliant and lead-free.

2.1 System Performance

Table 3: Performance

System Performance

typ(1)(2)

max (1)(3)

Unit

Burst Data transfer Rate (max SD clock 208MHz)

104

MB/s

2GB(4)

Sustained Sequential Read

MB/s

Sustained Sequential Write

Sustained Random Read 4k

4.4

5.5

MB/s

Sustained Random Write 4k

4.6

5.5

4 to 64GB

Sustained Sequential Read

MB/s

Sustained Sequential Write

Sustained Random Read 4k

3.9

5.0

MB/s

Sustained Random Write 4k

4.8

5.7

1. All values refer to Toshiba Flash 16/32/64Gb

2. Sustained Speed measured with USB-SD Memory Card reader with crystal disk test tool.

It depends on burst speed, flash number, previous operations, and file size.

3. Target values

4. Swissbit SDSC cards (up to 2GB) also supports UHS speed modes

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2.2 Environmental Specifications

2.3 Recommended Operating Conditions

Table 4: SD Memory Card Recommended Operating Conditions

Parameter

min

typ

max

unit

Extended Operating Temperature

-25

85*)

°C

Industrial Operating Temperature

-40

85*)

°C

2.3.1 Recommended Storage Conditions

Table 5: SD Memory Card Recommended Storage Conditions

Parameter

min

typ

max

unit

Extended Storage Temperature

-25

100*)

°C

Industrial Operating Temperature

-40

100*)

°C

*) high temperature storage without operation reduces the data retention, in operation the data will be

refreshed, if data error issues were detected

2.3.2 Humidity & EMC

Table 6: Humidity & EMC

Parameter

Condition

Humidity (non-condensing)

85% RH @85°C 1000h

ESD

up to ±4 kV (contact discharge),

according to IEC61000-4-2 and SDA, Human Body Model 150pF/ 330Ohm,

on each contact pad, non-operating

up to ±15 kV, (air discharge),

according to IEC61000-4-2 and SDA, Human Body Model 150pF/ 330Ohm,

isolated contact pad area, non-operating

2.3.3 Environmental Conditions

Table 7: Environmental Conditions

Parameter

Condition

UV light exposure

UV: 254nm, 15Ws/cm2 according to ISO7816-1

X-Ray

0.1 Gy 70keV to 140keV (ISO7816-1) according SDA

Durability

20,000 mating cycles

Drop Test

1.5m free fall

Bending / Torque

10N / 0.15Nm ±2.5° max

Mechanical Shock

1500G, 0.5ms, half sine wave ±xyz-axis, 4 pulses each

non-operating, JESD22B110/B104 Condition B

Vibration

50G, p-p, 20..2000Hz, sweep xyz-axis,

4 pulses each, non-operating, MIL-STD-883 M2007.3 Condition B

2.4 Physical Dimensions

Table 8: Physical Dimensions

Outer Physical Dimensions

Value

Unit

Length

32.00±0.1

Width

24.00±0.1

Thickness

2.10±0.15

Weight (typ.)

2.5 Reliability

Table 9: Reliability

Parameter

Value

Data Retention at beginning @ 40°C

10 years *)

Data Retention at life end (20k PE cycles) @ 40°C

1 year *)

*) After every power on the card reads the whole flash and performs a data refresh if necessary. So the data

retention can be much longer in most use cases.

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3 Capacity specification

Table 10: SD Memory Card capacity specification

Capacity

Sectors

Total addressable capacity (Byte)

2GB

3,938,304

2,016,411,648

4GB

7,774,208

3,980,394,496

8GB

15,802,368

8,090,812,416

16GB

31,834,112

16,299,065,344

32GB

62,333,952

31,914,983,424

64GB

124,735,488

63,864,569,856

4 Card physical

4.1 Physical description

The SD Memory Card contains a single chip controller and Flash memory module(s). The controller interfaces

with a host system allowing data to be written to and read from the Flash memory module(s). Figure 1

shows card dimensions.

Figure 1: Simplified mechanical dimensions SD card

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5 Electrical interface

5.1 Electrical description

Figure 2: SD Memory Card Shape and Interface (Top View)

Table 11: SD Memory Card Pad Assignment

Pin #

SD Mode

SPI Mode

Name

Type1

Description

Name

Type1

Description

CD/DAT32

I/O/PP3

Card Detect/ Data Line [Bit 3]

Chip Select (neg true)

CMD

Command/Response

Data In

VSS1

Supply voltage ground

VSS

Supply voltage ground

VDD

Supply voltage

VDD

Supply voltage

CLK

Clock

SCLK

Clock

VSS2

Supply voltage ground

VSS2

Supply voltage ground

DAT0

I/O/PP

Data Line [Bit 0]

O/PP

Data Out

DAT14

I/O/PP

Data Line [Bit 1]

RSV

DAT25

I/O/PP

Data Line [Bit 2]

RSV

Notes:

1) S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers;

2) The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after

SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well,

while they are not used.

3) At power up this line has a 50kOhm pull up enabled in the card. This resistor serves two functions

Card detection and Mode Selection. For Mode Selection, the host can drive the line high or let it be

pulled high to select SD mode. If the host wants to select SPI mode it should drive the line low. For

Card detection, the host detects that the line is pulled high. This

pull-up should be disconnected by

the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command

4) DAT1 line may be used as Interrupt Output (from the Card) in SDIO mode during all the times that it

is not in use for data transfer operations (refer to "SDIO Card Specification" for further details).

5) DAT2 line may be used as Read Wait signal in SDIO mode (refer to "SDIO Card Specification" for

further details).

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5.2 Power up / Power down beaviour and reset

5.2.1 Power up

When the voltage is ramped up the controller is ready (internal reset pin released) if the voltage reaches

1.65V. The host can start with communication 1ms after 2.7V is reached according the SDA soecification. That

should perform 74 clock cycles and start with the sequence CMD0, CMD8, ACMD41 until card is ready as

described in the SD specification 3.01.

5.2.2 Power down

When the power falls below 2.6V the controller stopps the communication to the flash, but enables the

flash to finish a started flash program operation (if voltage drop is not fast).

After next initialization the controller checks the last written data for consistency and refreshs the data.

Either the new or the old data (if the write operation could not be finished) are available.

5.2.3 Power drop

If the voltage drops below 2.6V and rises again, the card performes a reset. The card must be initialized like

after a power on.

5.2.4 Operation below minimum voltage

If the card initialization is perfomed below the specified voltage of 2.7V, the card may be detected as 1MB

card with no usefull data. In this case the host should power off and on the card and start initialization

above 2.7V.

5.3 DC characteristics

Measurements are at Recommended Operating Conditions unless otherwise specified.

Table 12: DC Characteristics

Symbol

Parameter

min

typ

max

unit

notes

IDD

Operating Current Read

120

@ 25°C

Operating Current Write

120

@ 25°C

Background read and refresh 1)

120

@ 25°C

Pre-initialization Standby Current

@ 25°C

Post-initialization Standby Current 2)

@ 25°C

@ 85°C

ILI

Input Leakage Current

-2

µA

without

pull up R

ILO

Output Leakage Current

-2

µA

Notes:

1) The card can perform auto data read of the whole card to check for ECC errors and performs data

refresh.

2) Before auto read the idle current is larger than the typical idle current after auto read.

Table 13: SD Memory Card Recommended Operating Conditions

Symbol

Parameter

min

typ

max

unit

VDD

Supply Voltage

Normal Operating Status

2.7

3.3

3.6

Power Up Time (from 0V to VDD min)

250

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5.4 Signal Loading

according to SD specification

5.5 AC characteristics

5.5.1 Default Speed mode (0 – 25MHz)

according to SD specification

5.5.2 High Speed mode (0 – 50MHz)

according to SD specification

5.5.3 UHS modes

UHS modes were driven with a signal level of 1.8V.

The cards support following UHS-I modes:

Table 14: Supported UHS-I modes

Mode

max. Burst

MB/s

max. Clock frequency

MHz

SDR12

12.5

SDR25

SDR50

100

SDR104

104

208

DDR50

50 (rising and falling edge)

According to SD specification

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6 Host access Specification

The following chapters summarize how the host accesses the card:

 Chapter 6.1 summarizes the SD and SPI buses.

 Chapter 4summarizes the registers.

6.1 SD and SPI Bus Modes

The card supports SD and the SPI Bus modes. Application can chose either one of the modes. Mode selection

is transparent to the host. The card automatically detects the mode of the reset command and will expect

all further communication to be in the same communication mode. The SD mode uses a 4-bit high

performance data transfer, and the SPI mode provides compatible interface to MMC host systems with little

redesign, but with a lower performance.

6.1.1 SD Bus Mode Protocol

The SD Bus mode has a single master (host) and multiple slaves (cards) synchronous topology. Clock, power,

and ground signals are common to all cards. After power up, the SD Bus mode uses DAT0 only; after

initialization, the host can change the cards’ bus width from 1 bit (DAT0) to 4 bits (DAT0-DAT3). In high

speed mode, only one card can be connected to the bus.

Communication over the SD bus is based on command and data bit streams which are initiated by a start

bit and terminated by a stop bit.

 Command: a command is a token which starts an operation. A command is sent from the host

either to a single card (addressed command) or to all connected cards (broadcast command). A

command is transferred serially on the CMD line.

 Response: a response is a token which is sent from an addressed card, or (synchronously) from all

connected cards, to the host as an answer to a previously received command. A response is

transferred serially on the CMD line.

 Data: data can be transferred from the card to the host or vice versa. Data is transferred via the

data lines.

6.1.2 SPI Bus Mode Protocol

The Serial Parallel Interface (SPI) Bus is a general purpose synchronous serial interface. The SPI mode

consists of a secondary communication protocol. The interface is selected during the first reset command

after power up (CMD0) and it cannot be changed once the card is powered on.

While the SD channel is based on command and data bit streams which are initiated by a start bit and

terminated by a stop bit, the SPI channel is byte oriented. Every command or data block is built of 8-bit

bytes and is byte aligned to the CS signal.

The card identification and addressing methods are replaced by a hardware Chip Select (CS) signal. There

are no broadcast commands. For every command, a card (slave) is selected by asserting (active low) the CS

signal.

The CS signal must be continuously active for the duration of the SPI transaction (command, response and

data). The only exception occurs during card programming, when the host can de-assert the CS signal

without affecting the programming process.

The bidirectional CMD and DAT lines are replaced by unidirectional

dataIn

and

dataOut

signals.

Table 15: SPI Bus Signals

Signal

Description

/CS

Host to card chip select

CLK

Host to card clock signal

Data In

Host to card data signal

Data Out

Card to host data signal

Vdd, Vss

Power and ground

6.1.3 Mode Selection

The SD Memory Card wakes up in the SD mode. It will enter SPI mode if the CS signal is asserted (negative)

during the reception of the reset command (CMD0) and the card is in

idle_state

. If the card recognizes that

the SD mode is required it will not respond to the command and remain in the SD mode.

If SPI mode is required the card will switch to SPI and respond with the SPI mode R1 response.

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The only way to return to the SD mode is by entering the power cycle. In SPI mode the SD Memory Card

protocol state machine is not observed. All the SD Memory Card commands supported in SPI mode are

always available.

During the initialization sequence, if the host gets Illegal Command indication for ACMD41 sent to the card,

it may assume that the card is Multimedia Card. In that case it should re-start the card as Multimedia Card

using CMD0 and CMD1.

6.2 Card Registers

The SD Memory Card has registers. Refer to Table 16 to

Table 22 for detail.

Table 16: SD Memory Card registers

Name

Bit

Width

Description

Function

CID

128

Card Identification

information

This register contains the card identification information used during the

Card Identification phase.

OCR

Operation

Conditions Registers

This register describes the operating voltage range and contains the status

bit in the power supply.

CSD

128

Card specific

information

This register provides information on how to access the card content. Some

fields of this register are writeable by PROGRAM_CSD (CMD27).

SCR

SD Memory Card’s

Special features

This register provides information on special features.

RCA 1)

Relative Card

Address

This register carries the card address is SD Card mode.

SSR

512

SD Status

information about the card proprietary features and vendor specific life

time information

Notes

5. RCA register is not available in SPI mode

Table 17: CID register

Bit Width

Description

typ. value

MID

Manufacture ID

0x5d

OID

OEM/Application ID

0x5342

PNM

Product Name

e.g.“0008G”

PRV

Product Revision

0xgg

PSN

Product Serial Number

xxxxxxxx

—

Reserved

0x0

MDT

Manufacture Date

0xyym

CRC

Check sum of CID contents

chksum

—

Not used; always=1

Table 18: OCR register

OCR bit

position

VDD voltage

window

typ. value

OCR bit

position

VDD voltage window

typ. value

0-3

Reserved

2.7-2.8

1.6-1.7

2.8-2.9

1.7-1.8

2.9-3.0

1.8-1.9

3.0-3.1

1.9-2.0

3.1-3.2

2.0-2.1

3.2-3.3

2.1-2.2

3.3-3.4

2.2-2.3

3.4-3.5

2.3-2.4

3.5-3.6

2.4-2.5

Switching to 1.8V accepted

2.5-2.6

25-30

Reserved

2.6-2.7

Card Capacity Status (CCS)

*1)

0=busy; 1=ready

*2)

Notes

6. This bit is valid only when the card power up status bit is set.

7. This bit is set to LOW if the card has not finished the power up routine.

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Table 19: CSD register

Bits

Bit

Width

Description

typ. Value

SDSC

typ. Value

SDHC/SDXC

CSD_STRUCTURE

127:126

CSD structure

—

125:120

Reserved

00000

TAAC

119:112

Data read access time 1

00001110

NSAC

111:104

Data read access time 2 (CLK cycle)

00000000

TRAN_SPEED

103:96

Data transfer rate

00110010 Default speed

00101011 SDR 104

or other values

CCC

95:84

Card command classes

010110111101

010110110101

READ_BL_LEN

83:80

Read data block length

1010

1001

READ_BL_PARTIAL

Partial blocks for read allowed

WRITE_BLK_MISALIGN

Write block misalignment

READ_BLK_MISALIGN

Read block misalignment

DSR_IMP

DSR implemented

—

75:70

Reserved

000000

C_SIZE

69:48

Device size

xxx*)

—

Reserved