BALF-CC25-02D3 50 ohm, conjugate match to CC2541 transformer balun Datasheet - production data Description STMicroelectronics BAL-CC25-02D3 is an ultra miniature balun which integrates a matching network in a monolithic glass substrate. This has been customized for the CC2541 RF transceivers. It's a design using STMicroelectronics IPD (integrated passive device) technology on nonconductive glass substrate to optimize RF performance. )OLS&KLSSDFNDJH EXPSV Figure 1. Pin configuration (top view) Features * 2.45 GHz balun with integrated matching network 6( 5)B1 $ * Matching optimized for following CC2541 * Low insertion loss = * Low amplitude imbalance * Low phase imbalance *1' 5)B3 % * Coated Flip-Chip on glass * Small footprint: < 0.88 mm Benefits Figure 2. Application schematic (top view) * Very low profile * High RF performance * PCB space saving versus discrete solution * BOM count reduction * Efficient manufacturability November 2015 This is information on a product in full production. DocID028619 Rev 1 1/11 www.st.com 11 Characteristics 1 BALF-CC25-02D3 Characteristics Table 1. Absolute maximum rating (limiting values) Symbol PIN VESD TOP Parameter Input power RFIN Value Unit 20 dBm ESD ratings MIL STD883C (HBM: C = 100 pF, R = 1.5 , air discharge) 2000 ESD ratings machine model (MM: C = 200 pF, R = 25 , L = 500 nH) 500 ESD ratings charged device model (CDM, JESD22-C101D) 500 Operating temperature -40 to + 105 V C Table 2. Electrical characteristics - RF performance (Tamb = 25 C) Value Symbol Parameter Unit Min. ZOUT ZIN Frequency range (bandwidth) IL Insertion loss in bandwidth RL_DIFF Max. Conjugate match to CC2541 Nominal input impedance F RL_SE 2/11 Nominal differential output impedance Typ. 50 2379 2507 1.6 1.8 dB Single ended return loss in bandwidth 9 10 dB Differential ended return loss in bandwidth 9 17 dB 7 0.6 dB imb Phase imbalance Aimb Amplitude imbalance DocID028619 Rev 1 BALF-CC25-02D3 Characteristics Figure 3. Balun transmission (Tamb = 25 C) G% IUHT*+] Figure 4. Insertion loss (Tamb = 25 C) G% IUHT*+] Figure 5. Return loss on SE port (Tamb = 25 C) G% IUHT*+] DocID028619 Rev 1 3/11 Characteristics BALF-CC25-02D3 Figure 6. Return loss on DIFF port (Tamb = 25 C) G% IUHT*+] Figure 7. Amplitude imbalance (Tamb = 25 C) G% IUHT*+] Figure 8. Phase imbalance (Tamb = 25 C) GHJ IUHT*+] 4/11 DocID028619 Rev 1 BALF-CC25-02D3 2 Package information Package information * Epoxy meets UL94, V0 * Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Flip-Chip package information Figure 9. Flip-Chip package outline 7RSYLHZ ' VLGHYLHZ %RWWRPYLHZ $ $ $ $ FFF & ' 2.1 ( & ( 6( % % E ' I' I( $ Table 3. Flip-Chip package mechanical data Description Parameter Min. Typ. Max. Unit A Bump height + substrate thickness 0.570 0.630 0.690 mm A1 Bump height 0.155 0.205 0.255 mm A2 Substrate thickness 0.400 mm b Bump diameter 0.215 0.255 0.295 mm D Y dimension of the die 0.890 0.940 0.990 mm D1 Y pitch E X dimension of the die E1 X pitch 0.500 SE 0.890 0.940 mm 0.990 mm 0.500 mm 0.250 mm fD Distance from bump to edge of die on Y axis 0.220 mm fE Distance from bump to edge of die on X axis 0.220 mm ccc 0.05 $ 0.025 DocID028619 Rev 1 mm mm 5/11 Package information BALF-CC25-02D3 Figure 10. Footprint PP " PP PP # Figure 11. Bump coordinates (top view) 5)B1 6( 5)B3 *1' &RRUGLQDWHVJLYHQIURPFHQWHURIGLH LQP 6( *1' ',))3 ',))0 6/11 DocID028619 Rev 1 BALF-CC25-02D3 Package information Figure 12. Footprint - 3 mils stencil -non solder mask defined Figure 13. Footprint - 3 mils stencil - solder mask defined &RSSHUSDGGLDPHWHU PUHFRPPHQGHG PPLQLPXP PPD[LPXP 6ROGHUPDVNRSHQLQJ PUHFRPPHQGHG PPLQLPXP PPD[LPXP 6ROGHUPDVNRSHQLQJ PUHFRPPHQGHG PPLQLPXP PPD[LPXP &RSSHUSDGGLDPHWHU PUHFRPPHQGHG PPLQLPXP 6ROGHUVWHQFLORSHQLQJ PUHFRPPHQGHG 6ROGHUVWHQFLORSHQLQJ PUHFRPPHQGHG Figure 14. Footprint - 5 mils stencil -non solder mask defined Figure 15. Footprint - 5 mils stencil - solder mask defined &RSSHUSDGGLDPHWHU PUHFRPPHQGHG PPLQLPXP PPD[LPXP 6ROGHUPDVNRSHQLQJ PUHFRPPHQGHG PPLQLPXP PPD[LPXP 6ROGHUPDVNRSHQLQJ PUHFRPPHQGHG PPLQLPXP PPD[LPXP &RSSHUSDGGLDPHWHU PUHFRPPHQGHG PPLQLPXP 6ROGHUVWHQFLORSHQLQJ PUHFRPPHQGHG 6ROGHUVWHQFLORSHQLQJ PUHFRPPHQGHG GHSHQGLQJRQSDVWHLWFDQJRGRZQWRP GHSHQGLQJRQSDVWHLWFDQJRGRZQWRP DocID028619 Rev 1 7/11 Package information BALF-CC25-02D3 Figure 16. PCB layout recommendation Figure 17. Marking Dot, ST logo ECOPACK grade xx = marking z = manufacturing location yww = datecode (y = year ww = week) Note: x x z y ww More information is available in the STMicroelectronics Application note: AN2348 Flip-Chip: "Package description and recommendations for use" 8/11 DocID028619 Rev 1 BALF-CC25-02D3 Package information 2.0 0.05 O 1.55 0.10 4.0 0.1 1.0 0.05 8.0 0.3 0.20 0.015 ST ST ST ST ST ST ST xxz yww xxz yww xxz yww xxz yww xxz yww xxz yww xxz yww 3.5 0.05 Dot identifying Pin A1 location 1.75 0.1 Figure 18. Flip Chip tape and reel specifications 2.0 0.05 1.0 0.05 0.73 0.05 All dimensions are typical values in mm Note: User direction of unreeling More information is available in the application note: AN2348: "Flip Chip: package description and recommendations for use" DocID028619 Rev 1 9/11 Ordering information 3 BALF-CC25-02D3 Ordering information Table 4. Ordering information 4 Order code Marking Package Weight Base qty Delivery mode BAL-CC25-02D3 TE Flip Chip 1.07 mg 5000 Tape and reel (7") Revision history Table 5. Document revision history 10/11 Date Revision 17-Nov-2015 1 Changes Initial release DocID028619 Rev 1 BALF-CC25-02D3 IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2015 STMicroelectronics - All rights reserved DocID028619 Rev 1 11/11