INTEGRATED CIRCUITS DAWA SlAlleler Fora complete data sheel, please alse download: |e The C08 74HC/HCT/HCLU/HCMOS Logic Family Specifications | 6 The [C06 74HC/HCT/HOU/HOMOS Logic Package Information | The [C06 74HC/HCT/HCU/HOMOS Logic Package Outlines 74HC/HCT257 Quad 2-input multiplexer; 3-state Product specification 1998 Sep 30 Supersedes data of September 1993 File under Integrated Circuits, ICO6 Philips PHILIPS Semiconductors gn DH I LI p VTPhilips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 FEATURES e Non-inverting data path 3-state outputs interface directly with system bus e Output capability: bus driver lec category: MSI GENERAL DESCRIPTION The 74HC/HCT257 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT257 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; t, = + = 6 ns The data inputs from source 0 (11p to 41) are selected when input S is LOW and the data inputs from source 4 (1l; to 414) are selected when S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 257 is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE.(111.S + 1lp.8) 2Y = OE.(214.S + 2lo.S) 3Y = OE.(3ly.S + 3lo.S) AY = OE.(414.S + 4lo.S) The 257 is identical to the 258 but has non-inverting (true) outputs. ~~ NNN TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT tey_/ tpLy propagation delay CL=15pF; Vcc =5V nlo, nly to nY 11 13 ns S to nY 14 17 ns C| input capacitance 3.5 3.5 pF Cpp power dissipation capacitance per multiplexer | notes 1 and 2 45 45 pF Notes 1. Cpp is used to determine the dynamic power dissipation (Pp in uW): Pp = Cpp x Vec? x fi + E (CL x Ver? x fo) where: f, = input frequency in MHz fo = output frequency in MHz > (CL x Vec? x fp) = sum of outputs C, = output load capacitance in pF Voc = supply voltage in V For HC the condition is V; = GND to Vec For HCT the condition is V; = GND to Veg 1.5 V i) 1998 Sep 30Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 ORDERING INFORMATION TYPE PACKAGE NUMBER NAME DESCRIPTION VERSION 74HC257N; DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HCT257N 74HC257D; $016 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT257D 74HC257DB; SSOP16 | plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HCT257DB 74HC257PW; TSSOP16_ | plastic thin shrink small outline package; 16 leads; body width 4.4 mm | SOT403-1 74HCT257PW PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 Ss common data select input 2,5, 11, 14 1lo to Alp data inputs from source 0 3,6, 10,13 11, to 4l, data inputs from source 1 4,7,9,12 1Y to 4Y 3-state multiplexer outputs 8 GND ground (0 V) 15 OE 3-state output enable input (active LOW) 16 Voc positive supply voltage U su 16] Voc S nl en Io [2 | 15] OE 2) "lo 1YR-4 7] 3 1 2 FF wx tly [3] 14] 410 5] 2h vis 1y [4] 13] 414 6 aly vy? t 2lo [5 | er 12] ay 11 ) 3lo 3y 9 a so] fas eo +h 2v 7 10] 314 13 4h, vy aH az GND [8 | 9]3Y 15 O} OE _ 7z67051.1 MLB311 MGA835 Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. 1998 Sep 30 3Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 FUNCTION TABLE INPUTS OUTPUT OE Ss nl nl, nY 2_|3 5 |6 1 [10 __[14 [13 4 X X X 7 tig {1ly [2lo [2ly [3lg [3ly | 4lg | 4, L H X L L Us SELECTOR L H xX H 4 L L L X L tt tt Tt ft | L L H x H 21 oO 3-STATE MULTIPLEXER OUTPUTS Notes 4y oy 3y av 1. H=HIGH voltage level a 7 1D ee) L = LOW voltage level Fig.4 Functional diagram. lig 2Y 3Y 4y iD [> D> yy +> De Fig.5 Logic diagram. 1998 Sep 30 X = don't care Z = high impedance OFF-statePhilips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 DC CHARACTERISTICS FOR 74HC For the DC characteristics see 74HO/MOTHOUICMOS Logie Family Specifications. Output capability: bus driver Icoc category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; t, = } =6 ns; C_ = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL | PARAMETER UNIT Voc WAVEFORMS +25 40 to +85 | -40 to +125 (V) min. | typ. | max. | min. | max. | min. | max. tpH/ tpLy | propagation delay 36 | 110 140 165 ns 2.0 | Fig.6 nlo to ny; 13 |22 28 33 45 nly to ny 10 |19 24 28 6.0 tpH_/ tpLy | propagation delay 47 | 150 190 225 ns 2.0 | Fig.6 Stony 17 |30 38 45 45 14 |26 33 38 6.0 tpzH/ tpz_ | 3-state output enable time 33 | 150 190 225 ns 2.0 | Fig.7 OE to nY 12 |30 38 45 45 10 |26 33 38 6.0 tpyz/ tpLz | 3-state output disable time 41 |150 190 225 ns 2.0 | Fig.7 OE to n 15 |30 38 45 45 12 |26 33 38 6.0 try/ trLy | output transition time 14 |60 75 90 ns 2.0 | Fig.6 5 12 15 18 4.5 4 10 13 15 6.0 1998 Sep 30Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see 74HO/MOTHOUICMOS Logie Family Specifications. Output capability: bus driver Icoc category: MSI Note to HCT types The value of additional quiescent supply current (Alcc) for a unit load of 1 is given in the family specifications. To determine Alcc per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT no 0.40 nly 0.40 OE 1.35 S 0.70 AC CHARACTERISTICS FOR 74HCT GND = 0 V; t, = } =6 ns; C_ = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL | PARAMETER UNIT Voc WAVEFORMS +25 40 to +85 | -40 to +125 (V) min. | typ. | max. | min. | max. | min. | max. tpH/ tp_y | propagation delay 16 30 38 45 ns 4.5 | Fig.6 nlo to nY nly to nY tpH/ tp_y | propagation delay 20 35 44 53 ns 4.5 | Fig.6 S to nY tpzH/ tpz_ | 3-state output enable time 15 30 38 45 ns 4.5 | Fig.7 OE to nY tpHz/ tpLz | 3-state output disable time 16 30 38 45 ns 4.5 | Fig.7 OE to nY truL/ trLy | output transition time 5 12 15 18 ns 4.5 | Fig.6 1998 Sep 30 6Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 AC WAVEFORMS O INPUT $, nlp, nly INPUT OUTPUT LOW-to- OFF OFF -to- LOW n OUTPUT OUTPUT HIGH -to-OFF OFF -to- HIGH 7287853.2 7Z96102 (1) HC: Vu = 50%; Vi = GND to Vee. (1) HC: Vu = 50%; Vi = GND to Vee. HCT: Viq = 1.3 V; V)=GND to 3V. HCT: Vy = 1.3 V; Vi = GND to 3 V. Fig.6 Waveforms showing the input (nlo, nl+) to Fig.7 Waveforms showing the 3-state enable and output (nY) propagation delays and the disable times. output transition times. 1998 Sep 30 7Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 }~ seating plane 0 be scale 5 DIMENSIONS (inch dimensions are derived from the original mm dimensions) 10mm A Ay Ag (1) (1) Zz UNIT | max. | min. | max. b by c D E e e4 L Me Mu w max. 140 | 053 | 032 | 218 | 6.48 3.9 8.25 | 95 mm 47 | 051 | 37 | 444 | 038 | 023 | 214 | 620 | 24 | 782 | 34 | 780 | ag | %P54 | 22 , 0.055 | 0.021 | 0.013 | 0.86 | 0.26 0.15 | 032 | 0.37 inches | 0.19 | 0.020] 0.15 | oye | oo15 | 0009 | oaa | 024 | 212 | 930 | O43 | ogr | ogg | 0:01 | 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC EIAJ 92-40-02. SOT38-1 050G09 MO-001AE f--} OBO 10 1998 Sep 30 8Philips Semiconductors Quad 2-input multiplexer; 3-state $016: plastic small outline package; 16 leads; body width 3.9 mm Product specification 74HC/HCT257 SOT109-1 JEEP 1998 Sep 30 | y | |? A HH H!H HH H : Pe YN Ue A - - - - - -- . Ay r) (A3) A pin 1 index | ty t | /- j 7 oo oo oo ae } 4 | [e] |, detail X p 0 25 5mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT | max. | At A. | Ag bp c DM | EM | e He L Lp Q Vv w y Zz ) 6 0.25 | 1.45 0.49 | 0.25 | 10.0 | 4.0 6.2 1.0 | 07 07 mm 11-75 | o40 | 1.25 | 75) ose | o19] 98 | 38 | 17] 58 | 18] o4 | o6 | OF | 925) O14 | Og | go , 0.010 | 0.057 0.019 |0.0100] 0.39 | 0.16 0.244 0.039 | 0.028 0.028 | 0 inches | 0.069 | 9 994 | 0.049} 9-91 | 0.014 ]0.0075] 0.38 | 0.15 | 5} 0.208 | 9-41 | 0.1016 | 0.020) 9-01 | 9-01 | 9-004 | 9 o45 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES VERSION proJecTion | 'SSUEDATE IEC JEDEC EIAJ SOT109-1 076E07S MS-012AC f--} eon oe 9Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E pA] pin 1 index of uf Hut i a. \ } / 2. EPO | (Az) 14 detail X I p 0 2.5 5mm | a scale DIMENSIONS (mm are the original dimensions) A UNIT | ay | Ar | Ae | As | Bp e | DO} EM) e | He] L Lp | Q v w y | Zz] 6 0.21 0.38 | 0.20 6.4 5.4 79 1.03 0.9 1.00 8 mm | 20 | 0.05 25 | o25 | 0.09] 60 | 52 | 8 | 76 | 125] 083] 07 | OF | OTF} 1 | O55 | oe Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC EIAJ PROJECTION 94-04-14 SOT338-1 MO-150AC --} 38 02-04 1998 Sep 30 10Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 TSSOP{16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 IC y | hae He sp? RARAA ARE | Ap \ (Az) qe oP At ->\__t en] |< > te Cy! | | Ly 1 8 detail X - -! [seta X] p 0 2.5 5mm bye ft scale DIMENSIONS (mm are the original dimensions) A 1 2 1 UNIT | wax | At | Az | As | bp | | DM] E@) |) e | He | L | Lp | @ v w y | zZM]) 6 0.15 | 0.95 0.30 0.2 54 4.5 6.6 0.75 0.4 0.40 8 mm |} 1-10 | 905 | 080 | 2] o19] 01 | 49 | 43 | F] 62 | 1 | oso} o3 | %F% | O13] Ot | oo | 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. REFERENCES VERSION PROJECTION | 'SSUEDATE IEC JEDEC EIAJ 04-07-42 SOT403-1 MO-153 --} 38 04.04 1998 Sep 30 11Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook !C26; Integrated Circuit Packages (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T sig max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO, SSOP and TSSOP REFLOW SOLDERING Reflow soldering techniques are suitable for all SO, SSOP and TSSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1998 Sep 30 Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C, WAVE SOLDERING Wave soldering can be used for all SO packages. Wave soldering is not recommended for SSOP and TSSOP packages, because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering is used - and cannot be avoided for SSOP and TSSOP packages - the following conditions must be observed: e A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. e The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions: e Only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). e Do not consider wave soldering TSSOP packages with 48 leads or more, that is TSSOP48 (SOT362-1) and TSSOP56 (SOT364-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74HC/HCT257 REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonally- opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, itis advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Sep 30 13