Backward-compatibility with Microchii’s 6G/3G SXP devices
High-Speed I/O
SAS-3 (12 Gbps, 6 Gbps, 3 Gbps, 1.5 Gbps) and SATA-3 (6
Gbps, 3 Gbps, 1.5 Gbps) operation
Support for up to 4K SAS addresses
Automated decision feedback equalizer (DFE) per SAS-3
Programmable continuous time linear equalizer for SATA-3
Supports spread-spectrum clocking (SSC) per SAS/SATA-3
Per-PHY configurable transmit and receive SSC
Per-PHY programmable transmit amplitude and emphasis
Integrated resistive termination
SAS 3.0-compliant back-channel training (SAS3 speed
negotiation)
Peripheral Interfaces
4 UART interfaces for system monitoring and debugging
4 SGPIO interfaces (or additional TWI per SFF-8448)
Up to 62 GPIO pins
Eight dedicated two-wire interfaces (up to twelve total) for
device configuration and control of external interfaces
SPI, DSPI, and QSPI interface
JTAG and EJTAG interface
Statistics and Performance Monitoring
Per-port error counters for comprehensive diagnostic
capability
Programmable PMON counters and interrupt generation
Per-link PRBS and CJPAT pattern generators and loop-backs
for linkintegrity diagnostics
Real-time clock
Firmware Development Kit
Zoning configuration interface
SAM4/SPC4/SES3-compatible SES target with Enclosure
Management Application reference design
SAS-3-compatible protocol stack in virtual SAS/SMP port
SSP/STP Initiator API supports communication with SSP/STP
targets over SAS links
SMP routing management including topology discovery
Firmware download over multiple in-band and out-of-band
interfaces
Expander diagnostics API
Disk spin-up control and disk qualification API
Peripheral drivers for TWI, UART, SGPIO, and Ethernet
interfaces
Error detection, logging, and reporting