SO-720-LFC-HCA-350.0000 - Vectron International

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 1 of 7 Rev: 21 Jun 2006

SO-720

SAW Based Clock Oscillator

Features

• Industry Standard Package, 5.0 x 7.5 x 2.0 mm

• ASIC Technology For Ultra Low Jitter

0.100 ps-rms typical across 12 kHz to 20 MHz BW

0.120 ps-rms typical across 50 kHz to 80 MHz BW

• Output Frequencies from 150 MHz to 800 MHz

• 3.3 V Operation

• LV-PECL or LVDS Configuration with Fast Transition Times

• Complementary Outputs

• Output Disable Feature

• Improved Temperature Stability over Standard SAW XO

Product is free of lead and compliant to

EC RoHS Directive

Applications

Reference Clock for Wired and Wireless Products

Description Standard

• 1-2-4 Gigabit Fibre Channel INCITS 352-2002

• 10 Gigabit Fibre Channel INCITS 364-2003

• 10GbE LAN / WAN IEEE 802.3ae

• OC-192 ITU-T G.709

• SONET / SDH GR-253-CORE Issue3

Description

The SO-720 is a SAW Based Clock Oscillator that achieves

low phase noise and very low jitter performance.

The SO-720 is housed in an industry standard 6-Pad leadless

ceramic package that is hermetically sealed. Packaging

options include bulk or tape and reel.

SO-720 SAW Clock Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 2 of 7 Rev: 21 Jun 2006

Electrical Performance

Parameter Symbol Minimum Typical Maximum Units Notes

Frequency

Nominal Frequency

Frequency Stability (Ordering Option)

Aging

fN

fSTAB

150

±50, ±100

800

10

MHz

ppm

1,2

6,8

Supply

Voltage

Current (No Load)

VCC

ICC

2.97

3.3

55

3.63

70

V

mA

2,3

3

Outputs

Mid Level - LVPECL

Swing – LVPECL

Mid Level - LVDS

Swing – LVDS

Current

Rise Time

Fall Time

Symmetry

Jitter (12 kHz – 20 MHz BW) 622.08 MHz

Jitter (50 kHz – 80 MHz BW) 622.08 MHz

IOUT

tR

tF

SYM

φJ

Vcc-1.4

450

VCC-2.4

250

45

Vcc-1.25

600

Vcc-2.3

350

50

0.100

0.120

Vcc-1.0

750

VCC-2.5

450

20

500

55

0.250

0.300

V

mV-pp

V

mV-pp

mA

ps

%

ps-rms

2,3

6

5,6

2,3

6,7

Period Jitter, RMS (622.08 MHz) φJ 2.5 3.0 ps-rms 9

Period Jitter, Peak - Peak (622.08 MHz) φJ 16 24 ps pk-pk 9

Operating Temp. (Ordering Option) TOP 0/70,-20/70 or -40/85 °C 1

Package Size 5.0 x 7.5 x 2.0 mm

1. See Standard Frequencies and Ordering Information (Pg 7).

2. Parameters are tested with production test circuit below (Fig 1).

3. Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.

4. Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.

5. Measured from 20% to 80% of a full output swing (Fig 2).

6. Not tested in production, guaranteed by design, verified at qualification.

7. Integrated across stated bandwidth per GR-253-CORE Issue3.

8. Aging Rate for 10 years (Aging is not part of overall frequency stability budget unless specified at time of order)

9. Broadband Period Jitter measured using Lecroy Wavemaster 8600A 6 GHz Oscilloscope, 250K samples taken.

Figure 1. Test Circuit Figure 2. 10K LV-PECL Waveform

Vcc - 1.6V

Vcc - 1.3V

Vcc - 1.0V

80%

20%

t

R

t

F

t

A

t

B

SYM = 100 x t

A

/

t

B

1

2

3

6

5

4

50Ω

Test Circuit Notes:

1) To Permit 50Ω Measurement of Outputs, all DC Inputs are Biased Down 1.3V.

2) All Voltage Sources Contain Bypass Capacitors to Minimize Supply Noise.

3) 50Ω Terminations are Within Test Equipment.

(-1.3V, +2.0V)

No connect

(-1.3V)

(+2.0V)

COutput

Output

Enable, Disable

SO-720 SAW Clock Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 3 of 7 Rev: 21 Jun 2006

Outline Diagram Suggested Pad Layout

Pin Out

Pin Symbol Function

1 NC or

OE1

NC or

Enable = LV-CMOS Logic 0 or Ground

Disabled = LV-CMOS Logic 1

2 OE1 or

NC

NC or

Enable = LV-CMOS Logic 0 or Ground

Disabled = LV-CMOS Logic 1

3 GND Case and Electrical Ground

4 Output Output

5 COutput Complementary Output

6 VCC Power Supply Voltage (+3.3V ± 10%)

Note 1: For proper operation, chosen disable pin can not be left floating and a pin 1 or pin 2 enable option must be ordered

See page 7 for alternative input logic option

Tape and Reel (EIA-481-2-A)

Tape Dimensions (mm) Reel Dimensions (mm)

Dimension W F Do Po P1 A B C D N W1 W2 # Per

Tolerance Typ Typ Typ Typ Typ Typ Min Typ Min Min Typ Max Reel

SO-720 16 7.5 1.5 4 8 178 1.5 13 20.2 50 16.4 22.4 200

Po

W A

N

F

P1 W1

W2

C

B

D

ØDo

mm

[inch]

5.08

[0.200]

2.54

[0.100]

1.78

[0.070]

3.66

[0.144]

1.96

[0.077]

SO-720 SAW Clock Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 4 of 7 Rev: 21 Jun 2006

Absolute Maximum Ratings

Parameter Symbol Ratings Unit

Power Supply VCC 0 to 4 V

Output Current Iout 25 mA

Storage Temperature TS -55 to 125 °C

Soldering Temp/Time TLS 260 / 40 °C/sec

Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation

is not implied at these or any other conditions in excess of conditions represented in the operational sections of

this datasheet. Exposure to absolute maximum ratings for extended periods may adversely affect device

reliability. Permanent damage is also possible if OD is applied before Vcc.

Suggested Output Load Configurations

43

240Ω

0.01 µF

16

2

Gnd

N/C 5

OD

0.10 µF+3.3V

240Ω

100Ω

Z = 50Ω

COutput

Vcc

Output

Gnd

OD

N/C

Output

240Ω

34

240Ω

COutput

2

1

5

6Vcc

0.01 µF

0.10 µF+3.3V

N/C

-1.3V

COutput

Output

43

25

OD

0.01 µF

16

Vcc

0.10 µF+2.0V

LV-P E CL to LV-P ECL: For short transmission lengths, the power

consumption could be reduced by removing the 100Ω resistor and

doubling the value of the pull down resistors.

Functional Test: Allows standard power supply configuration.

Since AC coupled, the LV-PECL levels cannot be measured.

LV-PECL to LVDS: Restricted for short transmission lengths.

Configuration may require modification depending on LVDS receiver.

Gnd 3Output

4Z = 50Ω

+3.3V

COutput

N/C

OD

2

1

5

Vcc

6

0.01 µF

0.10 µF

Z = 50Ω

40Ω40Ω

150Ω150Ω

49Ω49Ω

+3.3V

Production Test: Allows direct DC coupling into 50Ω measurement

equipment. Must bias the power supplys as shown. Similar to Figure 1.

0.01 µF

SO-720 SAW Clock Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 5 of 7 Rev: 21 Jun 2006

Typical Phase Noise

SO-720-LFF-GAA- 622. 0800 MHz

-160

-150

-140

-130

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

10 100 1000 10000 100000 1000000 10000000 100000000

Frequency Offset (Hz)

Phase Noise Level (dBc/Hz)

Phase Noise at Specif i c F requency

Offsets

10Hz -46 dBc/Hz

100Hz -80 dBc/Hz

1000Hz -110 dBc/Hz

10kHz -130 dBc/Hz

100kHz -134 dBc/Hz

1MHz -138 dB c/ Hz

10MHz -147 dBc/Hz

20MHz -147 dBc/Hz

40MHz -148 dBc/Hz

Jitter OC48 (12kHz to 20MHz)

0.08 ps-rms o r 0. 56 p s-pp

Jitter OC192 (50kHz to 80MHz )

0.11 ps- rms or 0. 80 p p-rms

SO-720 SAW Clock Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 6 of 7 Rev: 21 Jun 2006

The device is designed to meet the JEDEC standard

for Pb-Free assembly. The temperatures and time

intervals listed are based on the Pb-Free small body

requirements. The SO-720 device is hermetically

sealed so an aqueous wash is not an issue.

Termination Plating: Electroless Gold Plate over

Nickel Plate

25

217

200

150

260

Temperature (DegC)

Time (sec)

t S

t AMB-P

t L

t P

R UP

R DN

Reliability

VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and

IR reflow simulation. The SO-720 family is capable of meeting the following qualification tests:

Environmental Compliance

Parameter Conditions

Mechanical Shock MIL-STD-883, Method 2002

Mechanical Vibration MIL-STD-883, Method 2007

Solderability MIL-STD-883, Method 2003

Gross and Fine Leak MIL-STD-883, Method 1014

Resistance to Solvents MIL-STD-883, Method 2016

Handling Precautions

Although ESD protection circuitry has been designed into the SO-720 proper precautions should be taken when

handling and mounting. VI employs a Human Body model (HBM) and a Man-Man model (MM) for ESD

susceptibility testing and design protection evaluation.

ESD Ratings

Model Minimum Conditions

Human Body Model 1500 V MIL-STD 883, Method 3015

Man Man Model 200 V V/JESD22-A115-A,

Reflow Profile (IPC/JEDEC J-STD-020)

Parameter Symbol Value

PreHeat Time t S 60 sec Min, 180 sec Max

Ramp Up R UP 3

oC/sec Max

Time Above 217 oC t L 60 sec Min, 150 sec Max

Time To Peak Temperature t AMB-P 480 sec Max

Time At 260 oC t P 20 sec Min, 40 sec Max

Ramp Down R DN 6

oC/sec Max

SO-720 SAW Clock Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 7 of 7 Rev: 21 Jun 2006

Standard Output Frequencies (MHz)

*155.5200 *156.2500 *160.0000 *175.0000 *187.5000 *194.8000 *200.0000 *240.0000

*250.0000 *268.8000 300.0000 311.0400 312.5000 320.0000 350.0000 375.0000

389.6000 400.0000 480.0000 500.0000 531.2500 532.0000 533.0000 537.6000

600.0000 622.0800 625.0000 640.0000 644.5313 657.4219 666.5143 669.3266

672.1627 690.5692 693.4830 704.3806 707.3527 720.0000 768.0000 796.8750

Frequencies not shown are available upon request. *VCC6 is preferred XO for frequencies < 300 MHz

Revision Control

A 6/21/06 Vectron Prod. Mgt. Release of SO-720 Datasheet

Ordering Information

SO - 720 - L F F - G A A - xxx.xxx

Not All Combinations Possible For Additional Information, Please Contact:

Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice.

No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.

USA: Vectron International, 267 Lowell Rd, Hudson, NH 03051 . . . . Tel: 1-88-VECTRON-1 Fax: 1-888-FAX-VECTRON

EUROPE: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tel: +49 (0) 3328-4784-17 Fax: +49 (0) 3328-4784-30

ASIA: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tel: +86-21-28909740 Fax: +86-21-28909240

Product Family

SO = SO Based XO

Package

720 = 5.0 x 7.5 x 2.0 mm

6 Pad Ceramic SMD

Input

L = 3.3 Vdc ± 10%

Output

F = LVPECL (45/55% Symmetry)

P = LVDS (45/55% Symmetry)

Operating Temperature

C = 0°C to 70°C

D = -20ºC to 70ºC

F = -40°C to 85°C

Frequency

150 - 800 MHz

Enable/Disable Pin & Input Logic

A = Pin 2: Enable Low (or Gnd) / Disable High

B = Pin 2: Enable High (or Vcc) / Disable Low

C = Pin 1: Enable Low (or Gnd) / Disable High

D = Pin 1: Enable High (or Vcc) / Disable Low

Overall Stability Condition

A = Includes 10 years of aging at 40ºC

N = Excludes aging

Stability

G = ± 50 ppm maximum

H = ± 100 ppm maximum