MMBTA05LT1-D - ON Semiconductor

 Semiconductor Components Industries, LLC, 2002

May, 2002 – Rev. 2 1Publication Order Number:

MMBTA05LT1/D

MMBTA05LT1,

MMBTA06LT1

MMBTA06LT1 is a Preferred Device

Driver Transistors

NPN Silicon

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector–Emitter Voltage MMBTA05LT1

MMBTA06LT1

VCEO 60

Vdc

Collector–Base Voltage MMBTA05LT1

MMBTA06LT1

VCBO 60

Vdc

Emitter–Base V oltage VEBO 4.0 Vdc

Collector Current – Continuous IC500 mAdc

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Total Device Dissipation FR–5 Board

(Note 1) TA = 25°C

Derate above 25°C

PD225

1.8

mW/°C

Thermal Resistance,

Junction to Ambient RJA 556 °C/W

Total Device Dissipation Alumina

Substrate, (Note 2) TA = 25°C

Derate above 25°C

PD300

2.4

mW/°C

Thermal Resistance,

Junction to Ambient RJA 417 °C/W

Junction and Storage Temperature TJ, Tstg –55 to

+150 °C

1. FR–5 = 1.0  0.75  0.062 in.

2. Alumina = 0.4  0.3  0.024 in. 99.5% alumina.

Device Package Shipping

ORDERING INFORMATION

MMBTA05LT1 SOT–23

SOT–23

CASE 318

STYLE 6

3000/Tape & Reel

Preferred devices are recommended choices for future use

and best overall value.

MARKING DIAGRAMS

1H X

MMBTA05LT1

COLLECTOR

BASE

EMITTER

1GM X

MMBTA06LT1

MMBTA06LT1 SOT–23 3000/Tape & Reel

http://onsemi.com

1H, 1GM = Specific Device Code

X = Date Code

MMBTA05LT1, MMBTA06LT1

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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Collector–Emitter Breakdown Voltage (Note 3)

(IC = 1.0 mAdc, IB = 0) MMBTA05

MMBTA06

V(BR)CEO 60

80 –

–

Vdc

Emitter–Base Breakdown Voltage

(IE = 100 Adc, IC = 0) V(BR)EBO 4.0 – Vdc

Collector Cutoff Current

(VCE = 60 Vdc, IB = 0) ICES – 0.1 Adc

Collector Cutoff Current

(VCB = 60 Vdc, IE = 0) MMBTA05

(VCB = 80 Vdc, IE = 0) MMBTA06

ICBO –

–0.1

0.1

Adc

ON CHARACTERISTICS

DC Current Gain

(IC = 10 mAdc, VCE = 1.0 Vdc)

(IC = 100 mAdc, VCE = 1.0 Vdc)

hFE 100

100 –

–

Collector–Emitter Saturation Voltage

(IC = 100 mAdc, IB = 10 mAdc) VCE(sat) – 0.25 Vdc

Base–Emitter On Voltage

(IC = 100 mAdc, VCE = 1.0 Vdc) VBE(on) – 1.2 Vdc

SMALL–SIGNAL CHARACTERISTICS

Current–Gain – Bandwidth Product (Note 4)

(IC = 10 mA, VCE = 2.0 V, f = 100 MHz) fT100 – MHz

3. Pulse Test: Pulse Width  300 s, Duty Cycle  2.0%.

4. fT is defined as the frequency at which |hfe| extrapolates to unity.

Figure 1. Switching Time Test Circuits

OUTPUT

TURN-ON TIME

-1.0 V VCC

+40 V

* CS  6.0 pF

100

Vin

5.0 F

tr = 3.0 ns

+10 V

5.0 s

OUTPUT

TURN-OFF TIME

+VBB VCC

+40 V

* CS  6.0 pF

100

Vin

5.0 F

tr = 3.0 ns

5.0 s

*Total Shunt Capacitance of Test Jig and Connectors

For PNP Test Circuits, Reverse All Voltage Polarities

MMBTA05LT1, MMBTA06LT1

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Figure 2. Current–Gain — Bandwidth Product Figure 3. Capacitance

Figure 4. Switching Time

100 2002.0

IC, COLLECTOR CURRENT (mA)

300

200

100

10 1000.1

VR, REVERSE VOLTAGE (VOLTS)

8.0

VCE = 2.0 V

TJ = 25°C

3.0 5.0 7.0 10 20 30 50 70

fT, CURRENT-GAIN - BANDWIDTH PRODUCT (MHz)

501.0 2.0 5.00.2 0.5

6.0

4.0

Cibo

Cobo

2010

IC, COLLECTOR CURRENT (mA)

200

100

10 100

t, TIME (ns)

50 200 500

1.0 k

500

VCC = 40 V

IC/IB = 10

IB1 = IB2

TJ = 25°C

5.0 7.0

300

700

30 70

td @ VBE(off) = 0.5 V

C, CAPACITANCE (pF)

300

Figure 5. DC Current Gain

2.0 5000.5

IC, COLLECTOR CURRENT (mA)

400

200

100

, DC CURRENT GAIN

TJ = 125°C

1.0 3.0 5.0

VCE = 1.0 V

20 10030 50 200 300

hFE

25°C

-55°C

Figure 6. “ON” Voltages

10 5001.0

IC, COLLECTOR CURRENT (mA)

1.0

0.8

0.6

0.4

0.2

100

TJ = 25°C

V, VOLTAGE (VOLTS)

VBE(sat) @ IC/IB = 10

VCE(sat) @ IC/IB = 10

VBE(on) @ VCE = 1.0 V

0.5 2.0 5.0 20020 50

MMBTA05LT1, MMBTA06LT1

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Figure 7. Collector Saturation Region Figure 8. Base–Emitter Temperature

Coefficient

100 5000.5

IC, COLLECTOR CURRENT (mA)

-0.8

-1.2

-1.6

-2.0

-2.4

-2.8

0.1 100.05

IB, BASE CURRENT (mA)

1.0

0.8

0.6

0.4

0.2

1.0

TJ = 25°C

RVB , TEMPERATURE COEFFICIENT (mV/ C)

RVB for VBE

°

IC =

100 mA

IC =

50 mA

IC =

250 mA

IC =

500 mA

IC =

10 mA

, COLLECTOR-EMITTER VOLTAGE (VOLTS)VCE

1.0 2.0 5.0 20 50 200202.0 5.00.2 0.5

MMBTA05LT1, MMBTA06LT1

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INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must

be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

SOT–23

inches

0.037

0.95

0.037

0.95

0.079

2.0

0.035

0.9

0.031

0.8

SOT–23 POWER DISSIPATION

The power dissipation of the SOT–23 is a function of the

pad size. This can vary from the minimum pad size for

soldering to a pad size given for maximum power

dissipation. Power dissipation for a surface mount device is

determined by TJ(max), the maximum rated junction

temperature o f the die, RθJA, the thermal resistance from t h e

device junction to ambient, and the operating temperature,

TA. Using the values provided on the data sheet for the

SOT–23 package, PD can be calculated as follows:

PD = TJ(max) – TA

RθJA

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature TA of 25°C, one can

calculate the power dissipation of the device which in this

case is 225 milliwatts.

PD = 150°C – 25°C

556°C/W = 225 milliwatts

The 556°C/W for the SOT–23 package assumes the use of

the recommended footprint on a glass epoxy printed circuit

board to achieve a power dissipation of 225 milliwatts.

There are other alternatives to achieving higher power

dissipation from the SOT–23 package. Another alternative

would be to use a ceramic substrate or an aluminum core

board such as Thermal Clad. Using a board material such

as Thermal Clad, an aluminum core board, the power

dissipation can be doubled using the same footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within

a short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

•Always preheat the device.

•The delta temperature between the preheat and soldering

should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering method,

the difference shall be a maximum of 10°C.

•The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the maximum

temperature gradient shall be 5°C or less.

•After soldering has been completed, the device should be

allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and result

in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied during

cooling.

* Soldering a device without preheating can cause

excessive thermal shock and stress which can result in

damage to the device.

MMBTA05LT1, MMBTA06LT1

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PACKAGE DIMENSIONS

CASE 318–08

ISSUE AH

SOT–23 (TO–236)

DIM

MIN MAX MIN MAX

MILLIMETERS

0.1102 0.1197 2.80 3.04

INCHES

B0.0472 0.0551 1.20 1.40

C0.0350 0.0440 0.89 1.11

D0.0150 0.0200 0.37 0.50

G0.0701 0.0807 1.78 2.04

H0.0005 0.0040 0.013 0.100

J0.0034 0.0070 0.085 0.177

K0.0140 0.0285 0.35 0.69

L0.0350 0.0401 0.89 1.02

S0.0830 0.1039 2.10 2.64

V0.0177 0.0236 0.45 0.60

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD

FINISH THICKNESS. MINIMUM LEAD THICKNESS

IS THE MINIMUM THICKNESS OF BASE

MATERIAL.

4. 318-03 AND -07 OBSOLETE, NEW STANDARD

318-08.

STYLE 6:

PIN 1. BASE

2. EMITTER

3. COLLECTOR

MMBTA05LT1, MMBTA06LT1

http://onsemi.com

Notes

MMBTA05LT1, MMBTA06LT1

http://onsemi.com

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make

changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all

liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be

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PUBLICATION ORDERING INFORMATION

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2700

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local

Sales Representative.

MMBTA05LT1/D

Thermal Clad is a registered trademark of the Bergquist Company.

Literature Fulfillment:

Literature Distribution Center for ON Semiconductor

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Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada

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