2SK1623(S) - Renesas Electronics

2SK1623(L), 2SK1623(S)

Silicon N-Channel MOS FET

ADE-208-1299 (Z)

1st. Edition

Mar. 2001

Application

High speed power switching

Features

• Low on-resistance

• High speed switching

• 4 V gate drive device

 Can be driven from 5 V source

• Suitable for motor drive, DC-DC converter, power switch and solenoid drive

Outline

LDPAK

1. Gate

2. Drain

3. Source

4. Drain

2SK1623(L), 2SK1623(S)

Absolute Maximum Ratings (Ta = 25°C)

Item Symbol Ratings Unit

Drain to source voltage V(BR)DSS 100 V

Gate to source voltage VGSS ±20 V

Drain current ID20 A

Drain peak current ID(pulse)*180 A

Body to drain diode reverse drain current IDR 20 A

Channel dissipation Pch*250 W

Channel temperature Tch 150 °C

Storage temperature Tstg –55 to +150 °C

Notes 1. PW 10 µs, duty cycle 1%

2. Value at TC = 25°C

2SK1623(L), 2SK1623(S)

Electrical Characteristics (Ta = 25°C)

Item Symbol Min Typ Max Unit Test conditions

Drain to source breakdown

voltage V(BR)DSS 100 — — V ID = 10 mA, VGS = 0

Gate to source breakdown

voltage V(BR)GSS ±20 — — V IG = ±100 µA, VDS = 0

Gate to source leak current IGSS — — ±10 µA VGS = ±16 V, VDS = 0

Zero gate voltage drain current IDSS — — 250 µA VDS = 80 V, VGS = 0

Gate to source cutoff voltage VGS(off) 1.0 — 2.0 V ID = 1 mA, VDS = 10 V

Static Drain to source on state RDS(on) — 0.065 0.085 ID = 10 A, VGS = 10 V *1

resistance — 0.085 0.12 ID = 10 A, VGS = 4 V *1

Forward transfer admittance |yfs| 10 16 — S ID = 10 A, VDS = 10 V *1

Input capacitance Ciss — 1300 — pF VDS = 10 V, VGS = 0,

Output capacitance Coss — 540 — pF f = 1 MHz

Reverse transfer capacitance Crss — 160 — pF

Turn-on delay time td(on) — 12 — ns ID = 10 A, VGS = 10 V,

Rise time tr— 100 — ns RL = 3

Turn-off delay time td(off) — 300 — ns

Fall time tf— 150 — ns

Body to drain diode forward

voltage VDF — 1.3 — V IF = 20 A, VGS = 0

Body to drain diode reverse

recovery time trr — 300 — ns IF = 20 A, VGS = 0,

diF/dt = 50 A/µs

Note 1. Pulse test

See characteristic curves of 2SK1302.

2SK1623(L), 2SK1623(S)

0 50 100 150

Case Temperature TC (°C)

Power vs. Temperature Derating

Channel Dissipation Pch (W)

2SK1623(L), 2SK1623(S)

Package Dimensions

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

LDPAK (L)

—

1.4 g

10.2 ± 0.3

0.86

0.76 ± 0.1

2.54 ± 0.5

+ 0.2

– 0.1

1.2 ± 0.2

4.44 ± 0.2

1.3 ± 0.15

2.59 ± 0.2

0.4 ± 0.1

11.0 ± 0.5

8.6 ± 0.3

10.0

11.3 ± 0.5

+ 0.3

– 0.5

(1.4)

1.27 ± 0.2

As of January, 2001

Unit: mm

2SK1623(L), 2SK1623(S)

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

LDPAK (S)-(1)

—

1.3 g

10.2 ± 0.3

1.27 ± 0.2

(1.5)

(1.4)

8.6 ± 0.3

10.0 + 0.3

– 0.5

4.44 ± 0.21.3 ± 0.15

0.1 + 0.2

– 0.1

0.4 ± 0.1

0.86 + 0.2

– 0.1

2.54 ± 0.5

1.2 ± 0.2

3.0+ 0.3

– 0.5

(1.5)

7.8

6.6

2.2

1.7

7.8

7.0

As of January, 2001

Unit: mm

2SK1623(L), 2SK1623(S)

Hitachi Code

JEDEC

EIAJ

Mass

(reference value)

LDPAK (S)-(2)

—

1.35 g

10.2 ± 0.3

1.27 ± 0.2

(1.5)

(1.4)

8.6 ± 0.3

10.0 + 0.3

– 0.5

4.44 ± 0.21.3 ± 0.2

0.1 + 0.2

– 0.1

0.4 ± 0.1

0.86 + 0.2

– 0.1

2.54 ± 0.5

1.2 ± 0.2

5.0+ 0.3

– 0.5

(1.5)

7.8

6.6

2.2

1.7

7.8

7.0

As of January, 2001

Unit: mm

2SK1623(L), 2SK1623(S)

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received the latest product standards or specifications before final design, purchase or use.

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for maximum rating, operating supply voltage range, heat radiation characteristics, installation

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beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable

failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-

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