SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators April 2012 Rev. 2.0.0 GENERAL DESCRIPTION APPLICATIONS The SP6203 and SP6205 are ultra low noise CMOS LDOs with very low dropout and ground current. The noise performance is achieved by means of an external bypass capacitor without sacrificing turn-on and turn-off speed critical to portable applications. Extremely stable and easy to use, these devices offer excellent PSRR and Line/Load regulation. Target applications include battery-powered equipment such as portable and wireless products. Regulators' ground current increases only slightly in dropout. Fast turn-on/turn-off enable control and an internal 30 pull down on output allows quick discharge of output even under no load conditions. Both LDOs are protected with current limit and thermal shutdown. Both LDOs are available in fixed & adjustable output voltage versions and come in an industry standard 5-pin SOT-23 and small 2X3mm 8-pin DFN packages. For SC-70 100mA CMOS LDO, SP6213 is available. Battery-Powered Systems Medical Equipments MP3/CD Players Digital Cameras FEATURES 300mA/500mA Output Current SP6203: 300mA - SP6205: 500mA Low Dropout Voltage: 0.6 PMOS FET 2.7V to 5.5V Input Voltage Fixed and Adjustable Output Voltage Accurate Output Voltage: 2% over Temp. 67dB Power Supply Rejection Ratio 12VRMS Low Output Noise Unconditionally Stable with 2.2F Ceramic Low Quiescent Current: 5A Low Ground Current: 350A at 500mA Fast Turn-On and Turn-Off: 60S Very Good Load/Line Regulation: 0.07/0.0 % Current Limit and Thermal Protection RoHS Compliant "Green"/Halogen Free 5-Pin SOT23 and 8-Pin DFN Packages TYPICAL APPLICATION DIAGRAM Fig. 1: SP6203/SP6205 Application Diagram Exar Corporation 48720 Kato Road, Fremont CA 94538, USA www.exar.com Tel. +1 510 668-7000 - Fax. +1 510 668-7001 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators ABSOLUTE MAXIMUM RATINGS OPERATING RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Input Voltage Range VIN .......................... +2.7V to +5.5V Enable Input Voltage VEN................... ...............0 to 5.5V Junction Temperature Range ................. -40C to +125C Thermal Resistance ...................................................... SOT-23-5 (JA) .............................................191C/W DFN-8 (JA) ................................................... 59C/W VIN .............................................................. -2V to 6.0V Output Voltage VOUT ...............................-0.6V to VIN +1V Enable Input Voltage VEN................ .. ...............-2V to 6V Storage Temperature .............................. -65C to 150C Power Dissipation ............................... Internally Limited1 Lead Temperature (Soldering, 5 sec) ................... +260C Junction Temperature ........................................ +150C Note 1: Maximum power dissipation can be calculated using the formula: PD = (TJ(max) - TA) / JA, where TJ(max) is the junction temperature, TA is the ambient temperature and JA is the junction-to-ambient thermal resistance. JC is 6C/W for this package. Exceeding the maximum allowable power dissipation will result in excessive die temperature and the regulator will go into thermal shutdown mode. ELECTRICAL SPECIFICATIONS Specifications with standard type are for an Operating Junction Temperature of T J = 25C only; limits applying over the full Operating Junction Temperature range are denoted by a "*". Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T J = 25C, and are provided for reference purposes only. Unless otherwise indicated, V IN = (VOUT + 0.5V) to 6V, CIN = 2.2F, COUT = 2.2F and IOUT = 100A, TJ= -40C to 85C. Parameter Min. Typ. Input Voltage Output Voltage -2 Output Voltage Temperature Coefficient 1.225 Line Regulation Load Regulation 3 Dropout Voltage for VOUT 3.0V4 Ground Pin Current 5 Shutdown Supply Current 0.33 0.55 Thermal Shutdown Junction Temperature V * +2 % * Conditions ppm/C 1.25 1.275 V 0.04 0.3 %/V 0.07 0.13 0.06 60 120 180 300 0.3 0.5 % 45 110 175 235 350 Current Limit Units 6 50 2 Reference Voltage Max. 300 500 mV A 330 490 0.01 1 0.50 0.85 0.8 1.4 170 VOUT/T * A A Adjustable version only VOUT (VIN below 6V) IOUT = 0.1mA to 300mA (SP6203) IOUT = 0.1mA to 500mA (SP6205) IOUT IOUT IOUT IOUT IOUT = = = = = 0.1mA 100mA 200mA 300mA (SP6203) 500mA (SP6205) * * IOUT IOUT IOUT IOUT IOUT = = = = = 0.1mA (IQUIESCENT) 100mA 200mA 300mA (SP6203) 500mA (SP6205) * VEN < 0.4V (shutdown) * * * 100 Variation from specified V OUT VOUT = 0V (SP6203) VOUT = 0V (SP6205) C Regulator Turns off Thermal Shutdown Hysteresis 12 C Regulator turns on again at 158C Power Supply Rejection Ratio 67 dB f1kHz Output Noise Voltage Thermal Regulation 6 7 150 630 12 50 Wake-Up Time (TWU) (from shutdown mode) (c) 2012 Exar Corporation 25 %/W VOUT/PD 75 0.05 8 VRMS CBYP CBYP CBYP CBYP 50 2/14 S = = = = 10nF, 10nF, 10nF, 10nF, IOUT IOUT IOUT IOUT = = = = 0.1mA 300mA 0.1mA 300mA VIN 4V 10 IOUT = 30mA Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators Parameter Min. Turn-On Time (TON) 9 (from shutdown mode) Turn-Off Time (TOFF) Output Discharge Resistance Max. Units Conditions 60 120 S VIN 4V 10 IOUT = 30mA 100 15 250 25 S IOUT = 0.1mA, VIN 4V 10 IOUT = 300mA, VIN 4V 10 30 Enable Input Logic Low Voltage Enable Input Logic High Voltage Typ. 0.4 1.6 No Load V * Regulator Shutdown V * Regulator Enabled Note 2: Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Note 3: Regulation is measured at constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Note 4: Dropout-voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Note 5: Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 6: Output noise voltage is defined within a certain bandwidth, namely 10Hz < BW < 100kHz. An external bypass cap (10nF) from reference output (BYP pin) to ground significantly reduces noise at output. Note 7: Thermal regulation is defined as the change in output voltage at a time "t" after a change in power dissipation is applied, excluding load and line regulation effects. Specifications are for a 300mA load pulse at V IN = 6V for t = 1ms. Note 8: The wake-up time (TWU) is defined as the time it takes for the output to start rising after enable is brought high. Note 9: The total turn-on time is called the settling time (T S), which is defined as the condition when both the output and the bypass node are within 2% of their fully enabled values when released from shutdown. Note 10: For output voltage versions requiring V IN to be lower than 4V, timing (TON & TOFF) increases slightly. BLOCK DIAGRAM Fig. 2: SP6203/SP6205 Functional Diagram (c) 2012 Exar Corporation 3/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators PIN ASSIGNMENT 5-Pin SOT23 8-Pin DFN Fig. 3: SP6203/SP6205 Pin Assignment PIN DESCRIPTION Name SOT-23-5 VIN 1 Power Supply Input GND 2 Ground Terminal EN 3 Enable/Shutdown - Logic high = enable - Logic low = shutdown BYP/ADJ 4 VOUT 5 Name DFN-8 Description Bypass - Fixed voltage option: Reference bypass input for ultra-quiet operation. Connecting a 10nF cap on this pin reduces output noise. Adjustable Input - Adjustable voltage option: Adjustable regulator feedback input. Connect to a resistive voltageDivider network. Regulator Output Voltage Description Regulator Output Voltage - Fixed voltage option: Connect to Pin 8 VOUT. VOUT/ADJ 1 Adjustable Input - Adjustable voltage option: Adjustable regulator feedback input. Connect to a resistive voltageDivider network. Bypass - Fixed voltage option: Reference bypass input for ultra-quiet operation. Connecting a 10nF cap on this pin reduces output noise. BYP/NC 2 GND 3 Ground Terminal EN 4 Enable/Shutdown - Logic high = enable - Logic low = shutdown VIN 5 Power Supply Input NC 6 No Connect NC 7 No Connect VOUT 8 Regulator Output Voltage No Connect - Adjustable voltage option. (c) 2012 Exar Corporation 4/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators ORDERING INFORMATION Part Number Ambient Temperature Range SP6203EM5-L SP6203EM5-L-2-5 SP6203EM5-L-2-8 SP6203EM5L-2-85 H2WW SP6203EM5-L-3-3 SP6203ER-L -40CTA+125C SP6203ER-L-1-8 SP6205EM5-L SP6205EM5-L-1-8 SP6205EM5-L-2-5 2.5K/Tape & Reel Bulk -40CTA+125C SP6205EM5-L-2-85 E3WW SP6205EM5-L-3-0 Bulk 2.5K/Tape & Reel Bulk 2.5K/Tape & Reel Bulk 2.5K/Tape & Reel SOT-23-5 SP6205EM5-L-3-3 Bulk Bulk 2.5K/Tape & Reel Bulk T2WW SP6205EM5-L-3-3/TR SP6205ER-L -40CTA+125C SP6205ER-L-2-5/TR F0 YWW XXX G0 YWW XXX Bulk 2.5K/Tape & Reel 2.5K/Tape & Reel W2WW SP6205EM5-L-3-0/TR Bulk 3K/Tape & Reel S2WW SP6205EM5-L-2-85/TR 3K/Tape & Reel DFN8 V2WW SP6205EM5-L-2-5/TR SP6205ER-L-2-5 Bulk X2WW SP6205EM5-L-1-8/TR SP6205ER-L/TR Bulk A3WW SP6205EM5-L/TR SP6205EM5-L-2-8/TR D0 YWW XXX E0 YWW XXX Bulk 2.5K/Tape & Reel J2WW SP6203EM5-L-3-3/TR 2.5K/Tape & Reel 2.5K/Tape & Reel M2WW SP6203EM5-L-3-0/TR SP6205EM5-L-2-8 Bulk SOT-23-5 -40CTA+125C SP6203EM5-L-3-0 SP6203ER-L-1-8 Bulk 2.5K/Tape & Reel Q3WW SP6203EM5L-2-85/TR SP6203ER-L/TR Bulk 2.5K/Tape & Reel L2WW SP6203EM5-L-2-5/TR Packing Quantity Package Q2WW SP6203EM5-L/TR SP6203EM5-L-2-8/TR Marking 2.5K/Tape & Reel Voltage Option Note 1 ADJ Halogen Free 2.5V Halogen Free 2.8V Halogen Free 2.85V Halogen Free 3.0V Halogen Free 3.3V Halogen Free ADJ Halogen Free 1.8V Halogen Free ADJ Halogen Free 1.8V Halogen Free 2.5V Halogen Free 2.8V Halogen Free 2.85V Halogen Free 3.0V Halogen Free 3.3V Halogen Free ADJ Halogen Free 2.5V Halogen Free Bulk DFN8 3K/Tape & Reel Bulk 3K/Tape & Reel "Y" = Year - "WW" = Work Week - "X" = Lot Number; when applicable. (c) 2012 Exar Corporation 5/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators TYPICAL PERFORMANCE CHARACTERISTICS All data taken at V IN = 2.7V to 5.5V, TJ = TA = 25C, unless otherwise specified - Schematic and BOM from Application Information section of this datasheet. Fig. 4: Current Limit Fig. 5: Turn-On Time, RLOAD=50 (60mA) Fig. 6: Turn-Off Time, RLOAD=6 (500mA) Fig. 7: Turn-Off Time, RLOAD=30K (0.1mA) Fig. 8: Load Regulation, IO=100A ~500mA Fig. 9: Regulation, Line Step from 4V to 6V, IO=1mA (c) 2012 Exar Corporation 6/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators Fig. 10: Start Up Waveform, VIN=3.5V, IO=500mA Fig. 11: Start Up Waveform, Slow VIN , No Load Fig. 12: Start Up Waveform, Slow V IN, 500mA Output Load Fig. 13: Start Up Waveform, Slow V IN, COUT=1000F, IO=0mA Fig. 14: Start Up Waveform, Slow V IN, COUT=1000F, IO=500mA Fig. 15: Fast VIN, No Load (c) 2012 Exar Corporation 7/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators Fig. 16: Fast VIN, 500mA Output Load Fig. 17: Fast VIN = 1000F Output Load Fig. 18: Fast VIN , COUT=1000F, IO=500mA Fig. 19: Output Noise, CBYP = 10nF (c) 2012 Exar Corporation Fig. 20: Output Noise, CBYP = open 8/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators THEORY OF OPERATION OUTPUT CAPACITOR An output capacitor is required between VOUT and GND to prevent oscillation. A 2.2F output capacitor is recommended. GENERAL OVERVIEW The SP6203/6205 is intended for applications where very low dropout voltage, low supply current and low output noise are critical, even with high load conditions (500mA maximum). Unlike bipolar regulators, the SP6203/6205 (CMOS LDO) supply current increases only slightly with load current. Larger values make the chip more stable which means an improvement of the regulator's transient response. Also, when operating from other sources than batteries, supply-noise rejection can be improved by increasing the value of the input and output capacitors and using passive filtering techniques. The SP6203/6205 contains an internal bandgap reference which is fed into the inverting input of the LDO-amplifier. The output voltage is then set by means of a resistor divider and compared to the bandgap reference voltage. The error LDO-amplifier drives the gate of a P-channel MOSFET pass device that has a RDS(ON) of 0.6 at 500mA producing a 300mV drop at the output. For a lower output current, a smaller output capacitance can be chosen. Finally, the output capacitor should have an effective series resistance (ESR) of 0.5 or less. Therefore, the use of good quality ceramic or tantalum capacitors is advised. Furthermore, the SP6203/6205 has its own current limit circuitry (500mA/850mA) to ensure that the output current will not damage the device during output short, overload or start-up. BYPASS CAPACITOR A bypass pin (BYP) is provided to decouple the bandgap reference. A 10nF external capacitor connected from BYP to GND reduces noise present on the internal reference, which in turn significantly reduces output noise and also improves power supply rejection. Note that the minimum value of COUT must be increased to maintain stability when the bypass capacitor is used because CBYP reduces the regulator phase margin. If output noise is not a concern, this input may be left unconnected. Larger capacitor values may be used to further improve power supply rejection, but result in a longer time period (slower turn on) to settle output voltage when power is initially applied. Also, the SP6203/6205 includes thermal shutdown circuitry to turn off the device when the junction temperature exceeds 170C and it remains off until the temperature drops by 12C. ENABLE/SHUTDOWN OPERATION The SP6203/6205 is turned off by pulling the VEN pin below 0.4V and turned on by pulling it above 1.6V. If this enable/shutdown feature is not required, it should be tied directly to the input supply voltage to keep the regulator output on at all time. While in shutdown, VOUT quickly falls to zero (turn-off time is dependent on load conditions and output capacitance on VOUT) and power consumption drops nearly to zero. NO LOAD STABILITY The SP6203/6205 will remain stable and in regulation with no external load (other than the internal voltage driver) unlike many other voltage regulators. This is especially important in CMOS RAM battery back-up applications. INPUT CAPACITOR A small capacitor of 2.2F is required from V IN to GND if a battery is used as the power source. Any good quality electrolytic, ceramic or tantalum capacitor may be used at the input. (c) 2012 Exar Corporation TURN ON TIME The turn on response is split up in two separate response categories: the wake up 9/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators time (TWU) and the settling time (TS). The wake up time is defined as the time it takes for the output to rise to 2% of its total value after being released from shutdown (E N > 0.4V). The settling time is defined as the condition where the output reaches 98% of its total value after being released from shutdown. The latter is also called the turn on time and is dependent on the output capacitor, a little bit on load and, if present, on a bypass capacitor. a JA of approximately 191C/W for minimum PCB copper footprint area. This results in a maximum power dissipation of: PD(max)=[(125C-25C)/(191C/W)] = 523mW The actual power dissipation of the regulator circuit can be determined using one simple equation: PD = (VIN - VOUT) * IOUT + VIN * IGND To prevent the device from entering thermal shutdown, maximum power dissipation cannot be exceeded. Substituting PD(max) for PD and solving for the operating conditions that are critical to the application will give the maximum operating conditions for the regulator circuit. For example, if we are operating the SP6203 3.0V at room temperature, with a minimum footprint layout and output current of 300mA, the maximum input voltage can be determined, based on the equation below. Ground pin current can be taken from the electrical specifications table (0.23mA at 300mA). TURN OFF TIME The turn off time is defined as the condition where the output voltage drops about 66% () of its total value. 5 to 7 is the constant where the output voltage drops nearly to zero. There will always be a small voltage drop in shutdown because of the switch unless we short-circuit it. The turn off time of the output voltage is dependent on load conditions, output capacitance on VOUT (time constant = RLCL) and also on the difference in voltage between input and output. 390mW = (VIN-3.0V) * 300mA + VIN *0.23mA After calculations, we find that the maximum input voltage of a 3.0V application at 300mA of output current in a SOT-23-5 package is 4.7V. So if the intent is to operate a 5V output version from a 6V supply at 300mA load and at a 25C ambient temperature, then the actual total power dissipation will be: THERMAL CONSIDERATIONS The SP6203/6205 is designed to provide 300/500mA of continuous current in a tiny package. Maximum power dissipation can be calculated based on the output current and the voltage drop across the part. To determine the maximum power dissipation of the package, use the junction-to-ambient thermal resistance of the device and the following basic equation: PD=([6V-5V]*[300mA])+(6V*0.23mA)=301.4mW This is well below the 523mW package maximum. Therefore, the regulator can be used. Note that the regulator cannot always be used at its maximum current rating. For example, in a 5V input to 3.0V output application at an ambient temperature of 25C and operating at the full 500mA (IGND=0.355mA) load, the regulator is limited to a much lower load current, determined by the following equation: PD = (TJ(max) - TA) / JA TJ(max) is the maximum junction temperature of the die and is 125C. TA is the ambient temperature. JA is the junction-to-ambient thermal resistance for the regulator and is layout dependent. The SOT-23-5 package has (c) 2012 Exar Corporation 523mW = ( [5V-3V]*[ Iload(max)]) +(5V*0.350mA) 10/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators LAYOUT CONSIDERATIONS After calculation, we find that in such an application (SP6205) the regulator is limited to 260.6mA. Doing the same calculations for the 300mA LDO (SP6203) will limit the regulator's output current to 260.9mA. The primary path of heat conduction out of the package is via the package leads. Therefore, careful considerations have to be taken into account: Also, taking advantage of the very low dropout voltage characteristics of the SP6203/6205, power dissipation can be reduced by using the lowest possible input voltage to minimize the input-to-output drop. 1) Attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on PCB's where there are internal ground and power planes. 2) Place the input, output and bypass capacitors close to the device for optimal transient response and device behavior. ADJUSTABLE REGULATOR APPLICATIONS The SP6203/6205 can be adjusted to a specific output voltage by using two external resistors (see functional diagram). The resistors set the output voltage based on the following equation: 3) Connect all ground connections directly to the ground plane. In case there's no ground plane, connect to a common local ground point before connecting to board ground. VOUT = VREF *(R1/R2 + 1) Such layouts will provide a much better thermal conductivity (lower JA) for, a higher maximum allowable power dissipation limit. Resistor values are not critical because ADJ (adjust) has a high input impedance, but for best performance use resistors of 470K or less. A bypass capacitor from ADJ to VOUT provides improved noise performance. DUAL-SUPPLY OPERATION When used in dual supply systems where the regulator load is returned to a negative supply, the output voltage must be diode clamped to ground. (c) 2012 Exar Corporation 11/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators PACKAGE SPECIFICATION 8-PIN DFN (c) 2012 Exar Corporation 12/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators 5-PIN SOT-23 (c) 2012 Exar Corporation 13/14 Rev. 2.0.0 SP6203 / SP6205 300mA/500mA Low Noise CMOS LDO Regulators REVISION HISTORY Revision 2.0.0 Date 04/03/2012 Description Reformatted Data Sheet Includes top package marking update. FOR FURTHER ASSISTANCE Email: customersupport@exar.com Exar Technical Documentation: http://www.exar.com/TechDoc/default.aspx? EXAR CORPORATION HEADQUARTERS AND SALES OFFICES 48720 Kato Road Fremont, CA 94538 - USA Tel.: +1 (510) 668-7000 Fax: +1 (510) 668-7030 www.exar.com NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. or its in all Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. (c) 2012 Exar Corporation 14/14 Rev. 2.0.0