Semiconductor Components Industries, LLC, 2001
May, 2000 – Rev. 1 1Publication Order Number:
BC857BTT1/D
BC857BTT1, BC857CTT1
Preferred Devices
Advance Information
General Purpose Transistor
PNP Silicon
These transistors are designed for general purpose amplifier
applications. They are housed in the SOT–416/SC–75 which is
designed for low power surface mount applications.
Device Marking:
BC857BTT1 = 3F
BC857CTT1 = 3G
MAXIMUM RATINGS (TA = 25°C)
Rating Symbol Max Unit
Collector–Emitter Voltage VCEO –45 V
Collector–Base Voltage VCBO –50 V
Emitter–Base V oltage VEBO –5.0 V
Collector Current — Continuous IC–100 mAdc
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation,
FR–4 Board (1)
TA = 25°C
Derated above 25°C
PD200
1.6
mW
mW/°C
Thermal Resistance,
Junction to Ambient (1) RθJA 600 °C/W
Total Device Dissipation,
FR–4 Board (2)
TA = 25°C
Derated above 25°C
PD300
2.4
mW
mW/°C
Thermal Resistance,
Junction to Ambient (2) RθJA 400 °C/W
Junction and Storage
Temperature Range TJ, Tstg –55 to
+150 °C
(1) FR–4 @ Minimum Pad
(2) FR–4 @ 1.0 × 1.0 Inch Pad
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
Device Package Shipping
ORDERING INFORMATION
BC857BTT1 SOT–416
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3000 / Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
BC857CTT1 SOT–416 3000 / Tape & Reel
DEVICE MARKING
See Table
COLLECTOR
3
1
BASE
2
EMITTER
CASE 463
SOT–416/SC–75
STYLE 1
3
2
1
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage
(IC = –10 mA) BC857 Series V(BR)CEO –45 V
Collector–Emitter Breakdown Voltage
(IC = –10 µA, VEB = 0) BC857B Only V(BR)CES –50 V
Collector–Base Breakdown Voltage
(IC = –10 A) BC857 Series V(BR)CBO –50 V
Emitter–Base Breakdown Voltage
(IE = –1.0 A) BC857 Series V(BR)EBO –5.0 V
Collector Cutoff Current (VCB = –30 V)
Collector Cutoff Current (VCB = –30 V, TA = 150°C) ICBO
–15
–4.0 nA
µA
ON CHARACTERISTICS
DC Current Gain
(IC = –10 µA, VCE = –5.0 V) BC857B
BC857C
(IC = –2.0 mA, VCE = –5.0 V) BC857B
BC857C
hFE
220
420
150
270
290
520
475
800
Collector–Emitter Saturation Voltage
(IC = –10 mA, IB = –0.5 mA)
(IC = –100 mA, IB = –5.0 mA)
VCE(sat)
–0.3
–0.65
V
Base–Emitter Saturation Voltage
(IC = –10 mA, IB = –0.5 mA)
(IC = –100 mA, IB = –5.0 mA)
VBE(sat)
–0.7
–0.9
V
Base–Emitter On Voltage
(IC = –2.0 mA, VCE = –5.0 V)
(IC = –10 mA, VCE = –5.0 V)
VBE(on) –0.6
–0.75
–0.82
V
SMALL–SIGNAL CHARACTERISTICS
Current–Gain — Bandwidth Product
(IC = –10 mA, VCE = –5.0 Vdc, f = 100 MHz) fT100 MHz
Output Capacitance
(VCB = –10 V, f = 1.0 MHz) Cob 4.5 pF
Noise Figure
(IC = –0.2 mA, VCE = –5.0 Vdc, RS = 2.0 k,
f = 1.0 kHz, BW = 200 Hz)
NF 10 dB
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TYPICAL CHARACTERISTICS
Figure 1. Normalized DC Current Gain
IC, COLLECTOR CURRENT (mAdc)
2.0
Figure 2. “Saturation” and “On” Voltages
IC, COLLECTOR CURRENT (mAdc)
-0.2
0.2
Figure 3. Collector Saturation Region
IB, BASE CURRENT (mA)
Figure 4. Base–Emitter Temperature Coefficient
IC, COLLECTOR CURRENT (mA)
-0.6
-0.7
-0.8
-0.9
-1.0
-0.5
0
-0.2
-0.4
-0.1
-0.3
1.6
1.2
2.0
2.8
2.4
-1.2
-1.6
-2.0
-0.02 -1.0 -10
0-20
-0.1
-0.4
-0.8
hFE, NORMALIZED DC CURRENT GAIN
V, VOLTAGE (VOLTS)
VCE, COLLECTOR-EMITTER VOLTAGE (V)
VB, TEMPERATURE COEFFICIENT (mV/ C)°θ
1.5
1.0
0.7
0.5
0.3
-0.2 -10 -100
-1.0
TA = 25°C
VBE(sat) @ IC/IB = 10
VCE(sat) @ IC/IB = 10
VBE(on) @ VCE = -10 V
VCE = -10 V
TA = 25°C
-55°C to +125°C
IC = -100 mA
IC = -20 mA
-0.5 -1.0 -2.0 -5.0 -10 -20 -50 -100 -200 -0.1 -0.2 -0.5 -1.0 -2.0 -5.0 -10 -20 -50 -100
IC = -200 mAIC = -50 mAIC =
-10 mA
Figure 5. Capacitances
VR, REVERSE VOLTAGE (VOLTS)
10
Figure 6. Current–Gain – Bandwidth Product
IC, COLLECTOR CURRENT (mAdc)
-0.4
1.0
80
100
200
300
400
60
20
40
30
7.0
5.0
3.0
2.0
-0.5
C, CAPACITANCE (pF)
f, CURRENT-GAIN - BANDWIDTH PRODUCT (MHz)
T
TA = 25°C
Cob
Cib
-0.6 -1.0 -2.0 -4.0 -6.0 -10 -20 -30 -40
150
-1.0 -2.0 -3.0 -5.0 -10 -20 -30 -50
VCE = -10 V
TA = 25°C
TA = 25°C
1.0
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Figure 7. Thermal Response
Figure 8. Active Region Safe Operating Area
VCE, COLLECTOR-EMITTER VOLTAGE (V)
-200
-1.0
IC, COLLECTOR CURRENT (mA)
TA = 25°C
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
3 ms
TJ = 25°C
-100
-50
-10
-5.0
-2.0
-5.0 -10 -30 -45 -65 -100
1 s
BC558
BC557
BC556
The safe operating area curves indicate IC–VCE limits
of the transistor that must be observed for reliable opera-
tion. Collector load lines for specific circuits must fall be-
low the limits indicated by the applicable curve.
The data of Figure 8 is based upon TJ(pk) = 150°C; TC or
TA is variable depending upon conditions. Pulse curves are
valid for duty cycles to 10% provided TJ(pk) 150°C. TJ(pk)
may be calculated from the data in Figure 7. At high case
or ambient temperatures, thermal limitations will reduce
the power that can be handled to values less than the limita-
tions imposed by the secondary breakdown.
0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000
0.001
0.01
0.1
1.0
r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE
t, TIME (s)
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
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ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
1.4
1
0.5 min. (3x)
0.5 min. (3x)
TYPICAL
0.5
SOLDERING PATTERN
Unit: mm
PD = TJ(max) – TA
RθJA
PD = 150°C – 25°C
833°C/W = 150 milliwatts
The soldering temperature and time should not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied dur-
ing cooling
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
INFORMATION FOR USING THE SOT–416 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
SOT–416/SC–90 POWER DISSIPATION
The power dissipation of the SOT–416/SC–90 is a func-
tion of the pad size. This can vary from the minimum pad
size for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device
is determined by TJ(max), the maximum rated junction tem-
perature of the die, RθJA, the thermal resistance from the
device junction to ambient; and the operating temperature,
TA. Using the values provided on the data sheet, PD can be
calculated as follows.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one
can calculate the power dissipation of the device which in
this case is 125 milliwatts.
The 833°C/W assumes the use of the recommended foot-
print on a glass epoxy printed circuit board to achieve a
power dissipation of 150 milliwatts. Another alternative
would be to use a ceramic substrate or an aluminum core
board such as Thermal Clad. Using a board material such
as Thermal Clad, a higher power dissipation can be
achieved using the same footprint.
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10°C.
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STEP 1
PREHEAT
ZONE 1
RAMP"
STEP 2
VENT
SOAK"
STEP 3
HEATING
ZONES 2 & 5
RAMP"
STEP 4
HEATING
ZONES 3 & 6
SOAK"
STEP 5
HEATING
ZONES 4 & 7
SPIKE"
STEP 6
VENT
STEP 7
COOLING
200°C
150°C
100°C
50°C
TIME (3 TO 7 MINUTES TOTAL) TMAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205° TO 219°C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
100°C
150°C
160°C
140°C
Figure 9. Typical Solder Heating Profile
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
170°C
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session t o the next. Figure 7 shows a typical heating profile
for use when soldering a surface mount device to a printed
circuit board. This profile will vary among soldering
systems but it is a good starting point. Factors that can
affect the profile include the type of soldering system in
use, density and types of components on the board, type of
solder used, and the type of board or substrate material
being used. This profile shows temperature versus time.
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
TYPICAL SOLDER HEATING PROFILE
The line on the graph shows the actual temperature that
might be experienced on the surface of a test board at or
near a central solder joint. The two profiles are based on a
high density and a low density board. The Vitronics
SMD310 convection/infrared reflow soldering system was
used to generate this profile. The type of solder used was
62/36/2 Tin Lead Silver with a melting point between
177–189°C. When this type of furnace is used for solder
reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because i t has a lar ge surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
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PACKAGE DIMENSIONS
SOT–416/SC–75
CASE 463–01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A0.70 0.80 0.028 0.031
B1.40 1.80 0.055 0.071
C0.60 0.90 0.024 0.035
D0.15 0.30 0.006 0.012
G1.00 BSC 0.039 BSC
H--- 0.10 --- 0.004
J0.10 0.25 0.004 0.010
K1.45 1.75 0.057 0.069
L0.10 0.20 0.004 0.008
S0.50 BSC 0.020 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
M
0.20 (0.008) B
–A–
–B–
S
D
G
3 PL
0.20 (0.008) A
K
J
L
C
H
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
3
2
1
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
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without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
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