APL3216QBI-TRG - Anpec Electronics Corp.

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw1

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and

advise customers to obtain the latest version of relevant information to verify before placing orders.

Li+ Charger Protection IC

• Provide Input Over-voltage Protection

• Provide Input Over-current Protection

• Provide Over Temperature Protection

• Provide Reverse Current Blocking

• High Immunity of False Triggering

• High Accuracy Protection Threshold

• Low On Resistance 0.75Ω Typ.

• Compliance to IEC61000-4-2 (Level 4)

+8kV (Contact Discharge)

+15kV (Air Discharge)

• Available in TDFN2x2-8, SOT-23-6 Packages

• Lead Free and Green Devices Available

(RoHS Compliant)

Features

Applications

• Cell Phones

General Description

Simplified Application Circuit

The APL3216 provides complete Li+ charger protection

against Input over-voltage, input over-current and over-

temperature. When any of the monitored parameters is

over the threshold, the IC turns off the charging current.

All protections also have deglitch time against false trig-

gering due to voltage spikes or current transients.

When ACIN voltage exceeds OVP threshold, the device

will turn off charging current. The charging current is con-

trolled by the GATDRV pin. When sourcing a current from

the GATDRV pin, the OUT pin delivers the charging cur-

rent which is 200-fold magnified in amplitude based on

GATDRV’s current.

Other features include accurate VVCDT/VACIN Voltage divider,

reverse current blocking from OUT to ACIN and OTP

protection. The L3216 provides complete Li+ charger

protections, that can save the external components for

the charger of cell phone’s PMIC. The above features

and small package make the APL3216 an ideal part for

cell phones applications.

Pin Configuration

ACIN 1

ACIN 2

VCDT 4 5 GATDRV

GND 3

8 OUT

7 OUT

6 CHR_LDO

TDFN2x2-8

(Top View)

4 VCDT

6 ACIN

CHR_LDO 25 GND

GATDRV 3

OUT 1

SOT-23-6

(Top View)

5V Adapter ACIN CHR_LDO

VCDT

GND

APL3216

Li+

Battery

GATDRV

OUT

PMIC

VCDT

GATDRV

CHR_LDO

ISENS

VBAT

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw2

Ordering and Marking Information

Absolute Maximum Ratings (Note 1)

Symbol Parameter Rating Unit

VACIN ACIN Input Voltage (ACIN to GND) -0.3 ~ 30 V

CHR_LDO CHR_LDO to GND Voltage -0.3 ~ 7 V

GATDRV GATDRV to GND Voltage -0.3 ~ VCHR_LDO V

VVCDT VCDT to GND Voltage -0.3 ~ 7 V

VOUT OUT to GND Voltage -0.3 ~ 7 V

IOUT OUT Output Current Internally Limited A

TJ Maximum Junction Temperature 150 oC

TSTG Storage Temperature -65 ~ 150 oC

TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 oC

Symbol Parameter Typical Value Unit

θJA TDFN2x2-8 Junction-to-Ambient Resistance in free air (Note 2) 80 oC/W

θJA SOT-23-6 Junction-to-Ambient Resistance in free air (Note 2) 250 oC/W

Thermal Characteristic

Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed

pad of TDFN2x2-8 is soldered directly on the PCB.

Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which

are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for

MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen

free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by

weight).

Note 1:Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are

stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ”recom-

mended operating conditions”is not implied. Exposure to absolute maximum rating conditions for extended periods may affect vice

reliability.

APL3216 Package Code

Operating Ambient Temperature Range

I : -40 to 85 oC

Handling Code

TR : Tape & Reel

Assembly Material

Handling Code

Temperature Range

Package Code

X - Date Code

G : Halogen and Lead Free Device

Assembly Material QB : TDFN2x2-8 C : SOT-23-6

APL3216 QB: L16

APL3216 C: X - Date Code

L16A

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw3

Symbol Parameter Range Unit

VACIN ACIN Input Voltage 4.5 ~ 9 V

IOUT Output Current 0.7 A

TA Ambient Temperature -40 ~ 85 oC

TJ Junction Temperature -40 ~ 125 oC

COUT Output Capacitor 0.1~1 µF

Recommended Operating Conditions (Note 3)

Note 3: Refer to the typical application circuit

Unless otherwise specified, these specifications apply over VACIN=5V, TA= -40 ~ 85 oC. Typical values are at TA=25oC.

APL3216

Symbol

Parameter Test Conditions Min Typ Max Unit

ACIN INPUT CURRENT and POWER-ON-RESET (POR)

IACIN ACIN Supply Current IOUT=0A, ICHR=0A - 250 500 µA

VPOR ACIN POR Threshold VACIN rising - 2.6 - V

ACIN POR Hysteresis - 250 - mV

TB(ACIN)

ACIN Power-On Blanking Time - 8 - ms

INTERNAL SWITCH ON RESISTANCE

ACIN to OUT On Resistance IOUT=0.6A 750 mΩ

CHR_LDO Discharge Resistance - 500 - Ω

PROTECTIONS

ICL Over-current Trip Threshold 0.9 1.25 1.6

- Short-circuit Current Limit - 0.75 - A

- Input OVP Threshold 9.5 10 10.5 V

- CHR_LDO Output Series

Resistance 2.4 3 - kΩ

VCDT INTERNAL DIVIDER

Divider Ratio VVCDT /VACIN 0.1035

0.1056

0.1078

V/V

CHARGE CURRENT CONTROL

Current Mirror Gain IOUT=0.6A, IOUT/IGATDRV 100 200 300 A/A

THERMAL SHUTDOW PROTECTION

TOTP

Thermal Shutdown Threshold TJ rising - 160 - °C

Thermal Shutdown Hysteresis - 40 - °C

Electrical Characteristics

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw4

Pin Description

TDFN2x2-8

SOT-23-6

NO. NO. NAME

Function

2 6 ACIN Power Supply Input. Connect this pin to external DC supply. Bypass to GND with a 1µF

(minimum) ceramic capacitor.

3 5 GND Ground terminal.

4 4 VCDT Provide an internal voltage divider. This pin divides ACIN voltage into 0.1056 ratio.

5 3 GATDRV Charging current control pin. When sinking a current from this pin, the OUT pin will

source out a current whose magnitude is 200x IGATDRV .

6 2 CHR_LDO

Output Pin. The pin provides supply voltage to the PMIC input. Bypass to GND with a

1µF (minimum) ceramic capacitor.

8 1 OUT Output Pins. The pin provides supply source current in series with a resistor to battery.

Exposed

Pad - GND Exposed Thermal Pad. Must be electrically connected to the GND pin.

Block Diagram

GATDRV

CHR_LDO

VCDT

OUT

GND

ACIN

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw5

Typical Application Circuit

Adapter ACIN CHR_LDO

VCDT

GND

APL3216

Li+

Battery

GATDRV

OUT

PMIC

VCDT

GATDRV

CHR_LDO

ISENS

VBAT

0.2Ω

CCHR_LDO

2.2µF/6.3V

CACIN

1µF/25V

Designation

Description

1µF, 25V, X5R, 0603

Murata GRM188R61E105K

CACIN 1µF, 16V, X5R, 0603

Murata GRM188R61C105K

CCHR_LDO 1µF, 6.3V, X5R, 0603

Murata GRM185R60J225KE26

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw6

Function Description

ACIN Power-On-Reset (POR)

The APL3216 is built-in a power-on-reset circuit to keep

the output shut off until internal circuitry is operating

properly. The POR circuit has hysteresis and a de-glitch

feature so that it will typically ignore undershoot transients

on the input. When input voltage exceeds the POR thresh-

old and after 8ms blanking time, the output voltage starts

a soft-start to reduce the inrush current.

ACIN Over-Voltage Protection (OVP)

The CHR_LDO output of the IC operates similar to a lin-

ear regulator. If the input voltage rises above VOVP, the

internal transistor will be turned off within 5µs to protect

connected system on OUT pin. When the input voltage

returns below the input OVP threshold minus the

hysteresis, the transistor is turned on again after 1ms

recovery time. The input OVP circuit has a 200mV hyster-

esis and a recovery time of TON(OVP) to provide noise im-

munity against transient conditions.

Charging Current Control

The charging current is controlled by the GATDRV pin.

When sourcing a current from the GATDRV pin, the OUT

pin delivers the charging current which is 200-fold mag-

nified in amplitude based on GATDRV?¦s current. The IOUT

current can be calculated by this following equation:

IOUT=200*IGATDRV

where

The IOUT is the current flowing out from OUT pin.

The IGATDRV is the current flowing out from GATDRV pin.

Current Limit

The output current is monitored by the internal Current

Limit circuit. When the output current reaches the over

current trip threshold, the device limits the output current

at current limit threshold.

Temperature Protection

When the junction temperature exceeds 160oC, the inter-

nal thermal sense circuit turns off the power FET and

allows the device to cool down. When the device’s junc-

tion temperature cools by 40oC, the internal thermal

sense circuit will enable the device, resulting in a pulsed

output during continuous thermal protection. Thermal

protection is designed to protect the IC in the event of

over temperature conditions. For normal operation, the

junction temperature cannot exceed TJ=+125oC.

The APL3216 VIN input pin fully supports the IEC61000-

4-2. That means the VIN pin has immunity of ±15kV ESD

discharge in Air condition, and immunity of ±8kV ESD dis-

charge in Contact condition.

ESD Tests

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw7

Package Information

TDFN2x2-8

MIN. MAX.

0.80

0.00

0.18 0.30

1.00 1.60

0.05

0.60

MILLIMETERS

A3 0.20 REF

TDFN2x2-8

0.30 0.45

1.00

0.008 REF

MIN. MAX.

INCHES

0.031

0.000

0.007 0.012

0.039 0.063

0.024

0.012 0.018

0.70

0.039

0.028

0.002

0.50 BSC 0.020 BSC

1.90 2.10 0.075 0.083

Pin 1 Corner

Note : 1. Follow from JEDEC MO-229 WCCD-3.

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw8

Package Information

SOT-23-6

VIEW A

0.25

GAUGE PLANE

SEATING PLANE

A2A1

SEE VIEW A

0.020

0.009

0.006

0.024

0.051

0.057

MAX.

0.30L

0.08

0.30

0.012

0.60

0.95 BSC

1.90 BSC

0.50

0.22

0.075 BSC

0.037 BSC

0.012

0.003

MILLIMETERS

MIN.

0.00

0.90

SOT-23-6

MAX.

1.30

0.15

1.45

MIN.

0.000

0.035

INCHES

1.40

2.60 3.00

1.80

2.70 3.10

0.118

0.071

0.122

0.102

0.055

0.106

Note : 1. Follow JEDEC TO-178 AB.

2. Dimension D and E1 do not include mold flash, protrusions or

gate burrs. Mold flash, protrusion or gate burrs shall not exceed

10 mil per side.

SEATING PLANE < 4 mils-T-

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw9

Devices Per Unit

Package Type Unit Quantity

TDFN2x2-8 Tape & Reel 3000

SOT-23-6 Tape & Reel 3000

Carrier Tape & Reel Dimensions

Application

A H T1 C d D W E1 F

178.0±

2.00

50 MIN.

8.4+2.00

0.00

13.0+0.50

-0.20

1.5 MIN.

20.2 MIN.

8.0±

0.20

1.75±

0.10

3.50±

0.05

P0 P1 P2 D0 D1 T A0 B0 K0

TDFN2x2-8

4.0±

0.10

4.0±

0.10

2.0±

0.05

1.5+0.10

-0.00

1.5 MIN.

0.6+0.00

-0.4 3.35 MIN

3.35 MIN

1.30±

0.20

A H T1 C d D W E1 F

178.0±

2.00

50 MIN.

8.4+2.00

-0.00

13.0+0.50

-0.20

1.5 MIN.

20.2 MIN.

8.0±

0.30

1.75±

0.10

3.5±

0.05

P0 P1 P2 D0 D1 T A0 B0 K0

SOT-23-6

4.0±

0.10

4.0±

0.10

2.0±

0.05

1.5+0.10

-0.00

1.0 MIN.

0.6+0.00

-0.40

3.20±

0.20

3.10±

0.20

1.50±

0.20

(mm)

OD0

BA0

SECTION B-B

SECTION A-A

OD1

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw10

Taping Direction Information

TDFN2x2-8

USER DIRECTION OF FEED

Classification Profile

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw11

Classification Reflow Profiles

Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly

Preheat & Soak

Temperature min (Tsmin)

Temperature max (Tsmax)

Time (Tsmin to Tsmax) (ts)

100 °C

150 °C

60-120 seconds

150 °C

200 °C

60-120 seconds

Average ramp-up rate

(Tsmax to TP) 3 °C/second max. 3°C/second max.

Liquidous temperature (TL)

Time at liquidous (tL) 183 °C

60-150 seconds 217 °C

60-150 seconds

Peak package body Temperature

(Tp)* See Classification Temp in table 1 See Classification Temp in table 2

Time (tP)** within 5°C of the specified

classification temperature (Tc) 20** seconds 30** seconds

Average ramp-down rate (Tp to Tsmax)

6 °C/second max. 6 °C/second max.

Time 25°C to peak temperature 6 minutes max. 8 minutes max.

* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.

** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.

Table 2. Pb-free Process – Classification Temperatures (Tc)

Package

Thickness Volume mm3

<350 Volume mm3

350-2000 Volume mm3

>2000

<1.6 mm 260 °C 260 °C 260 °C

1.6 mm – 2.5 mm 260 °C 250 °C 245 °C

≥2.5 mm 250 °C 245 °C 245 °C

Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)

Package

Thickness Volume mm3

<350 Volume mm3

≥350

<2.5 mm 235 °C 220 °C

≥2.5 mm 220 °C 220 °C

Test item Method Description

SOLDERABILITY JESD-22, B102 5 Sec, 245°C

HOLT JESD-22, A108 1000 Hrs, Bias @ Tj=125°C

PCT JESD-22, A102 168 Hrs, 100%RH, 2atm, 121°C

TCT JESD-22, A104 500 Cycles, -65°C~150°C

ESD JESD-22, A114; A115 VHBM≧2KV, VMM≧200V

Latch-Up JESD 78 10ms, 1tr≧100mA

Reliability Test Program

Rev. A.7 - Dec., 2011

APL3216

www.anpec.com.tw12

Customer Service

Anpec Electronics Corp.

Head Office :

No.6, Dusing 1st Road, SBIP,

Hsin-Chu, Taiwan, R.O.C.

Tel : 886-3-5642000

Fax : 886-3-5642050

Taipei Branch :

2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,

Sindian City, Taipei County 23146, Taiwan

Tel : 886-2-2910-3838

Fax : 886-2-2917-3838