2013 Microchip Technology Inc. DS20005254A-page 1
MCP1632
Features:
• High-Speed PWM Controller with Integrated
Low-Side MOSFET Driver
• Multiple Switching Frequency Options (fSW):
-300kHz
-600kHz
• Adjustable Reference Voltage Generator
• Adjustable Soft Start
• Internal Slope Compensation
• Shutdown Input Pin (EN)
• Low Operating Current: < 5 mA (typical)
• Undervoltage Lockout (UVLO) Protection
• Output Short Circuit Protection
• Overtemperature Protection
• Operating Temperature Range:
- -40°C to +125°C
Applications:
• Switch Mode Power Supplies
• Brick DC-DC Converters
• Battery Charger Applications
•LED Drivers
Related Literature:
• “MCP1632 300 kHz Boost Converter Demo Board
User’s Guide”, Microchip Technology Inc.,
DS20005252A, 2013
Description:
The MCP1632 high-speed PWM controller is a
pulse-width modulator developed for stand-alone power
supply applications. The MCP1632 includes a
high-speed analog control loop, a logic-level MOSFET
driver, an internal oscillator, a reference voltage
generator, and internal slope compensation. This high
level of integration makes it an ideal solution for
standalone SMPS applications. MCP1632 is suitable for
use in topologies requiring a low-side MOSFET control,
such as Boost, Flyback, SEPIC, Ćuk, etc. Typical
applications include battery chargers, intelligent power
systems, brick DC-DC converters, LED drivers. Due to
its low power consumption, the MCP1632 PWM
controller is recommended for battery-operated
applications.
The MCP1632 offers a Peak Current mode control in
order to achieve consistent performance regardless of
the topology of the power train or the operating
conditions. In addition, the MCP1632 can implement
the Voltage Mode Control for cost-sensitive solutions.
The MCP1632 PWM controller can be easily interfaced
with PIC microcontrollers in order to develop an
intelligent power solution.
Additional features include: UVLO, overtemperature
and overcurrent protection, shutdown capability (EN
pin) and an adjustable soft start option.
Package Type
1
2
3
4
8
7
6
5
COMP
FB
CS
EN GND
V
EXT
Vin
V
REF
EP
9
8-Lead DFN
1
2
3
4
8
7
6
5
FB
CS
EN
COMP
VIN
VREF
VEXT
GND
8-Lead MSOP
(2 mm x 3 mm)
High-Speed, Low - Side PWM Con t roller
MCP1632
DS20005254A-page 2 2013 Microchip Technology Inc.
Functional Block Diagram
V
EXT
10 k:
Oscillator
EN UVLO
Overtemperature
Q
Q
S
R
GND
PWM
Comp
+
-
CS
V
IN
V
IN
V
IN
EA
V
IN
2R
R
2.7V
COMP
FB
V
REF
Latch Truth Table
SRQ
0
1
0
01
1
1
11
00
Qn
+
-
300/600 kHz
V
IN
50 μA
CLK
Reference
Voltage
V
DRIVE
RAMP
+1
6k:
Shutdown
Circuit
SS Reset
SS Reset
CS
Blanking
100 ns
2013 Microchip Technology Inc. DS20005254A-page 3
MCP1632
Typical Application Circuit – Peak Current Mode Control
Typical Application Circuit – Voltage Mode Control
MCP1632
RR
CSS
VIN VOUT
VREF
COMP
EN
FB
CS
VEXT
GND
VCC
MCP1632
RR
CSS
VIN VOUT
VREF
COMP
EN
FB
CS
VEXT
GND
VCC
MCP1632
DS20005254A-page 4 2013 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD...................................................................................6.0V
Maximum Voltage on Any Pin . (VGND – 0.3)V to (VIN +0.3)V
VEXT Short Circuit Current ...........................Internally Limited
Storage Temperature.....................................-65°C to +150°C
Maximum Junction Temperature, TJ...........................+150°C
Continuous Operating Temperature Range ..-40°C to +125°C
ESD protection on all pins, HBM 2kV
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
AC/DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VIN = 3.0V to 5.5V, FOSC =300kHz, C
IN =0.1µF,
VIN for typical values = 5.0V, TA= -40°C to +125°C.
Parameters Sym. Min. Typ. Max. Units Conditions
Input Voltage
Input Operating Voltage VIN 3.0 — 5.5 V
Input Quiescent Current I(VIN)— 57.5mAI
EXT =0mA
Input Shutdown Current I(VIN)SHDN ——2µAEN=0V
EN Input
EN Input Voltage Low ENLOW ——0.8V
EN Input Voltage High ENHIGH 75 — — % of VIN
Delay Time — — 190 210 µs EN goes from low to high (Note 1)
40 60 µs EN goes from high to low (Note 1)
Internal Oscillator
Internal Oscillator Range FOSC 250 300 350 kHz Two options
Refer to Section 4.8 “Internal
Oscillator”.
510 600 690
Reference Voltage Section
Reference Voltage
Input Range
VREF 0—V
IN VNote 1
Refer to Section 4.7 “Reference
Voltage Generator” for details.
Internal Constant Current
Generator
IREF 48 50 52 µA Refer to Section 4.7 “Reference
Voltage Generator” for details.
Error Amplifier
Input Offset Voltage VOS -4 0.1 +4 mV
Error Amplifier PSRR 65 80 — dB VIN = 3.0V to 5.0V, VCM =1.2V
(Note 1)
Common-Mode Input Range VCM GND - 0.3 — VIN VNote 1
Common-Mode
Rejection Ratio
CMRR 60 80 — dB VIN =5V, V
CM = 0V to 2.5V
(Note 1)
Open-Loop Voltage Gain AVOL 80 95 — dB RL=5k to VIN/2,
100 mV < VEAOUT <V
IN -100mV,
VCM =1.2V (Note 1)
Low-Level Output VOL —2550mVR
L=5k to VIN/2
Gain Bandwidth Product GBWP 3.5 5 — MHz VIN =5V (Note 1)
Error Amplifier Sink Current ISINK 48—mAV
IN =5V, V
REF =1.2V,
VFB = 1.4V, VCOMP =2.0V
Note 1: Ensured by design. Not production tested.
2013 Microchip Technology Inc. DS20005254A-page 5
MCP1632
Error Amplifier
Source Current
ISOURCE 46—mAV
IN =5V, V
REF =1.2V,
VFB = 1.0V, VCOMP =2.0V,
Absolute Value
Current Sense Input
Maximum Current Sense
Signal
VCS_MAX 0.8 0.9 0.97 V Set by maximum error amplifier
clamp voltage, divided by 3
(Note 1)
Blanking Time TBLANK 80 100 130 ns Note 1
Delay from CS to VEXT TCS_VEXT — — 35 ns Excluding the blanking time
(Note 1)
Current Sense Input Bias
Current
ICS_B —-0.1—µANote 1
PWM Section
Minimum Duty Cycle DCMIN ——0%V
FB =V
REF + 0.1V, VCS =GND
(Note 1)
Maximum Duty Cycle DCMAX 80 85 95 %
Slope Compensation Ramp Generator
Ramp Amplitude VRAMP 0.8 0.9 1 VPP Refer to Section 4.6 “Slope
Compensation” for details.
DC Offset Low — 0.15 0.32 0.45 V Refer to Section 4.6 “Slope
Compensation” for details.
DC Offset High — 1.12 1.22 1.32 V Refer to Section 4.6 “Slope
Compensation” for details.
Ramp Generator Output
Impedance
ZRG 5.5 6 6.5 kRefer to Section 4.6 “Slope
Compensation” for details.
Internal Driver
RDSon P-channel RDSon_P —1030
RDSon N-channel RDSon_N —730
VEXT Rise Time TRISE ——18nsC
L= 100 pF
Typical for VIN =3V (Note 1)
VEXT Fall Time TFALL ——18nsC
L= 100 pF
Typical for VIN =3V (Note 1)
Protection Features
Undervoltage Lockout UVLO 2.6 — 2.9 V VIN falling,
VEXT low state when in UVLO
Undervoltage Lockout
Hysteresis
UVLOHYS 50 110 180 mV
Thermal Shutdown TSHD —150—°CNote 1
Thermal Shutdown
Hysteresis
TSHD_HYS —20—°CNote 1
AC/DC CHARACTERISTICS (CONTINUE D)
Electrical Specifications: Unless otherwise noted, VIN = 3.0V to 5.5V, FOSC =300kHz, C
IN =0.1µF,
VIN for typical values = 5.0V, TA= -40°C to +125°C.
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: Ensured by design. Not production tested.
MCP1632
DS20005254A-page 6 2013 Microchip Technology Inc.
TEMPERATURE SPECIFICATIONS
Electrical Specifications: VIN = 3.0V to 5.5V, FOSC =600kHz, C
IN = 0.1 µF. TA= -40°C to +125°C.
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Operating Junction Temperature
Range
TA-40 — +125 °C Steady state
Storage Temperature Range TA-65 — +150 °C
Maximum Junction Temperature TJ— — +150 °C Transient
Thermal Package Resistances
Thermal Resistance,
8L-DFN (2 mm x 3 mm)
JA — 75 — °C/W Typical 4-layer board with two
interconnecting vias.
Thermal Resistance, 8L-MSOP JA — 211 — °C/W Typical 4-layer board.
2013 Microchip Technology Inc. DS20005254A-page 7
MCP1632
2.0 TYPICAL PE RFORMANCE CURVES
Note: Unless otherwise noted, VIN =5V, F
OSC =300kHz, C
IN = 0.1 µF, TA=25°C.
FIGURE 2-1: Input Quiescent Current vs.
Input Voltage (EN = Low).
FIGURE 2-2: Input Quiescent Current vs.
Input Voltage (EN = High).
FIGURE 2-3: Relative Oscillator
Frequency Variation vs. Input Voltage.
FIGURE 2-4: Relative Oscillator
Frequency Variation vs. Junction Temperature.
FIGURE 2-5: VREF Current vs. Input
Voltage.
FIGURE 2-6: VREF Current vs. Junction
Temperature.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
2.5 3.5 4.5 5.5
Input Quiescent Current (μA)
Input Voltage (V)
fSW = 600 kHz
fSW = 300 kHz
EN = Low
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
2.5 3.5 4.5 5.5
Input Quiescent Current (mA)
Input Voltage (V)
fSW = 300 kHz
fSW = 600 kHz
EN = High
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
2.0
4.0
2.5 3.5 4.5 5.5
Relative Oscillator Frequency
Variation (%)
Input Voltage (V)
f
SW
= 300 kHz
f
SW
= 600 kHz
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
2.0
4.0
-50 0 50 100 150
Relative Oscillator Frequency
Variation (%)
Junction Temperature (°C)
f
SW
= 300 kHz
f
SW
= 600 kHz
49.5
49.6
49.7
49.8
49.9
50
50.1
50.2
50.3
50.4
50.5
2.5 3.5 4.5 5.5
V
REF
Current (μA)
Input Voltage (V)
49
49.2
49.4
49.6
49.8
50
50.2
50.4
50.6
50.8
51
-50 0 50 100 150
V
REF
Current (μA)
Junction Temperature (°C)
MCP1632
DS20005254A-page 8 2013 Microchip Technology Inc.
Note: Unless otherwise noted, VIN =5V, F
OSC =300kHz, C
IN = 0.1 µF, TA=25°C.
FIGURE 2-7: Error Ampli fier Offset
Voltage vs. Temperature.
FIGURE 2-8: Error Ampli fier Offset
Voltage vs. Input Voltage.
FIGURE 2-9: VEXT Rise Time vs. Input
Voltage.
FIGURE 2-10: VEXT Fall Time vs. Input
Voltage.
FIGURE 2-11: Relative VEXT N-Channel
MOSFET RDSon Variation vs. Input Voltage.
FIGURE 2-12: Relative VEXT P-Channel
MOSFET RDSon Variation vs. Input Voltage.
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
-50 0 50 100 150
Error Amplifier Offset Voltage
(mV)
Junction Temperature (°C)
NMOS Pair
PMOS Pair
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
2.5 3.5 4.5 5.5
Error Amplifier Offset Voltage
(mV)
Input Voltage (V)
NMOS Pair
PMOS Pair
2
3
4
5
2.5 3.5 4.5 5.5
V
EXT
Rise Time (ns)
Input Voltage (V)
CLOAD = 100 pF
2
3
4
2.5 3.5 4.5 5.5
V
EXT
Fall Time (ns)
Input Voltage (V)
CLOAD = 100 pF
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
40.0
45.0
2.5 3.5 4.5 5.5
Relative V
EXT
N-Channel
MOSFET RDSon Variation (%)
Input Voltage (V)
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
40.0
45.0
2.5 3.5 4.5 5.5
Relative V
EXT
P-Channel
MOSFET RDSon Variation (%)
Input Voltage (V)
2013 Microchip Technology Inc. DS20005254A-page 9
MCP1632
Note: Unless otherwise noted, VIN =5V, F
OSC =300kHz, C
IN = 0.1 µF, TA=25°C.
FIGURE 2-13: UVLO Threshold vs.
Temperature.
FIGURE 2-14: Relative VEXT N-Channel
MOSFET RDSon Variation vs. Junction
Temperature.
FIGURE 2-15: Relative VEXT P-Channel
MOSFET RDSon Variation vs. Junction
Temperature.
2.60
2.65
2.70
2.75
2.80
2.85
2.90
2.95
3.00
-50 0 50 100 150
UVLO Threshold (V)
Junction Temperature (°C)
VIN Rising
VIN Falling
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
-50 0 50 100 150
Relative V
EXT
N-Channel
MOSFET RDSon Variation (%)
Junction Temperature (°C)
-15.0
-10.0
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
-50 0 50 100 150
Relative V
EXT
P-Channel
MOSFET RDSon Variation (%)
Junction Temperature (°C)
MCP1632
DS20005254A-page 10 2013 Microchip Technology Inc.
NOTES:
2013 Microchip Technology Inc. DS20005254A-page 11
MCP1632
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Tab l e 3- 1.
3.1 Error Amplifier Output (COMP)
COMP is the internal error amplifier output pin. External
compensation is connected from the FB pin to the
COMP pin for control-loop stabilization. Type II or III
compensation networks must be used depending on
the application. An internal voltage clamp is used to
limit the maximum COMP pin voltage to 2.7V (typical).
This clamp is used to set the maximum peak current in
the power system switch by setting a maximum limit on
the CS input for Peak Current Mode control systems.
3.2 Er ror Amplifier Inverting Input
(FB)
FB is the internal error amplifier inverting input pin. The
output (voltage or current) is sensed and fed back to
the FB pin for regulation. Inverting or negative
feedback is used.
3.3 Cur rent Sense Input (CS)
This is the input for the switch current used for Peak
Current Mode control. A blanking period of 100 ns
(typical) for CS signal is provided to avoid leading edge
spikes that can cause false PWM reset. The normal
PWM duty cycle will be terminated when the voltage on
the CS pin (including the slope compensation ramp) is
equal to the output of the error amplifier divided by 3.
For Current Mode operation, the CS pin will control the
PWM output on a cycle-by-cycle basis. The internal
error amplifier output is clamped to 2.7V (nominal) and
divided by 3, so the maximum voltage of the CS pin is
0.9V. By limiting the inverting pin of the high-speed
comparator to 0.9V, a current sense limit is established
for all input bias voltage conditions (cycle-by-cycle
overcurrent protection). To avoid the instability of the
Peak Current Mode control when the duty cycle is
higher than 50%, a slope compensation ramp
generator is internally provided. This circuit will add to
the CS signal an artificially generated ramp to avoid
sub-harmonic oscillations. The amplitude of the slope
compensation ramp is adjustable with one external
resistor.
If this pin is left open, the PWM Controller will operate
in Voltage Mode Control. In this mode, the external
switching MOSFET transistor is not protected against
overcurrent conditions. Certain limitations related to the
stability of the closed-loop system must be taken into
account by the designer when the part operates in
Voltage Mode Control. Refer to Section 5.2
“Operation in Voltage Mode Control” for details
about the operation in Voltage Mode Control.
3.4 Enable Input (EN)
When this pin is connected to GND (logic “Low”) for
more than 50 µs (typical), the chip will go into
Shutdown state. A logic “High” enables the normal
operation of the MCP1632 device. When the device is
disabled, the VEXT output is held low. Do not let the EN
pin float. If not used, connect EN to VIN through a 10 k
resistor.
3.5 Circui t Ground (GND)
Connect the circuit ground to the GND pin. For most
applications, this should be connected to the analog
(quiet) ground plane. Effort should be made to
minimize the noise on this ground, as it can adversely
affect the cycle-by-cycle comparison between the CS
input and the error amplifier output.
3.6 External Driver Output (VEXT)
VEXT is the internal MOSFET driver output pin, used to
drive the external transistor. For high-power or high-side
drives, this output should be connected to the logic-level
input of an appropriate MOSFET driver. For low-power,
low-side applications, the VEXT pin can be used to
directly drive the gate of an N-channel MOSFET.
TABLE 3-1: PIN FUNCTION TABLE
DFN/MSOP Name Function
1 COMP Error Amplifier Output
2 FB Error Amplifier Inverting Input
3 CS Current Sense Input
4 EN Enable Input
5 GND Circuit Ground
6V
EXT External Driver Output
7V
IN Input Bias
8V
REF Reference Voltage Input/Internal Constant Current Generator Output
9 EP Exposed Thermal Pad (EP); must be connected to GND
MCP1632
DS20005254A-page 12 2013 Microchip Technology Inc.
3.7 Input Bias (VIN)
VIN is the input voltage pin. Connect the input voltage
source to the VIN pin. For normal operation, the voltage
on the VIN pin should range from +3.0V to +5.5V. A
bypass capacitor of at least 0.1 µF should be
connected between the VIN pin and the GND pin. This
decoupling capacitor must be located as close as
possible to the controller package.
3.8 Reference Voltage Input/Internal
Constant Current Gene rator
Output (VREF)
This pin is the output of the internal Constant Current
Generator (50 µA typical). An external resistor must be
connected between this pin and GND. The current
flowing in this resistor will set the reference voltage.
Optionally, a capacitor may also be connected between
this pin and GND to set the soft start ramp behavior.
This pin may be overdriven by an external voltage
source, enabling the reference voltage to be controlled
externally. Refer to Section 4.7 “Reference Voltage
Generator” for details.
2013 Microchip Technology Inc. DS20005254A-page 13
MCP1632
4.0 DETAILED DESCRIPTION
4.1 Device Overview
The MCP1632 device is comprised of an internal
oscillator, an internal constant current generator, a
high-speed comparator, a high-bandwidth amplifier, an
internal ramp generator for slope compensation and
logic gates, and is intended to be used to develop a
stand-alone switch-mode power supply. There are two
(orderable) switching frequency options for this device:
300 kHz or 600 kHz. Refer to Functional Block
Diagram for details about the internal functional blocks.
4.2 PWM Circuitry
MCP1632 implements a typical Peak Current Mode
control loop. The VEXT output of the MCP1632 device
is determined by the output level of the internal
high-speed comparator and the level of the internal
CLK signal. When the CLK signal level is high, the
PWM output (VEXT) is forced low, limiting the maximum
duty cycle to approximately 85% (typical). When the
CLK signal is low, the PWM output is determined by the
output level of the internal high-speed comparator.
During UVLO, the VEXT pin is held in low state. During
overtemperature operation, the VEXT pin is
high-impedance (10 k to ground, typical).
4.3 Normal Cycle-by-Cycle Control
The beginning of a PWM cycle is defined by the internal
CLK signal (a transition from high to low). Refer to
Figure 4-1 for the detailed timing operation of the
MCP1632 PWM controller.
For normal operation, the state of the high-speed
comparator output (R) is low and the Q output of the
latch is low. On the high-to-low transition of the CLK
signal, the SR inputs to the high-speed latch are both
low and the Q output will remain unchanged (low). The
output of the OR gate (VDRIVE) will transition from high
to low, turning on the P-Channel drive transistor in the
output stage of the PWM. This will change the PWM
output (VEXT) from low to high, turning on the power
train MOSFET and ramping current in the power train
magnetic device. The sensed current in the magnetic
device is fed into the CS input, shown as a ramp, and
increases linearly until it reaches the same level as the
divided down output of the error amplifier at the
non-inverting input of the high-speed comparator. The
comparator output (R) changes state (low to high) and
resets the PWM latch. The Q output transition from low
to high turns off the VEXT drive to the external MOSFET
driver, thus terminating the current conduction cycle.
The CLK signal will transition from low to high while the
VEXT pin remains unchanged. If the CS input pin never
reaches the same level as the error amplifier output,
the low-to-high transition on the CLK signal terminates
the current switching cycle. This would be considered
as the maximum duty cycle. In either case, while the
CLK signal is high, the VEXT drive pin is low, turning off
the external power train switch. The next switching
cycle will start on another transition of the CLK signal
from high to low.
4.4 Err or Ampl ifier/Co mparator
Current Limit Function
The internal amplifier is used to create an error output
signal that is determined by the VREF input pin and the
power supply output voltage fed back into the FB pin.
The error amplifier output is rail-to-rail and is clamped
by a precision 2.7V internal voltage source. The output
of the error amplifier is then divided down 3:1 and
connected to the inverting input of the high-speed
comparator. The maximum output of the error amplifier
is 2.7V, so the maximum input to the inverting pin of the
high-speed comparator is 0.9V. As the output load
current demand increases, the error amplifier output
increases too, causing the inverting input pin of the
high-speed comparator to increase. Eventually, the
output of the error amplifier will hit the 2.7V clamp,
limiting the input of the high-speed comparator to 0.9V
maximum. Even if the FB input continues to decrease,
calling for more current, the inverting input is limited to
0.9V. By limiting the inverting input to 0.9V, the current
sense (CS) input is limited to 0.9V, thus limiting the
current that flows in the main switch. Limiting the
maximum peak current in the switch prevents the
destruction of the semiconductor device and the
saturation of the inductor during overloads. The resistor
divider placed at the output of the error amplifier
decreases the gain of the control loop by 9.5 dB. The
designer must take into account this gain reduction
during the compensation loop process. The error
amplifier is rail-to-rail at the input and the
common-mode range includes the GND and VIN
potentials.
4.5 0% Duty Cycle Operation
The duty cycle of the VEXT output is capable of
reaching 0% when the FB pin (inverting error amplifier)
is held higher than the voltage present on the VREF
(Reference Voltage) pin. This is accomplished by the
rail-to-rail output capability of the error amplifier and the
offset voltage of the high-speed comparator. The
minimum error amplifier output voltage, divided by 3, is
less than the offset voltage of the high-speed
comparator. In case the output voltage of the converter
is above the desired regulation point, the FB input will
be above the VREF input and the error amplifier will be
pulled to the bottom rail (GND). This low voltage is
divided down 3:1 by the 2R and 1R resistor, and is
connected to the input of the high-speed comparator.
This voltage will be low enough so that there is no
triggering of the comparator, allowing narrow pulse
widths at VEXT
.
MCP1632
DS20005254A-page 14 2013 Microchip Technology Inc.
FIGURE 4-1: PWM Timing Diagram.
4.6 Slope Compensation
In order to prevent sub-harmonic oscillations that occur
when a Peak Current Mode converter exceeds a 50%
duty cycle, the MCP1632 provides an internal ramp
generator that can be used for slope compensation.
Refer to Figure 4-2 for details about the slope
generator circuit. The amplitude of the generated ramp
signal is 0.9 VPP (typical) and the DC offset value is
770 mV (typical). The impedance of the internal ramp
generator (RG) is 6 ktypical. The amplitude of the
slope compensation ramp can be adjusted by
modifying the value of the RSLOPE resistor. Refer to
Figure 4-3 for details about the slope compensation
ramp signal applied to CS pin. The parameters of the
slope compensation ramp signal can be calculated with
the provided equations.
The MCP1632 device is equipped with a blanking
circuit for the CS pin in order to prevent any false resets
of the RS latch due to noise. However, for certain
applications, it is recommended to place a small value
capacitor (CFILTER) between the CS pin and GND to
provide additional filtering for the current sense signal.
The recommended value ranges from 10 pF to 30 pF.
Use caution, because a higher value may affect the
slope compensation ramp.
FIGURE 4-2: Slope Compensation
Circuit.
CLK
/S
EA Out
ISENSE
R/
Comp
Out
Q
VDRIVE
VEXT
Ramp
Signal
Oscillator
CS
300/600 kHz
V
EXT
Ramp +1
6k:
L
To PWM
Comparator
Q
R
SENSE
R
SLOPE
C
FILTER
(Optional)
0.9 V
PP
R
G
2013 Microchip Technology Inc. DS20005254A-page 15
MCP1632
FIGURE 4-3: Slope Compensation Signal
(CS) Pin.
4.7 Reference Voltage Generator
The internal precision constant current generator and
an external resistor connected between the VREF pin
and GND form the reference voltage generator. Refer
to Figure 4-4 for details. Optionally, a capacitor (CSS)
can be connected in parallel with RVREF to activate the
soft start function that will minimize overshoots of the
output voltage during start-up. The equations in
Figure 4-4 calculate the value of the resistor (RVREF)
for a given reference voltage and the value of the soft
start capacitor (CSS) based on the necessary time to
reach 90% of the final value for VREF
. An internal circuit
of the MCP1632 device will discharge the capacitor
during the shutdown period. This capacitor must be of
good quality, with low leakage currents, in order to
avoid any errors that can affect the reference voltage.
The reference voltage should not exceed 80% of the
bias input voltage (VIN pin) in order to avoid any errors
that affect the internal constant current generator.
An external low-noise, low-impedance source can be
used to overdrive the VREF pin in order to control the
reference voltage. In this case, the resistor/capacitor
group connected to GND is not necessary, and the soft
start profile must be controlled by the external
reference voltage generator.
FIGURE 4-4: Reference Voltage
Generator.
4.8 Internal Oscillator
The MCP1632 PWM controller provides two
(orderable) switching frequency options: 300 kHz and
600 kHz.
4.9 Undervoltage Lockout (UVLO)
When the input voltage (VIN) is less than the UVLO
threshold, the VEXT is held in low state. This will ensure
that, if the voltage is not adequate to power the
MCP1632 device, the main power supply switch will be
held in off state. In order to prevent oscillations when
the input voltage is near the UVLO threshold, the UVLO
circuit offers 100 mV (typical) hysteresis. Typically, the
MCP1632 device will not start until the input voltage at
VIN is between 2.8V and 2.9V (typical).
4.10 Overtemperature Protection
To protect the VEXT output if shorted to VIN or GND, the
VEXT output of the MCP1632 device will be
high-impedance if the junction temperature is above
the thermal shutdown threshold. An internal 10 k
pull-down resistor is connected from VEXT to ground to
provide some pull-down during overtemperature
conditions. The protection is set to 150°C (typical), with
a hysteresis of 20°C.
Slope VPP
0.9 VPP

RSLOPE
RSLOPE RG
+
--------------------------------------
=
DCLOW V 0.32 V
RSLOPE
RSLOPE RG
+
--------------------------------------
=
DCHIGH V 1.22 V
RSLOPE
RSLOPE RG
+
--------------------------------------
=
Amplitude (V)
Slope
(V)
Time
DC
LOW
DC
HIGH
RVREF

VREF V
50
A
------------------------=
CSS F ts
2.3 RVREF

-------------------------------------------=
VREF
VIN
50 μA
VREF
RVREF
CSS
Time(s)
VREF
0.9*VREF
Amplitude (V)
MCP1632
DS20005254A-page 16 2013 Microchip Technology Inc.
NOTES:
2013 Microchip Technology Inc. DS20005254A-page 17
MCP1632
5.0 APPLICATION CIRCUITS
5.1 Typical Applications
The MCP1632 PWM controller can be used for
applications that require low-side MOSFET control,
such as Boost, Buck-Boost, Flyback, SEPIC or Ćuk
converters. By using an external high-side MOSFET
driver (e.g. MCP14628), the MCP1632 device is able to
control the buck converter. The MCP1632 PWM
controller can be easily interfaced with a
microcontroller in order to develop intelligent solutions,
such as battery chargers or LED drivers.
Figure 5-1 depicts the typical boost converter
controlled by MCP1632. The input voltage applied on
the VIN pin of the MCP1632 device should be kept
below 5.5V. If the converter must operate with input
voltages higher than 5.5V, a linear voltage regulator
can be used to bias the MCP1632 controller. The Peak
Current Mode control used in this case will ensure
consistent performance over a wide range of operating
conditions.
The Q1 MOSFET is protected against overcurrent by
internally limiting the maximum voltage at the output of
the error amplifier of the controller. If the voltage
applied on the CS pin exceeds 0.9V, the MCP1632
device will reduce the duty cycle in order to prevent
overcurrent in Q1 MOSFET. The maximum drain peak
current in Q1 can be calculated using Equation 5-1.
The slope compensation ramp amplitude may limit the
maximum peak current and must be considered when
calculating this parameter. The DC offset of the slope
compensation ramp (DCHIGH) is calculated using the
equations provided in Figure 4-3.
Note that the boost converter is not protected against
the output short circuit.
EQUATION 5-1:
FIGURE 5-1: MCP1632 Boost Converter.
IPeakMax A
0.9V D DCHIGH V–
RSENSE 
--------------------------------------------------------------=
MCP1632
R
VREF
C
SS
V
IN
V
OUT
V
REF
COMP
EN
FB
CS
V
EXT
GND
V
IN
LDO
Q1
R
SENSE
R
SLOPE
L1
D1
+
-
+
-
C
IN
C
OUT
R
1
R
2
R
3
MCP1632
DS20005254A-page 18 2013 Microchip Technology Inc.
The single-ended primary inductor converter (SEPIC)
used to drive an LED string is presented in Figure 5-2.
This converter offers buck-boost functionality and is
protected against the output short circuit. The inductors
can share the same magnetic core (coupled inductors);
in this case, the mutual inductance doubles the value of
the inductor, reducing the ripple of the current. The LED
string can be dimmed by driving the EN pin (PWM
dimming) or by adjusting the value of the RVREF
resistor (current dimming). The maximum allowable
peak current into Q1 MOSFET can be calculated using
Equation 5-1. The SEPIC converter exhibits poor
dynamic performance and is recommended only for
applications with low step response demands, like LED
drivers or battery chargers.
FIGURE 5-2: MCP1632 SEPIC Converter.
MCP1632
R
VREF
C
SS
V
IN
V
REF
COMP
EN
FB
CS
V
EXT
GND
V
IN
LDO
Q1
R
SENSE
R
SLOPE
L1A
D1
+
-C
IN
C
OUT
L1B
R
S
R
1
C
C
C
1
C
2
C
3
R
2
R
3
2013 Microchip Technology Inc. DS20005254A-page 19
MCP1632
A typical charger application for one- or two-cell Li-Ion batteries is presented in
Figure 5-3. The PIC microcontroller handles all the necessary functions of the
charger and the MCP1632 device controls the power train. Using the SEPIC
converter allows developing a universal charger where the input voltage can be
higher or lower than the battery voltage. The microcontroller can control the
reference voltage across certain limits using its internal high-frequency PWM
generator and the external circuit consisting of D2 and R1.
This circuit can be replaced with a digital-to-analog converter (DAC) for a better
range and accuracy of the reference voltage control. The charging current is
monitored using a low-side shunt (RS) and an inverting amplifier. The floating
voltage of the charger is controlled by MCP1632 and can be adjusted by varying
the value of the RVREF resistor or the ratio of the feedback divider (R5, R6).
Additional protection features can be implemented in the microcontroller’s
firmware.
FIGURE 5-3: Battery Charger Circuit.
MCP1632
RVREF
CSS
VIN
VREF
COMP
EN
FB
CS
VEXT
GND
VIN
LDO
Q1
RSENSE
RSLOPE
L1A
D1
+
-CIN
COUT
L1B
RS
R1
CC
C1
C2
C3R2
R3
Battery
PIC
Micro
-
+
VSENSE
CSENSE
VSENSE
Status
AN1
AN2
PWM
I/O
I/O
VCC
D2
R4
R5
R6
R7
R8
MCP1632
DS20005254A-page 20 2013 Microchip Technology Inc.
5.2 Oper ation in Voltage Mode Control
The MCP1632 PWM controller can operate in Voltage
Mode Control using the internal slope compensation
ramp to generate the PWM signal. The current sense
resistor is not necessary for this application, thus the
overall efficiency of the converter can be improved.
Refer to Typical Application Circuit – Voltage Mode
Control. Certain limitations occur in this operating
mode. The compensation network for Voltage Mode
Control must be of Type III, increasing the number of
components.The closed-loop system is now a second
order system and stability can be difficult to achieve
over a wide range of operating conditions. The position
of the dominant pole (double pole) in boost-derived
converters varies with the operating conditions
(input/output voltages); maintaining acceptable phase
and gain margins across the entire operating range of
the converter becomes a difficult task in this case.
Note that there is no inherent protection mechanism
that can limit the inductor’s current during transients or
overloads. A resistor placed between the CS pin and
GND allows adjusting the maximum duty cycle by
controlling the amplitude of the ramp signal. Refer to
Figure 5-4 for details. If the RDC Adj resistor is not
placed, the maximum duty cycle is set to approximately
60% (typical). The duty cycle can be increased up to
85% (typical) by adjusting the value of the RDC Adj
resistor. The designer must limit the maximum
operating duty cycle of the converter to a safe value by
adjusting the value of this resistor. The DC offset of the
ramp enables operation with 0% duty cycle if the output
of the error amplifier divided by 3 is lower than DCLOW.
The Voltage Mode Control should be used only for
systems with low input voltages, low DC conversion
ratios and limited dynamics of the load (e.g., LED
drivers or battery chargers).
FIGURE 5-4: Voltage Mode Operation Details.
Oscillator
CS
300/600 kHz
VEXT
RAMP
+1
6k:
L
PWM
Q
RDC Adj
0.9 VPP
RG
+
-
EA
+
-2R
R
2.7V
2013 Microchip Technology Inc. DS20005254A-page 21
MCP1632
5.3 PCB Layout Recommendations
The PCB layout is critical for switch-mode power
supplies. When developing the PCB, the designer must
follow the general rules for switching converters in
order to achieve consistent performance. The
guidelines include:
• Identify the high-current, high-frequency loops
before starting the PCB design. Figure 5-5 depicts
these loops for boost converters. I1 and I2 are the
main currents of the boost converter. The IRR is
the current produced by the reverse recovery of
the output rectifier D1. The IRR current is an
important source of noise/EMI.
• Minimize the area of the high-current loops. Use
copper planes or large traces for high-current
connections in order to minimize the parasitic
inductances.
• Four-layer PCBs with internal ground plane offer
the best performance for switch-mode power
supplies. For cost-sensitive applications,
two-layer PCBs can be used. In this case, the
bottom layer must be used like a ground plane.
• Use separate grounds for small-signal and power
signals. These grounds must be connected (when
possible) in a single point located near the GND
pin of the MCP1632 controller.
• Keep the current sense (CS) and feedback (FB)
signals away from noisy nodes, such as the drain
of the main switch (Q1).
• Locate the compensation network components
near the MCP1632 case.
FIGURE 5-5: The Boost Converter’s Current Loops.
MCP1632
V
IN
V
OUT
V
REF
COMP
EN
FB
CS
V
EXT
GND
V
IN
Q1
R
SENSE
R
SLOPE
L1
D1
+
-
+
-
C
IN
C
OUT
I
RR
I
DR
I
1
I
2
MCP1632
DS20005254A-page 22 2013 Microchip Technology Inc.
NOTES:
2013 Microchip Technology Inc. DS20005254A-page 23
MCP1632
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
8-Lead DFN (2x3x0.9 mm) Example
ACD
349
25
Part Number Code
MCP1632-AAE/MC ACD
MCP1632-BAE/MC ACY
MCP1632T-AAE/MC ACD
MCP1632T-BAE/MC ACY
8-Lead MSOP (3x3 mm) Example
1632AA
349256
MCP1632
DS20005254A-page 24 2013 Microchip Technology Inc.
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&RQWDFW:LGWK E   
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D
N
E
NOTE 1
12
EXPOSED PAD
NOTE 1
21
D2
K
L
E2
N
e
b
A3 A1
A
NOTE 2
BOTTOM VIEW
TOP VIEW
0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &&
2013 Microchip Technology Inc. DS20005254A-page 25
MCP1632
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP1632
DS20005254A-page 26 2013 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2013 Microchip Technology Inc. DS20005254A-page 27
MCP1632
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP1632
DS20005254A-page 28 2013 Microchip Technology Inc.
8-Lead Plastic Micro Small Outline Package (UA) [MSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2013 Microchip Technology Inc. DS20005254A-page 29
MCP1632
APPENDIX A: REVISION HISTORY
Revision A (December 2013)
• Original Release of this Document.
MCP1632
DS20005254A-page 30 2013 Microchip Technology Inc.
NOTES:
2013 Microchip Technology Inc. DS20005254A-page 31
MCP1632
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP1632: High-speed, low-side PWM controller
MCP1632T: High-speed, low-side PWM controller
(Tape and Reel)
Frequency: AA = 300 kHz
BA = 600 kHz
Temperature Range: E = -40°C to +125°C
Package: MC = Plastic Dual Flat, No Lead – 2x3x0.9 mm body
(DFN)
MS = Plastic Micro Small Outline
PART NO. X/XX
PackageTemperature
Range
Device
Examples:
a) MCP1632-AAE/MC: Extended temperature,
8LD 2x3 DFN package
b) MCP1632T-AAE/MC: Tape and Reel,
Extended temperature,
8LD 2x3 DFN package
c) MCP1632-BAE/MC: Extended temperature,
8LD 2x3 DFN package
d) MCP1632T-BAE/MC: Tape and Reel,
Extended temperature,
8LD 2x3 DFN package
a) MCP1632-AAE/MS: Extended temperature,
8LD MSOP package
b) MCP1632T-AAE/MS: Tape and Reel,
Extended temperature,
8LD MSOP package
c) MCP1632-BAE/MS: Extended temperature,
8LD MSOP package
d) MCP1632T-BAE/MS: Tape and Reel,
Extended temperature,
8LD MSOP package
XX
Frequency
MCP1632
DS20005254A-page 32 2013 Microchip Technology Inc.
NOTES:
2013 Microchip Technology Inc. DS20005254A-page 33
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2013, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62077-770-1
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS20005254A-page 34 2013 Microchip Technology Inc.
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China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
ASIA/PACIFIC
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
India - Pune
Tel: 91-20-3019-1500
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Taiwan - T aipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
Thailand - Bangko k
Tel: 66-2-694-1351
Fax: 66-2-694-1350
EUROPE
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Cop e nha gen
Tel: 45-4450-2828
Fax: 45-4485-2829
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Dusseldorf
Tel: 49-2129-3766400
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Pforzheim
Tel: 49-7231-424750
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Venice
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Poland - Warsaw
Tel: 48-22-3325737
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
Worldwide Sales and Service
10/28/13