NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Timing From Microseconds to Hours
D
Astable or Monostable Operation
D
Adjustable Duty Cycle
D
TTL-Compatible Output Can Sink or
Source up to 200 mA
D
Functionally Interchangeable With the
Signetics NE555, SA555, SE555, SE555C;
Have Same Pinout
SE555C FROM TI IS NOT RECOMMENDED
FOR NEW DESIGNS
description
These devices are precision monolithic timing
circuits capable of producing accurate time delays
or oscillation. In the time-delay or monostable
mode of operation, the timed interval is controlled
by a single external resistor and capacitor
network. In the astable mode of operation, the
frequency and duty cycle may be independently
controlled with two external resistors and a single
external capacitor.
The threshold and trigger levels are normally two-thirds and one-third, respectively, of VCC. These levels can
be altered by use of the control voltage terminal. When the trigger input falls below the trigger level, the flip-flop
is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above
the threshold level, the flip-flop is reset and the output is low. RESET can override all other inputs and can be
used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low.
Whenever the output is low, a low-impedance path is provided between DISCH and ground.
The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of
5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.
The NE555 is characterized for operation from 0°C to 70°C. The SA555 is characterized for operation from
–40°C to 85°C. The SE555 and SE555C are characterized for operation over the full military range of –55°C
to 125°C.
AVAILABLE OPTIONS
PACKAGE
CHIP FORM
TAVTHRES max
VCC = 15 V SMALL OUTLINE
(D) CHIP CARRIER
(FK) CERAMIC DIP
(J) PLASTIC DIP
(P)
CHIP
FORM
(Y)
0°C to 70°C11.2 V NE555D NE555P
–40°C to 85°C11.2 V SA555D SA555P
NE555Y
–55°C to 125°C10.6 V
11.2 V SE555D
SE555CD SE555FK
SE555CFK SE555JG
SE555CJG SE555P
SE555CP
NE555Y
The D package is available taped and reeled. Add the suffix R to the device type (e.g., NE555DR).
Copyright 1992, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
8
7
6
5
GND
TRIG
OUT
RESET
VCC
DISCH
THRES
CONT
D, JG, OR P PACKAGE
(TOP VIEW)
32120 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
DISCH
NC
THRES
NC
NC
TRIG
NC
OUT
NC
FK PACKAGE
(TOP VIEW)
NC
GND
NC
CONT
NC VCC
NC
NC
RESET
NC
NC–No internal connection
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
RESET TRIGGER VOLTAGE†THRESHOLD VOLTAGE†OUTPUT DISCHARGE SWITCH
Low Irrelevant Irrelevant Low On
High < 1/3 VDD Irrelevant High Off
High > 1/3 VDD > 2/3 VDD Low On
High > 1/3 VDD < 2/3 VDD As previously established
†Voltage levels shown are nominal.
functional block diagram
1
R
R
S
R
R1
TRIG
THRES
R
VCC CONT
RESET
OUT
DISCH
GND
Î
Î
Î
ÎÎ
ÎÎ
Î
RESET can override TRIG, which can override THRES.
Pin numbers shown are for the D, JG, and P packages only.
4
8
5
6
2
1
7
3
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
chip information
These chips, properly assembled, display characteristics similar to the NE555 (see electrical table for NE555Y).
Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be
mounted with conductive epoxy or a gold-silicon preform.
GND
RESET
(4)
CONT
VCC
(8)
1
THRES
TRIG
R
R
R
DISCH
OUT
S
R
R1
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJ max = 150°C
TOLERANCES ARE ± 10%
ALL DIMENSIONS ARE IN MILS
PIN (1) INTERNALLY CONNECTED
TO BACKSIDE OF CHIP
(5)
(6)
(2)
(1)
(7)
(3)
BONDING PAD ASSIGNMENTS
41
42
(1)
(2)
(3)
(4)
(8)
(7)
(6)
(5)
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (See Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (CONT, RESET, THRES, and TRIG) VCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current ±225 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: NE555 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SA555 –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SE555, SE555C –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING TA = 125°C
POWER RATING
D725 mW 5.8 mW/°C464 mW 377 mW N/A
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG (SE555, SE555C) 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
JG (SA555, NE555C) 825 mW 6.6 mW/°C 528 mW 429 mW N/A
P1000 mW 8.0 mW/°C640 mW 520 mW N/A
recommended operating conditions
NE555 SA555 SE555 SE555C
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
UNIT
Supply voltage, VCC 4.5 16 4.5 16 4.5 18 4.5 16 V
Input voltage (CONT, RESET, THRES, and TRIG) VCC VCC VCC VCC V
Output current ±200 ±200 ±200 ±200 mA
Operating free-air temperature, TA0 70 –40 85 –55 125 –55 125 °C
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS SE555 NE555, SA555,
SE555C UNIT
MIN TYP MAX MIN TYP MAX
THRES voltage level
VCC = 15 V 9.4 10 10.6 8.8 10 11.2
V
THRES
v
oltage
le
v
el
VCC = 5 V 2.7 3.3 4 2.4 3.3 4.2
V
THRES current (see Note 2) 30 250 30 250 nA
TRIG voltage level
VCC = 15 V 4.8 5 5.2 4.5 5 5.6
V
TRIG
v
oltage
le
v
el
VCC = 5 V 1.45 1.67 1.9 1.1 1.67 2.2
V
TRIG current TRIG at 0 V 0.5 0.9 0.5 2µA
RESET voltage level 0.3 0.7 1 0.3 0.7 1 V
RESET current
RESET at VCC 0.1 0.4 0.1 0.4
mA
RESET
c
u
rrent
RESET at 0 V –0.4 –1 –0.4 –1.5
mA
DISCH switch off-state current 20 100 20 100 nA
CONT voltage (o
p
en circuit)
VCC = 15 V 9.6 10 10.4 9 10 11
V
CONT
v
oltage
(open
circ
u
it)
VCC = 5 V 2.9 3.3 3.8 2.6 3.3 4
V
IOL = 10 mA 0.1 0.15 0.1 0.25
VCC =15V
IOL = 50 mA 0.4 0.5 0.4 0.75
Low level out
p
ut voltage
V
CC =
15
V
IOL = 100 mA 2 2.2 2 2.5
V
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
IOL = 200 mA 2.5 2.5
V
VCC =5V
IOL = 5 mA 0.1 0.2 0.1 0.35
V
CC =
5
V
IOL = 8 mA 0.15 0.25 0.15 0.4
VCC =15V
IOH = –100 mA 13 13.3 12.75 13.3
High-level output voltage
V
CC =
15
V
IOH = –200 mA 12.5 12.5 V
VCC = 5 V IOH = –100 mA 3 3.3 2.75 3.3
Out
p
ut low
No load
VCC = 15 V 10 12 10 15
Su
pp
ly current
O
u
tp
u
t
lo
w,
No
load
VCC = 5 V 3 5 3 6
mA
S
u
ppl
y
c
u
rrent
Out
p
ut high
No load
VCC = 15 V 9 10 9 13
mA
O
u
tp
u
t
high
,
No
load
VCC = 5 V 2 4 2 5
NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when
VCC = 5 V, the maximum value is R = RA + RB ≈ 3.4 MΩ, and for VCC = 15 V, the maximum value is 10 MΩ.
operating characteristics, VCC = 5 V and 15 V
PARAMETER TEST
SE555 NE555, SA555,
SE555C UNIT
MIN TYP MAX MIN TYP MAX
Initial error of timing interval‡
Each timer , monostable§
°
0.5% 1.5% 1% 3%
Initial
error
of
timing
interval‡
Each timer, astable¶
A =
1.5% 2.25%
Temperature coefficient Each timer, monostable§
30 100 50 pp
m/
°
C
of timing interval Each timer, astable¶
A =
90 150
ppm/°C
Supply voltage sensitivity Each timer , monostable§
°
0.05 0.2 0.1 0.5
%/V
yg y
of timing interval Each timer, astable¶
A =
0.15 0.3
%/V
Output pulse rise time C
= 15 pF, 100 200 100 300
ns
Output pulse fall time
TA = 25°C100 200 100 300
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process
run.
§Values specified are for a device in a monostable circuit similar to Figure 9, with component values as follow: RA = 2 kΩ to 100 kΩ, C = 0.1 µF.
Values specified are for a device in an astable circuit similar to Figure 12, with component values as follow: RA = 1 kΩ to 100 kΩ, C = 0.1 µF.
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
THRES voltage level
VCC = 15 V 8.8 10 11.2
V
THRES
v
oltage
le
v
el
VCC = 5 V 2.4 3.3 4.2
V
THRES current (see Note 2) 30 250 nA
TRIG voltage level
VCC = 15 V 4.5 5 5.6
V
TRIG
v
oltage
le
v
el
VCC = 5 V 1.1 1.67 2.2
V
TRIG current TRIG at 0 V 0.5 2µA
RESET voltage level 0.3 0.7 1 V
RESET current
RESET at VCC 0.1 0.4
mA
RESET
c
u
rrent
RESET at 0 V –0.4 –1.5
mA
DISCH switch off-state current 20 100 nA
CONT voltage (o
p
en circuit)
VCC = 15 V 9 10 11
V
CONT
v
oltage
(open
circ
u
it)
VCC = 5 V 2.6 3.3 4
V
IOL = 10 mA 0.1 0.25
VCC =15V
IOL = 50 mA 0.4 0.75
Low level out
p
ut voltage
V
CC =
15
V
IOL = 100 mA 2 2.5
V
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
IOL = 200 mA 2.5
V
VCC =5V
IOL = 5 mA 0.1 0.35
V
CC =
5
V
IOL = 8 mA 0.15 0.4
VCC =15V
IOH = –100 mA 12.75 13.3
High-level output voltage
V
CC =
15
V
IOH = –200 mA 12.5 V
VCC = 5 V IOH = –100 mA 2.75 3.3
Out
p
ut low No load
VCC = 15 V 10 15
Su
pp
ly current
O
u
tp
u
t
lo
w,
No
load
VCC = 5 V 3 6
mA
S
u
ppl
y
c
u
rrent
Out
p
ut high No load
VCC = 15 V 9 13
mA
O
u
tp
u
t
high
,
No
load
VCC = 5 V 2 5
NOTE 2: This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when
VCC = 5 V, the maximum value is R = RA + RB ≈ 3.4 MΩ, and for VCC = 15 V, the maximum value is 10 MΩ
operating characteristics, VCC = 5 V and 15 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST
CONDITIONS MIN TYP MAX UNIT
Initial error of timing interval†
Each timer , monostable‡1% 3%
I
n
iti
a
l
error o
f
ti
m
i
ng
i
n
t
erva
l†
Each timer, astable§2.25%
Su
pp
ly voltage sensitivity of timing interval
Each timer , monostable‡0.1 0.5
%/V
S
u
ppl
y v
oltage
sensiti
v
it
y
of
timing
inter
v
al
Each timer, astable§0.3
%/V
Output pulse rise time
CL=15
p
F
100 300
ns
Output pulse fall time
C
L =
15
pF
100 300
ns
†Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process
run.
‡Values specified are for a device in a monostable circuit similar to Figure 9, with component values as follow: RA = 2 kΩ to 100 kΩ, C = 0.1 µF.
§Values specified are for a device in an astable circuit similar to Figure 12, with component values as follow: RA = 1 kΩ to 100 kΩ, C = 0.1 µF.
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 1
ÏÏÏÏ
TA = 125°C
ÏÏÏ
TA = 25°C
IOL – Low-Level Output Current – mA
ÏÏÏÏ
ÏÏÏÏ
VCC = 5 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
ÏÏÏÏÏ
ÏÏÏÏÏ
TA = – 55°C
0.1
0.04
0.01 1 2 4 7 10 20 40 70 100
0.07
1
0.4
0.7
10
4
7
0.02
0.2
2
– Low-Level Output Voltage – VVOL
Figure 2
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = 10 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
– Low-Level Output Voltage – VVOL
IOL – Low-Level Output Current – mA
0.1
0.04
0.01 1 2 4 7 10 20 40 70 100
0.07
1
0.4
0.7
10
4
7
0.02
0.2
2
ÏÏÏÏ
TA = 125°C
ÏÏÏÏ
ÏÏÏÏ
TA = 25°C
ÏÏÏÏ
ÏÏÏÏ
TA= – 55°C
Figure 3
TA = 125°C
TA = 25°C
TA = – 55°C
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = 15 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
– Low-Level Output Voltage – VVOL
IOL – Low-Level Output Current – mA
0.1
0.04
0.01 1 2 4 7 10 20 40 70 100
0.07
1
0.4
0.7
10
4
7
0.02
0.2
2
Figure 4
1
0.6
0.2
0
1.4
1.8
2.0
0.4
1.6
0.8
1.2
–
IOH – High-Level Output Current – mA
ÏÏÏÏ
TA = 125°C
ÏÏÏÏ
ÏÏÏÏ
TA = 25°C
100704020107421
ÏÏÏÏÏÏ
VCC = 5 V to 15 V
ÏÏÏÏ
TA = – 55°C
DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT
vs
HIGH-LEVEL OUTPUT CURRENT
VCC VOH – Voltage Drop – V
†Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only.
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 5
5
4
2
1
0
9
3
567891011
– Supply Current – mA
7
6
8
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
10
12 13 14 15
TA = 25°C
TA = 125°C
TA = –55°C
Output Low ,
No Load
CC
I
VCC – Supply Voltage – V
Figure 6
1
0.995
0.990
0.9850510
1.005
1.010
NORMALIZED OUTPUT PULSE DURATION
(MONOSTABLE OPERATION)
vs
SUPPLY VOLTAGE
1.015
15 20
CC
VPulse Duration Relative to Value at = 10 V
VCC – Supply Voltage – V
Figure 7
1
0.995
0.990
0.985
–75 –25 25
1.005
1.010
NORMALIZED OUTPUT PULSE DURATION
(MONOSTABLE OPERATION)
vs
FREE-AIR TEMPERATURE
1.015
75 125
Pulse Duration Relative to Value at = 25
TA – Free-Air Temperature – °C
–50 0 50 100
VCC = 10 V
TAC
°
Figure 8
150
100
50
0
200
250
300
– Propagation Delay Time – ns
PROPAGATION DELAY TIME
vs
LOWEST VOLTAGE LEVEL
OF TRIGGER PULSE
Lowest Voltage Level of Trigger Pulse
TA = –55°C
TA = 125°C
TA = 25°C
tPD
TA = 0°C
TA = 70°C
0 0.1 x VCC 0.2 x VCC 0.3 x VCC 0.4 x VCC
†Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only.
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
monostable operation
For monostable operation, any of these timers may be connected as shown in Figure 9. If the output is low,
application of a negative-going pulse to TRIG sets the flip-flop (Q goes low), drives the output high, and turns
off Q1. Capacitor C is then charged through RA until the voltage across the capacitor reaches the threshold
voltage of THRES input. If TRIG has returned to a high level, the output of the threshold comparator will reset
the flip-flop (Q goes high), drive the output low, and discharge C through Q1.
VCC
(5 V to 15 V)
RA
RL
Output
GND
OUT
VCC
CONT
RESET
DISCH
THRES
TRIGInput
ÎÎ
58
4
7
6
2
3
1
Pin numbers shown are for the D, JG, and P packages.
Figure 9. Circuit for Monostable Operation
Voltage – 2 V/div
Time – 0.1 ms/div
ÏÏÏÏÏÏ
Capacitor Voltage
Output Voltage
Input Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
RA = 9.1 kΩ
CL = 0.01 µF
RL = 1 kΩ
See Figure 9
Figure 10. Typical Monostable Waveforms
Monostable operation is initiated when TRIG
voltage falls below the trigger threshold. Once
initiated, the sequence ends only if TRIG is high
at the end of the timing interval. Because of the
threshold level and saturation voltage of Q1,
the output pulse duration is approximately
tw = 1.1RAC. Figure 11 is a plot of the time
constant for various values of RA and C. The
threshold levels and charge rates are both directly
proportional to the supply voltage, VCC. The timing
interval is therefore independent of the supply
voltage, so long as the supply voltage is constant
during the time interval.
Applying a negative-going trigger pulse simulta-
neously to RESET and TRIG during the timing
interval discharges C and re-initiates the cycle,
commencing on the positive edge of the reset
pulse. The output is held low as long as the reset
pulse is low. To prevent false triggering, when
RESET is not used, it should be connected to VCC.
– Output Pulse Duration – s
C – Capacitance – µF
10
1
10–1
10–2
10–3
10–4
1001010.10.01
10–5
0.001
tw
RA = 10 MΩ
RA = 10 kΩ
RA = 1 kΩ
RA = 100 kΩ
RA = 1 MΩ
Figure 11. Output Pulse Duration vs Capacitance
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
astable operation
As shown in Figure 12, adding a second resistor , R B, to the circuit of Figure 9 and connecting the trigger input
to the threshold input causes the timer to self-trigger and run as a multivibrator. The capacitor C will charge
through RA and RB and then discharge through RB only. The duty cycle may be controlled, therefore, by the
values of RA and RB.
This astable connection results in capacitor C charging and discharging between the threshold-voltage level
(≈0.67•VCC) and the trigger-voltage level (≈0.33•VCC). As in the monostable circuit, charge and discharge
times (and therefore the frequency and duty cycle) are independent of the supply voltage.
GND
OUT
VCC
CONT
RESET
DISCH
THRES
TRIG
C
RB
RA
Output
RL
0.01 µF
VCC
(5 V to 15 V)
(see Note A)
Î
NOTE A: Decoupling CONT voltage to ground with a
capacitor may improve operation. This should be
evaluated for individual applications.
Open
58
4
7
6
2
3
1
Pin numbrs shown are for the D, JG, and P packages.
Figure 12. Circuit for Astable Operation
Voltage – 1 V/div
Time – 0.5 ms/div
tH
Capacitor Voltage
Output Voltage
tL
ÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏ
RA = 5 kΩ RL = 1 kΩ
RB = 3 kΩ See Figure 12
C = 0.15 µF
Figure 13. Typical Astable Waveforms
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Figure 13 shows typical waveforms generated during astable operation. The output high-level duration tH and
low-level duration tL may be calculated as follows:
tH
+
0.693 (RA
)
RB) C
tL
+
0.693 (RB) C
Other useful relationships are shown below.
period
+
tH
)
tL
+
0.693 (RA
)
2RB)C
frequency
[
1.44
(RA
)
2RB)C
Output driver duty cycle
+
tL
tH
)
tL
+
RB
RA
)
2RB
Output waveform duty cycle
Low t high ratio
+
tL
tH
+
RB
RA
)
RB
-o-
+
tH
tH
)
tL
+
1– RB
RA
)
2RB
f – Free-Running Frequency – Hz
C – Capacitance – µF
100 k
10 k
1 k
100
10
1
1001010.10.01
0.1
0.001
RA + 2 RB = 10 MΩ
RA + 2 RB = 1 MΩ
RA + 2 RB = 100 kΩ
RA + 2 RB = 10 kΩ
RA + 2 RB = 1 kΩ
Figure 14. Free-Running Frequency
missing-pulse detector
The circuit shown in Figure 15 may be used to detect a missing pulse or abnormally long spacing between
consecutive pulses in a train of pulses. The timing interval of the monostable circuit is continuously retriggered
by the input pulse train as long as the pulse spacing is less than the timing interval. A longer pulse spacing,
missing pulse, or terminated pulse train permits the timing interval to be completed, thereby generating an
output pulse as illustrated in Figure 16.
Figure 15. Circuit for Missing Pulse Detector
VCC (5 V to 15 V)
DISCH
OUT
VCC
RESET
RLRA
A5T3644
C
THRES
GND
CONT
TRIG
Input
0.01 µF
ÏÏÏ
ÏÏÏ
Output
48
3
7
6
2
5
1
Pin numbers shown are shown for the D, JG, and P packages.
Figure 16. Circuit for Missing Pulse Detector
Time – 0.1 ms/div
Voltage – 2 V/div
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = 5 V
RA = 1 kΩ
C = 0.1 µF
See Figure 15
Capacitor Voltage
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Output Voltage
Input Voltage
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
frequency divider
By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequency
divider. Figure 17 illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur
during the timing cycle.
Voltage – 2 V/div
Time – 0.1 ms/div
Capacitor Voltage
Output Voltage
Input Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = 5 V
RA = 1250 Ω
C = 0.02 µF
See Figure 9
Figure 17. Divide-By-Three Circuit Waveforms
pulse-width modulation
The operation of the timer may be modified by modulating the internal threshold and trigger voltages, which is
accomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-width
modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the
threshold voltage. Figure 19 illustrates the resulting output pulse-width modulation. While a sine-wave
modulation signal is illustrated, any wave shape could be used.
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
THRES
GND C
RA
RL
VCC (5 V to 15 V)
Outpu
t
DISCH
OUT
VCC
RESET
TRIG
CONT
Modulation
Input
(see Note A)
Clock
Input
NOTE A: The modulating signal may be direct or capacitively
coupled to CONT. For direct coupling, the effects of
modulation source voltage and impedance on the bias of
the timer should be considered.
48
3
7
6
2
5
Pin numbers shown are for the D, JG, and P packages only.
1
Figure 18. Circuit for Pulse-Width Modulation
Voltage – 2 V/div
Time – 0.5 ms/div
ÏÏÏÏÏÏ
Capacitor Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
Output Voltage
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
Clock Input Voltage
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
RA = 3 kΩ
C = 0.02 µF
RL = 1 kΩ
See Figure 18
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
Modulation Input Voltage
Figure 19. Pulse-Width Modulation Waveforms
pulse-position modulation
As shown in Figure 20, any of these timers may be used as a pulse-position modulator. This application
modulates the threshold voltage, and thereby the time delay, of a free-running oscillator. Figure 21 illustrates
a triangular-wave modulation signal for such a circuit; however, any wave shape could be used.
RB
Modulation
Input
(see Note A) CONT
TRIG
RESET VCC
OUT
DISCH
VCC (5 V to 15 V)
RLRA
C
GND
THRES
NOTE A: The modulating signal may be direct or capacitively
coupled to CONT. For direct coupling, the effects of
modulation source voltage and impedance on the bias of
the timer should be considered.
Pin numbers shown are for the D, JG, and P packages only.
48
3
7
6
2
5
Output
Figure 20. Circuit for Pulse-Position Modulation Figure 21. Pulse-Position-Modulation Waveforms
Voltage – 2 V/div
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
RA = 3 kΩ
RB = 500 Ω
RL = 1 kΩ
See Figure 20
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Capacitor Voltage
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Output Voltage
ÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏ
Modulation Input Voltage
Time – 0.1 ms/div
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUAR Y 1992
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
sequential timer
S
VCC
RESET VCC
OUT
DISCH
GND
CONT
TRIG
48
3
7
6
1
5
2
THRES
RC
CC
0.01
CC = 14.7 µF
RC = 100 kΩOutput C
RESET VCC
OUT
DISCH
GND
CONT
TRIG
48
3
7
6
1
5
2
THRES
RB33 kΩ
0.001
0.01
µF
CB = 4.7 µF
RB = 100 kΩ
Output BOutput A
RA = 100 kΩ
CA = 10 µF
µF
0.01
µF
0.001
33 kΩ
RA
THRES
2
5
1
6
7
3
84
TRIG
CONT
GND
DISCH
OUT
VCC
RESET
µF
µF
CB
CA
S closes momentarily at t = 0.
Pin numbers shown are for the D, JG, and P packages only.
Figure 22. Sequential Timer Circuit
Many applications, such as computers, require signals for initializing conditions during start-up. Other
applications, such as test equipment, require activation of test signals in sequence. These timing circuits may
be connected to provide such sequential control. The timers may be used in various combinations of astable
or monostable circuit connections, with or without modulation, for extremely flexible waveform control. Figure 22
illustrates a sequencer circuit with possible applications in many systems, and Figure 23 shows the output
waveforms.
Voltage – 5 V/div
t – Time – 1 s/div
ÏÏÏÏÏ
See Figure 22
ÏÏÏ
Output A
ÏÏÏ
ÏÏÏ
Output B
ÏÏÏ
Output C
ÏÏÏ
ÏÏÏ
t = 0
ÏÏÏÏÏ
twC = 1.1 RCCC
ÏÏ
twC
ÏÏÏÏÏ
twB = 1.1 RBCB
ÏÏÏÏÏÏ
twA = 1.1 RACA
ÏÏ
ÏÏ
twA
ÏÏÏ
ÏÏÏ
twB
Figure 23. Sequential Timer Waveforms
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