LMV7291
LMV7291 Single 1.8V Low Power Comparator with Rail-to-Rail Input
Literature Number: SNOSA86D
LMV7291
Single 1.8V Low Power Comparator with Rail-to-Rail
Input
General Description
The LMV7291 is a rail-to-rail input low power comparator,
characterized at supply voltage 1.8V, 2.7V and 5.0V. It con-
sumes only 9uA supply current per channel while achieving
a 800ns propagation delay.
The LMV7291 is available in SC70 package. With this tiny
package, the PC board area can be significantly reduced. It
is ideal for low voltage, low power and space critical designs.
The LMV7291 features a push-pull output stage which al-
lows operation with minimum power consumption when driv-
ing a load.
The LMV7291 is built with National Semiconductor’s ad-
vance submicron silicon-gate BiCMOS process. It has bipo-
lar inputs for improved noise performance and CMOS out-
puts for rail-to-rail output swing.
Features
(V
S
= 1.8V, T
A
= 25˚C, Typical values unless specified).
nSingle Supply
nUltra low supply current 9µA per channel
nLow input bias current 10nA
nLow input offset current 200pA
nLow guaranteed V
OS
4mV
nPropagation delay 880ns (20mV overdrive)
nInput common mode voltage range 0.1V beyond rails
Applications
nMobile communications
nLaptops and PDA’s
nBattery powered electronics
nGeneral purpose low voltage applications
Typical Circuit
20080024
FIGURE 1. Threshold Detector
March 2004
LMV7291 Single 1.8V Low Power Comparator with Rail-to-Rail Input
© 2004 National Semiconductor Corporation DS200800 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance 2KV (Note 2)
200V (Note 6)
V
IN
Differential ±Supply Voltage
Supply Voltage (V
+
-V
) 5.5V
Voltage at Input/Output pins V
+
+0.1V, V
−0.1V
Soldering Information
Infrared or Convection (20 sec.) 235˚C
Wave Soldering (10 sec.) 260˚C
Storage Temperature Range −65˚C to +150˚C
Junction Temperature (Note 4) +150˚C
Operating Ratings (Note 1)
Operating Temperature Range
(Note 3) −40˚C to +85˚C
Package Thermal Resistance (Note 3)
SC-70 265˚C/W
1.8V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 1.8V, V
= 0V. Boldface limits apply at the temperature
extremes.
Symbol Parameter Condition Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
V
OS
Input Offset Voltage 0.3 4
6
mV
TC V
OS
Input Offset Temperature Drift V
CM
= 0.9V (Note 7) 10 uV/C
I
B
Input Bias Current 10 nA
I
OS
Input Offset Current 200 pA
I
S
Supply Current LMV7291 9 12
14 µA
I
SC
Output Short Circuit Current Sourcing, V
O
= 0.9V 3.5 6 mA
Sinking, V
O
= 0.9V 4 6
V
OH
Output Voltage High I
O
= 0.5mA 1.7 1.74 V
I
O
= 1.5mA 1.58 1.63
V
OL
Output Voltage Low I
O
= −0.5mA 52 70 mV
I
O
= −1.5mA 166 220
V
CM
Input Common Mode Voltage
Range
CMRR >45 dB 1.9 V
−0.1 V
CMRR Common Mode Rejection Ratio 0 <V
CM
<1.8V 47 78 dB
PSRR Power Supply Rejection Ratio V
+
= 1.8V to 5V 55 80 dB
I
LEAKAGE
Output Leakage Current V
O
= 1.8V 2 pA
1.8V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 1.8V, V
= 0V, V
CM
= 0.5V, V
O
=V
+
/2 and R
L
>1Mto
V
.Boldface limits apply at the temperature extremes.
Symbol Parameter Condition Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
t
PHL
Propagation Delay
(High to Low)
Input Overdrive = 20mV
Load = 50pF//5k
880 ns
Input Overdrive = 50mV
Load = 50pF//5k
570 ns
t
PLH
Propagation Delay
(Low to High)
Input Overdrive = 20mV
Load = 50pF//5k
1100 ns
Input Overdrive = 50mV
Load = 50pF//5k
800 ns
LMV7291
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2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 2.7V, V
= 0V. Boldface limits apply at the temperature
extremes.
Symbol Parameter Conditions Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
V
OS
Input Offset Voltage 0.3 4
6
mV
TC V
OS
Input Offset Temperature Drift V
CM
= 1.35V (Note 7) 10 µV/C
I
B
Input Bias Current 10 nA
I
OS
Input offset Current 200 pA
I
S
Supply Current LMV7291 9 13
15 µA
I
SC
Output Short Circuit Current Sourcing, V
O
= 1.35V 12 15 mA
Sinking, V
O
= 1.35V 12 15
V
OH
Output Voltage High I
O
= 0.5mA 2.63 2.66 V
I
O
= 2.0mA 2.48 2.55
V
OL
Output Voltage Low I
O
= −0.5mA 50 70 mV
I
O
= −2mA 155 220
V
CM
Input Common Voltage Range CMRR >45dB 2.8 V
−0.1 V
CMRR Common Mode Rejection Ratio 0 <V
CM
<2.7V 47 78 dB
PSRR Power Supply Rejection Ratio V
+
= 1.8V to 5V 55 80 dB
I
LEAKAGE
Output Leakage Current V
O
= 2.7V 2 pA
2.7V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 2.7V, V
= 0V, V
CM
= 0.5V, V
O
=V
+
/2 and R
L
>1Mto
V
.Boldface limits apply at the temperature extremes.
Symbol Parameter Condition Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
t
PHL
Propagation Delay
(High to Low)
Input Overdrive = 20mV
Load = 50pF//5k
1200 ns
Input Overdrive = 50mV
Load = 50pF//5k
810 ns
t
PLH
Propagation Delay
(Low to High)
Input Overdrive = 20mV
Load = 50pF//5k
1300 ns
Input Overdrive = 50mV
Load = 50pF//5k
860 ns
5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5V, V
= 0V. Boldface limits apply at the temperature ex-
tremes.
Symbol Parameter Conditions Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
V
OS
Input Offset Voltage 0.3 4
6
mV
TC V
OS
Input Offset Temperature Drift V
CM
= 2.5V (Note 7) 10 µV/C
I
B
Input Bias Current 10 nA
I
OS
Input Offset Current 200 pA
I
S
Supply Current LMV7291 10 14
16 µA
I
SC
Output Short Circuit Current Sourcing, V
O
= 2.5V 28 34 mA
Sinking, V
O
= 2.5V 28 34
LMV7291
www.national.com3
5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5V, V
= 0V. Boldface limits apply at the temperature ex-
tremes.
Symbol Parameter Conditions Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
V
OH
Output Voltage High I
O
= 0.5mA 4.93 4.96 V
I
O
= 4.0mA 4.70 4.77
V
OL
Output Voltage Low I
O
= −0.5mA 27 70 mV
I
O
= −4.0mA 225 300
V
CM
Input Common Voltage Range CMRR >45dB 5.1 V
−0.1
CMRR Common Mode Rejection Ratio 0 <V
CM
<5.0V 47 78 dB
PSRR Power Supply Rejection Ratio V
+
= 1.8V to 5V 55 80 dB
I
LEAKAGE
Output Leakage Current V
O
=5V 2 pA
5.0V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5.0V, V
= 0V, V
CM
= 0.5V, V
O
=V
+
/2 and R
L
>1Mto
V
.Boldface limits apply at the temperature extremes.
Symbol Parameter Condition Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
t
PHL
Propagation Delay
(High to Low)
Input Overdrive = 20mV
Load = 50pF//5k
2100 ns
Input Overdrive = 50mV
Load = 50pF//5k
1380 ns
t
PLH
Propagation Delay
(Low to High)
Input Overdrive = 20mV
Load = 50pF//5k
1800 ns
Input Overdrive = 50mV
Load = 50pF//5k
1100 ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5kin series with 100pF.
Note 3: The maximum power dissipation is a function of TJ(MAX),θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
PD=(T
J(MAX) -T
A)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 4: Typical values represent the most likely parametric norm.
Note 5: All limits are guaranteed by testing or statistical analysis.
Note 6: Machine Model, 0in series with 200pF.
Note 7: Offset Voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Note 8: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that TJ=T
A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ>TA.
Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.
LMV7291
www.national.com 4
Connection Diagram
5-Pin SC70
20080023
Top View
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
5-Pin SC70 LMV7291MG C36 1k Units Tape and Reel MAA05A
LMV7291MGX 3k Units Tape and Reel
LMV7291
www.national.com5
Typical Performance Characteristics
(T
A
= 25˚C, Unless otherwise specified).
V
OS
vs. V
CM
V
OS
vs. V
CM
20080028 20080029
V
OS
vs. V
CM
Short Circuit vs. Supply Voltage
20080030 20080001
Supply Current vs. Supply Voltage Supply Current vs. Supply Voltage
20080002 20080031
LMV7291
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Typical Performance Characteristics (T
A
= 25˚C, Unless otherwise specified). (Continued)
Supply Current vs. Supply Voltage Output Positive Swing vs. V
SUPPLY
20080032 20080033
Output Negative Swing vs. V
SUPPLY
Output Positive Swing vs. I
SOURCE
20080034 20080035
Output Negative Swing vs. I
SINK
Output Positive Swing vs. I
SOURCE
20080036 20080037
LMV7291
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Typical Performance Characteristics (T
A
= 25˚C, Unless otherwise specified). (Continued)
Output Negative Swing vs. I
SINK
Output Negative Swing vs. I
SINK
20080038 20080039
Output Positive Swing vs. I
SOURCE
Propagation Delay (t
PLH
)
20080040 20080014
Propagation Delay (t
PHL
) Propagation Delay (t
PLH
)
20080018 20080015
LMV7291
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Typical Performance Characteristics (T
A
= 25˚C, Unless otherwise specified). (Continued)
Propagation Delay (t
PHL
) Propagation Delay (t
PLH
)
20080020 20080016
Propagation Delay (t
PHL
)t
PHL
vs. Overdrive
20080022 20080050
t
PLH
vs. Overdrive
20080049
LMV7291
www.national.com9
Application Notes
BASIC COMPARATOR
A comparator is often used to convert an analog signal to a
digital signal. As shown in Figure 2, the comparator com-
pares an input voltage (V
IN
) to a reference voltage (V
REF
). If
V
IN
is less than V
REF
, the output (V
O
) is low. However, if V
IN
is greater than V
REF
, the output voltage (V
O
) is high.
RAIL-TO-RAIL INPUT STAGE
The LMV7291 has an input common mode voltage range
(V
CM
) of −0.1V below the V
to 0.1V above V
+
. This is
achieved by using paralleled PNP and NPN differential input
pairs. When the V
CM
is near V
+
, the NPN pair is on and the
PNP pair is off. When the V
CM
is near V
, the NPN pair is off
and the PNP pair is on. The crossover point between the
NPN and PNP input stages is around 950mV from V
+
. Since
each input stage has its own offset voltage (V
OS
), the V
OS
of
the comparator becomes a function of the V
CM
. See curves
for V
OS
vs. V
CM
in Typical Performance Characteristics sec-
tion. In application design, it is recommended to keep the
V
CM
away from the crossover point to avoid problems. The
wide input voltage range makes LMV7291 ideal in power
supply monitoring circuits, where the comparators are used
to sense signals close to gnd and power supplies.
OUTPUT STAGE
The LMV7291 has a push-pull output stage. This output
stage keeps the total system power consumption to the
absolute minimum. The only current consumed is the low
supply current and the current going directly into the load.
When output switches, both PMOS and NMOS at the output
stage are on at the same time for a very short time. This
allows current to flow directly between V
+
and V
through
output transistors. The result is a short spike of current
(shoot-through current) drawn from the supply and glitches
in the supply voltages. The glitches can spread to other parts
of the board as noise. To prevent the glitches in supply lines,
power supply bypass capacitors must be installed. See sec-
tion for supply bypassing in the Application Notes for details.
HYSTERESIS
It is a standard procedure to use hysteresis (positive feed-
back) around a comparator, to prevent oscillation, and to
avoid excessive noise on the output because the comparator
is a good amplifier of its own noise.
Inverting Comparator with Hysteresis
The inverting comparator with hysteresis requires a three
resistor network that are referenced to the supply voltage
V
CC
of the comparator (Figure 3). When V
IN
at the inverting
input is less than V
A
, the voltage at the non-inverting node of
the comparator (V
IN
<V
A
), the output voltage is high (for
simplicity assume V
O
switches as high as V
CC
). The three
network resistors can be represented as R
1
||R
3
in series with
R
2
. The lower input trip voltage V
A1
is defined as
When V
IN
is greater than V
A
(V
IN
>V
A
), the output voltage is
low and very close to ground. In this case the three network
resistors can be presented as R
2
//R
3
in series with R
1
. The
upper trip voltage V
A2
is defined as
The total hysteresis provided by the network is defined as
V
A
=V
A1
-V
A2
A good typical value of V
A
would be in the range of 5 to 50
mV. This is easily obtained by choosing R
3
as 1000 to 100
times (R
1
||R
2
) for 5V operation, or as 300 to 30 times
(R
1
||R
2
) for 1.8V operation.
LMV7291
20080025
20080017
FIGURE 2. LMV7291 Basic Comparator
LMV7291
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Application Notes (Continued)
Non-Inverting Comparator with Hysteresis
A non-inverting comparator with hysteresis requires a two
resistor network, and a voltage reference (V
REF
) at the in-
verting input (Figure 4). When V
IN
is low, the output is also
low. For the output to switch from low to high, V
IN
must rise
up to V
IN1
, where V
IN1
is calculated by
When V
IN
is high, the output is also high. To make the
comparator switch back to its low state, V
IN
must equal V
REF
before V
A
will again equal V
REF
.V
IN
can be calculated by:
The hysteresis of this circuit is the difference between V
IN1
and V
IN2
.
V
IN
=V
CC
R
1
/R
2
20080042
FIGURE 3. Inverting Comparator with Hysteresis
LMV7291
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Application Notes (Continued)
CIRCUIT TECHNIQUES FOR AVOIDING OSCILLATIONS
IN COMPARATOR APPLICATIONS
Feedback to almost any pin of a comparator can result in
oscillation. In addition, when the input signal is a slow volt-
age ramp or sine wave, the comparator may also burst into
oscillation near the crossing point. To avoid oscillation or
instability, PCB layout should be engineered thoughtfully.
Several precautions are recommended:
1. Power supply bypassing is critical, and will improve sta-
bility and transient response. Resistance and inductance
from power supply wires and board traces increase
power supply line impedance. When supply current
changes, the power supply line will move due to its im-
pedance. Large enough supply line shift will cause the
comparator to mis-operate. To avoid problems, a small
bypass capacitor, such as 0.1uF ceramic, should be
placed immediately adjacent to the supply pins. An addi-
tional 6.8µF or greater tantalum capacitor should be
placed at the point where the power supply for the com-
parator is introduced onto the board. These capacitors
act as an energy reservoir and keep the supply imped-
ance low. In dual supply application, a 0.1µF capacitor is
recommended to be placed across V
+
and V
pins.
2. Keep all leads short to reduce stray capacitance and lead
inductance. It will also minimize any unwanted coupling
from any high-level signals (such as the output). The
comparators can easily oscillate if the output lead is
inadvertently allowed to capacitively couple to the inputs
via stray capacitance. This shows up only during the
output voltage transition intervals as the comparator
changes states. Try to avoid a long loop which could act
as an inductor (coil).
3. It is a good practice to use an unbroken ground plane on
a printed circuit board to provide all components with a
low inductive ground connection. Make sure ground
paths are low-impedance where heavier currents are
flowing to avoid ground level shift. Preferably there
should be a ground plane under the component.
4. The output trace should be routed away from inputs. The
ground plane should extend between the output and
inputs to act as a guard.
5. When the signal source is applied through a resistive
network to one input of the comparator, it is usually
advantageous to connect the other input with a resistor
with the same value, for both DC and AC consideration.
Input traces should be laid out symmetrically if possible.
6. All pins of any unused comparators should be tied to the
negative supply.
Typical Applications
POSITIVE PEAK DETECTOR
A positive peak detect circuit is basically a comparator oper-
ated in a unity gain follower configuration, with a capacitor as
a load to maintain the highest voltage. A diode is added at
the output to prevent the capacitor from discharging through
the output, and a 1Mresistor added in parallel to the
capacitor to provide a high impedance discharge path. When
the input V
IN
increases, the inverting input of the comparator
follows it, thus charging the capacitor. When it decreases,
the cap discharges through the 1Mresistor. The decay
time can be modified by changing the resistor. The output
should be accessed through a follower circuit to prevent
loading.
NEGATIVE PEAK DETECTOR
For the negative detector, the output transistor of the com-
parator acts as a low impedance current sink. Since there is
no pull-up resistor, the only discharge path will be the 1M
resistor and any load impedance used. Decay time is
changed by varying the 1Mresistor.
20080044
20080043
FIGURE 4. Non-Inverting Comparator with Hysteresis
20080054
FIGURE 5. Positive Peak Detector
LMV7291
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Typical Applications (Continued)
SQUARE WAVE GENERATOR
A typical application for a comparator is as a square wave
oscillator. The circuit below generates a square wave whose
period is set by the RC time constant of the capacitor C
1
and
resistor R
4
. The maximum frequency is limited by the large
signal propagation delay of the comparator, and by the ca-
pacitive loading at the output, which limits the output slew
rate.
To analyze the circuit, consider it when the output is high.
That implies that the inverted input (V
C
) is lower than the
non-inverting input (V
A
). This causes the C
1
to get charged
through R
4,
and the voltage V
C
increases till it is equal to the
non-inverting input. The value of V
A
at this point is
If R
1
=R
2
=R
3
then V
A1
=2V
CC
/3
At this point the comparator switches pulling down the output
to the negative rail. The value of V
A
at this point is
If R
1
=R
2
=R
3
then V
A2
=V
CC
/3
The capacitor C
1
now discharges through R
4
, and the volt-
age V
C
decreases till it is equal to V
A2
, at which point the
comparator switches again, bringing it back to the initial
stage. The time period is equal to twice the time it takes to
discharge C
1
from 2V
CC
/3 to V
CC
/3, which is given by
R
4
C
1
.ln2. Hence the formula for the frequency is:
F = 1/(2.R
4
.C
1
.ln2)
20080055
FIGURE 6. Negative Peak Detector
20080056
20080057
FIGURE 7. Squarewave Oscillator
LMV7291
www.national.com13
Physical Dimensions inches (millimeters)
unless otherwise noted
5-Pin SC70
NS Package Number MAA05A
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LMV7291 Single 1.8V Low Power Comparator with Rail-to-Rail Input
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