DS04-27239-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP For Power Supply Applications
(General-Purpose DC/DC Converter)
3-ch DC/DC Converter IC
MB39A112
■DESCRIPTION
The MB39A112 is a 3-channel DC/DC conv erter IC using pulse width modulation (PWM) , and the MB39A112 is
suitable for down-conversion.
3-channel is built in TSSOP-20P package. Each channel can be controlled and soft-start.
The MB39A112 contains a constant voltage bias circuit for output block, capable of implementing an efficient
high-frequency DC/DC converter. It is ideal for built-in power supply such as ADSL modems.
■REATURES
• Supports for down-conversion (CH1 to CH3)
• Power supply voltage range : 7 V to 25 V
• Error amplifier threshold voltage : 1.00 V ± 1% (CH1)
: 1.23 V ± 1% (CH2, CH3)
• Oscillation frequency range : 250 kHz to 2.6 MHz
• Built-in soft-start circuit independent of loads
• Built-in timer-latch short-circuit protection circuit
• Built-in totem-pole type output for P-channel MOS FET devices
• Built-in constant voltage (VCCO − 5 V) bias circuit for output block
■PACKAGE
20-pin plastic TSSOP
(FPT-20P-M06)
MB39A112
2
■PIN ASSIGNMENT
(TOP VIEW)
(FPT-20P-M06)
CS1 : 1
−INE1 : 2
FB1 : 3
VCC : 4
RT : 5
CT : 6
GND : 7
FB2 : 8
−INE2 : 9
CS2 : 10
20 : VCCO
19 : OUT1
18 : OUT2
17 : OUT3
16 : VH
15 : GNDO
14 : CSCP
13 : FB3
12 : −INE3
11 : CS3
MB39A112
3
■PIN DESCRIPTION
Pin No. Symbol I/O Descriptions
1CS1CH1 soft-start setting capacitor connection terminal.
2− INE1 I CH1 error amplifer inverted input terminal.
3 FB1 O CH1 error amplifer output terminal.
4VCCControl circuit power supply terminal.
5RTTriangular-wave oscillation frequency setting resistor connection terminal.
6CTTriangular-wave oscillation frequency setting capacitor connection terminal.
7GNDGround terminal.
8 FB2 O CH2 error amplifier output terminal.
9− INE2 I CH2 error amplifier inverted input terminal.
10 CS2 CH2 soft-start setting capacitor connection terminal.
11 CS3 CH3 soft-start setting capacitor connection terminal.
12 − INE3 I CH3 error amplifier inverted input terminal.
13 FB3 O CH3 error amplifier output terminal.
14 CSCP Timer-latch short-circuit protection capacitor connection terminal.
15 GNDO Ground terminal.
16 VH O Power supply terminal for driving output circuit. (VH = VCCO − 5 V) .
17 OUT3 O CH3 external Pch MOS FET gate driving terminal.
18 OUT2 O CH2 external Pch MOS FET gate driving terminal.
19 OUT1 O CH1 external Pch MOS FET gate driving terminal.
20 VCCO Power supply terminal for driving output circuit. (Connect to same potential
as VCC terminal).
MB39A112
4
■BLOCK DIAGRAM
−
+
++
−
2
1
3
19
−
+
++
−
9
10
8
18
−
+
+
−
+
+
+
+
−
12
11
13
14
5 6 7
17
16
15
4
20
−INE1
CS1
FB1
−INE2
CS2
FB2
−INE3
CS3
FB3
CSCP
RT CT GND
OUT1
OUT2
OUT3
VH
GNDO
VCC
VCCO
VREF Error
Amp1
1.0 V
10 µA
VREF Error
Amp2
1.23 V
10 µA
VREF
SCP
OSC UVLO VREF VR Power
ON/OFF
CTL
Bias
Voltage
VH
IO = 150 mA
Pch Drive3
VCCO − 5 V
GND
bias
3.5 V
Error
Amp3 PWM
Comp.3
SCP
Comp.
1.23 V
2.7 V
2.5 V
2.0 V
10 µA
CH3
IO = 150 mA
Pch Drive2
PWM
Comp.2
CH2
IO = 150 mA
Pch Drive1
PWM
Comp.1
CH1
Threshold voltage
1.0 V ± 1%
Threshold voltage
1.23 V ± 1%
Threshold voltage
1.23 V ± 1%
L
priority
L
priority
H
priority
H: at SCP
H: UVLO release
Error Amp Power Supply
SCP Comp. Power Supply
ErrorAmp Reference
1.0 V/1.23 V
L
priority
MB39A112
5
■ABSOLUTE MAXIMUM RATINGS
* : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) .
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Conditions Rating Unit
Min Max
Power supply voltage Vcc VCC, VCCO terminal 28 V
Output current Io OUT1, OUT2, OUT3 terminal 20 mA
Peak output current IOP Duty ≤ 5 % (t = 1/fosc × Duty) 400 mA
Power dissipation PDTa ≤ + 25 °C1280* mW
Storage temperature TSTG − 55 + 125 °C
Parameter Symbol Conditions Value Unit
Min Typ Max
Power supply voltage Vcc VCC, VCCO terminal 7 12 25 V
Input voltage VIN − INE terminal 0 -Vcc − 1.8 V
Output current IOOUT1, OUT2, OUT3 terminal − 15 15 mA
IVH VH terminal 0 30 mA
Oscillation frequency fosc 250 1200 2600 kHz
Timing capacitor CT22 100 1000 pF
Timing resistor RT4.7 10 22 kΩ
VH terminal capacitor CVH VH terminal 0.1 1.0 µF
Soft-start capacitor CSCS1, CS2, CS3 terminal 0.1 1.0 µF
Short-circuit detection
capacitor CSCP CSCP terminal 0.01 1.0 µF
Operating ambient
temperature Ta − 30 + 25 + 85 °C
MB39A112
6
■ELECTRICAL CHARACTERISTICS (VCC = VCCO = 12 V, Ta = + 25 °C)
* : Standard design value
(Continued)
Parameter Sym-
bol Pin No. Conditions Value Unit
Min Typ Max
Undervoltage
Lockout
Protection
Circuit Block
[UVLO]
Threshold voltage VTH 4VCC = 6.35 6.55 6.75 V
Hysteresis width VHYS 40.15 V
Short-circuit
Protection
Circuit Block
[SCP]
Threshold voltage VTH 14 0.67 0.72 0.77 V
Input source current ICSCP 14 − 1.4 − 1.0 − 0.6 µA
Reset voltage VRST 4VCC = 6.2 6.4 6.6 V
Triangular
Wave
Oscillator
Block [OSC]
Oscillation
frequency fosc 17 to 19 CT = 100 pF,
RT = 10 kΩ1080 1200 1320 kHz
Soft-start
Block
[CS1, CS2,
CS3]
Charge current ICS 1, 10,
11 − 14 − 10 − 6 µA
Error Amp
Block (CH1)
[Error Amp1]
Threshold voltage VTH 2FB1 = 2.25 V 0.99 1.00 1.01 V
Input bias current IB2− INE1 = 0 V − 250 − 63 nA
Voltage gain AV3 DC 60 100 dB
Frequency band
width BW3AV = 0dB 1.5* MHz
Output voltage VOH 33.2 3.4 V
VOL 340 200 mV
Output source current ISOURCE 3FB1 = 2.25 V − 2 − 1mA
Output sink current ISINK 3FB1 = 2.25 V 150 250 µA
Error Amp
Block
(CH2, CH3)
[Error Amp2,
Error Amp3]
Threshold voltage VTH 9, 12 FB2 = FB3 = 2.25 V 1.218 1.230 1.242 V
Input bias current IB9, 12 − INE2 = − INE3 = 0 V − 250 − 63 nA
Voltage gain AV8, 13 DC 60 100 dB
Frequency band
width BW8, 13 AV = 0 dB 1.5* MHz
Output voltage VOH 8, 13 3.2 3.4 V
VOL 8, 13 40 200 mV
Output source current ISOURCE 8, 13 FB2 = FB3 = 2.25 V − 2 − 1mA
Output sink current ISINK 8, 13 FB2 = FB3 = 2.25 V 150 250 µA
MB39A112
7
(Continued)
(VCC = VCCO = 12 V, Ta = + 25 °C)
* : Standard design value
Parameter Sym-
bol Pin No. Conditions Value Unit
Min Typ Max
PWM
Comparator
Block
[PWM Comp.]
Threshold voltage
VT0 17 to 19 Duty cycle = 0 %1.9 2.0 V
VT100 17 to 19 Duty cycle = 100 %2.5 2.6 V
Bias Voltage
Block [VH] Output voltage V H16 VCCO −
5.5 VCCO −
5.0 VCCO −
4.5 V
Output Block
[Drive]
Output source
current ISOURC
E17 to 19 Duty ≤ 5 %
OUT1 = OUT2 =
OUT3 = 7 V − 150* mA
Output sink current ISINK 17 to 19 Duty ≤ 5 %
OUT1 = OUT2 =
OUT3 = 12 V 150* mA
Output ON resistor ROH 17 to 19 OUT1 = OUT2 =
OUT3 = − 15 mA 13 19.5 Ω
ROL 17 to 19 OUT1 = OUT2 =
OUT3 = 15 mA 10 15 Ω
General Power supply
current ICC 469mA
MB39A112
8
■TYPICAL CHARCTERISTICS
(Continued)
10
8
6
4
2
00 5 10 15 20 25
Ta = +25 °C
RT = OPEN
RT = 22 kΩRT = 10 kΩ
RT = 4.7 kΩ
Ta = +25 °C
VCC = 12 V
10000
1000
100
1010 100 1000 10000
CT = 1000 pF CT = 390 pF
CT = 100 pF
CT = 22 pF
Ta = +25 °C
VCC = 12 V
10000
1000
100
10 1 10 100 1000
Power supply current ICC (mA)
Power supply voltage VCC (V)
Power Supply Current vs. Power Supply Voltage
2.0
1.5
1.0
0.5
0.0
−0.5
−1.0
−1.5
−2.0
−40 −20 0 20 40 60 80 100
VCC = 12 V
FB1 = 0 mA
Threshold voltage ∆VTH (%)
Ambient temperature Ta ( °C)
Error Amp (ERR1)
Threshold Voltage vs. Ambient Temperature
2.0
1.5
1.0
0.5
0.0
−0.5
−1.0
−1.5
−2.0
−40 −20 0 20 40 60 80 100
VCC = 12 V
FB2(3) = 0 mA
Threshold voltage ∆VTH (%)
Ambient temperature Ta ( °C)
Error Amp (ERR2, ERR3)
Threshold Voltage vs. Ambient Temperature
Triangular wave oscillation frequency
fosc (kHz)
Timing resistor RT (kΩ)
Triangular Wave Oscillation Frequency vs.
Timing Resistor
Triangular wave oscillation frequency
fosc (kHz)
Timing capacitor CT (pF)
Triangular Wave Oscillation Frequency vs.
Timing Capacitor
MB39A112
9
(Continued)
Ta = +25 °C
VCC = 12 V
CT = 100 pF
2.8
2.6
2.4
2.2
2.0
1.8 0 500 1000 1500 2000 2500 3000
Triangular wave upper/lower limit voltage
VCT (V)
Triangular wave oscillation frequency
fosc (kHz)
Triangular Wave Upper/Lower Limit Voltage vs.
Triangular Wave Oscillation Frequency
Upper limit
Lower limit
VCC = 12 V
RT = 10 kΩ
CT = 100 pF
2.8
2.6
2.4
2.2
2.0
1.8
−40 −20 0 20 40 60 80 100
Triangular wave upper/lower limit voltage
VCT (V)
Ambient temperature Ta ( °
°°
°C)
Triangular Wave Upper/Lower Limit Voltage vs.
Ambient Temperature
Ta = +25 °C
RT = 10 kΩ
CT = 100 pF
1400
1350
1300
1250
1200
1150
1100
1050
1000 0 5 10 15 20 25 30
Triangular wave oscillation frequency
fosc (kHz)
Ambient temperature Ta ( °
°°
°C)
Triangular Wave Oscillation Frequency vs.
Ambient Temperature
VCC = 12 V
RT = 10 kΩ
CT = 100 pF
1400
1350
1300
1250
1200
1150
1100
1050
1000
−40 −20 0 20 40 60 80 100
Triangular wave oscillation frequency
fosc (kHz)
Power supply voltage VCC (V)
Triangular Wave Oscillation Frequency vs.
Power Supply Voltage
Upper limit
Lower limit
MB39A112
10
(Continued)
40
30
20
10
0
−10
−20
−30
−40
180
90
0
−90
−180
OUT
IN
1.0 V
240 kΩ
2.4 kΩ
10 kΩ
10 kΩ
1 µF
Error Amp1
100 1 k 10 k 100 k 1 M 10 M
−
+
+
+
Ta = +25 °C
VCC = 12 V
AV
ϕ
3.5 V
3
2
1
Gain AV (dB)
Frequency f (Hz)
Error Amp (CH1)
Gain, Phase vs. Frequency
Phase ϕ (deg)
40
30
20
10
0
−10
−20
−30
−40
180
90
0
−90
−180
OUT
IN
1.23 V
240 kΩ
2.4 k (12)
(13)
(11)
10 kΩ
10 kΩ
1 µF
Error Amp2
(Error Amp3)
100 1 k 10 k 100 k 1 M 10 M
−
+
+
+
Ta = +25 °C
VCC = 12 V
AV
ϕ
3.5 V
8
10
9
Gain AV (dB)
Frequency f (Hz)
Error Amp (CH2, CH3)
Gain, Phase vs. Frequency
Phase ϕ (deg)
1400
1300
1280
1200
1100
1000
900
800
700
600
500
400
300
200
100
0−40 −20 20 40 60 80 1000
Maximum power dissipation PD (mW)
Ambient temperature Ta ( °
°°
°C)
Maximum Power Dissipation vs. Ambient Temperature
MB39A112
11
■FUNCTION
1. DC/DC Converter Function
(1) Triangular Wave Oscillator Block (OSC)
The triangular wave oscillator incor porates a timing capacitor and a timing resistor connected respectively to
the CT ter minl (pin 6) and RT terminl (pin 5) to generate triangular oscillation wavefor m amplitude of 2.0 V to
2.5 V. The triangular waveforms are input to the PWM comparator in the IC.
(2) Error Amplifier Block (Error Amp1, Error Amp2, Error Amp3)
The error amplifier detects the DC/DC conver ter output voltage and outputs PWM control signals. In addition,
an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output ter minal to
inverted input term inal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prev ent rush current at pow er supply start-up by connecting a soft-start capacitor with the
CS1 terminl (pin 1) , CS2 terminl (pin10) and CS3 terminl (pin 11) which are the non-inv erted input terminal f or
Error Amp. The use of error Amp for soft-start detection makes it possible for a system to operate on a fixed
soft-start time that is independent of the output load on the DC/DC converter.
(3) PWM Comparator Block (PWM Comp.)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The comparator keeps output transistor on while the error amplifier output voltage remain higher than the
triangular wave voltage.
(4) Output Block
The output blobk is in the totem pole configulation, capable of driving an external P-channel MOS FET.
(5) Bias Voltage Block (VH)
This bias voltage circuit outputs VCC − 5 V (Typ) as minimum potential of the output circuit.
2. Protective Function
(1) Timer Latch Short-circuit Protection Circuit (SCP)
Each channel has a short-circuit detection comparator (SCP Comp .) which constantly compares the error Amp .
output level to the reference voltage.
While DC/DC conv erter load conditions are stable on all channels , the short-circuit detection comparator output
remains at “L”, and the CSCP terminal is held at “L” level.
If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage
to drop, the output of the short-circuit detection comparator on that channel goes to “H” level. This causes the
external short-circuit protection capacitor CSCP connected to the CSCP terminal (pin 14) to be charged.
When the capacitor CSCP is charged to the threshold voltage (VTH := 0.72 V) , the latch is set and the external
FET is tur ned off (dead time is set to 100 %) . At this point, the latch input is closed and the CSCP ter minal is
held at “L” level.
The latch applied by the timer-latch short-circuit protection circuit can be reset by recycling the power supply
(VCC) (See “■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PRO TECTION CIRCUIT”) .
MB39A112
12
(2) Undervoltage Lockout Protection Circuit Block (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect
to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the
CSCP terminal (pin 14) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold v oltage of the
undervoltage lockout protection circuit.
(3) Protection Cir cuit Operating Function Table
This table refers to output condition when each protection circuit is operating.
The latch can be reset as follows after the short-circuit protection circuit is actuated.
Recycling VCC resets the latch whenever the short-circuit protection circuit has been actuated.
Operating circuit CH1 CH2 CH3
OUT1 OUT2 OUT3
Short-circuit protection circuit H H H
Under-voltage lockout circuit H H H
MB39A112
13
■SETTING THE OUTPUT VOLTAGE
■SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing capacitor (CT) connected to the CT terminal
(pin 6) and the timing resistor (RT) connected to the RT terminal (pin 5) .
Triangular oscillation frequency : fosc
fosc (kHz) := 1200000
CT (pF) • RT (kΩ)
−
+
+
1
2
VO
R1
R2
CS1
Error Amp
1.00 V
VO (V) =(R1 + R2)
1.00
R2
−INE1
• CH1
−
+
+
10
9
VO
R1
R2
CS2
Error Amp
1.23 V
VO (V) =(R1 + R2)
1.23
R2
−INE2
11
12
(CS3)
(−INE3)
• CH2, CH3
MB39A112
14
■SETTING THE SOFT-START AND DISCHARGE TIMES
To prevent rush currents when the IC is tur ned on, you can set a soft-star t by connecting soft-star t capacitors
(CS1, CS2 and CS3) to the CS1 terminal (pin 1) for channel 1, CS2 terminal (pin 10) for channel 2 and CS3 terminal
(pin 11) for channel 3 respectively.
Setting each control ter minal (CTLX) from “H” to “L” starts charging the ex ternal soft-start capacitors (CS1, CS2
and CS3) connected to the CS1, CS2 and CS3 ter minal at about 10 µA. The DC/DC conver ter output voltage
rises in proportion to the CS terminal voltage. Also, soft-start time is obtained by the following formulas.
Soft-start time : ts (time to output 100%)
CH1 : ts1[s] := 0.100 × CS1[µF]
CH2 : ts2[s] := 0.123 × CS2[µF]
CH3 : ts3[s] := 0.123 × CS3[µF]
−
+
+
−INE1
(−INE2)
(−INE3)
CS1
(CS2)
(CS3)
(L : ON, H : OFF) FB1
(FB2)
(FB3)
Error
Amp
1.23 V
/1.0 V
VO
CTLX
VREF
SCP
UVLO
10 µA
L
priority
H : at SCP
H: UVLO release
CH1 ON/OFF signal
•
••
• Soft-start circuit
H
t
t
L
CS terminal voltage
Error Amp. reference voltage
Soft-start time ts
CTLX signal
:= 1.23 V/
1.00 V
:= 0 V
:= 3.4 V
•
••
• Soft-start operation
MB39A112
15
■TREATMENT WITHOUT USING CS TERMINAL
When not using the soft-start function, open the CS1 terminal (pin 1) , CS2 terminal (pin 10) and CS3 terminal
(pin 11) .
1
10
11
CS1
CS2
CS3
“Open”
“Open”
“Open”
•
••
• Without setting soft-start tme
MB39A112
16
■SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP Comp .) to alw a ys compare the error amplifier’s
output level to the reference voltage.
While DC/DC conv erter load conditions are stable on all channels , the short-circuit detection comparator output
remains at “L” level, and the CSCP terminal (pin 14) is held at “L” level.
If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage
to drop, the output of the shor t-circuit detection comparator goes to “H” level. This causes the extemal shor t-
circuit protection capacitor CSCP connected to the CSCP terminal to be charged at 1 µA.
When the capacitor CSCP is charged to the threshold v oltage (VTH := 0.72 V) , the latch is set and the e xternal FET
is turned off (dead time is set to 100 %) . At this time, the latch input is closed and the CSCP terminal
(pin 14) is held at “L” level.
If any of CH1 to CH3 detects a short circuit, all the channels are stopped.
Short-circuit detection time : tcscp
tcscp[s] := 0.72 × CSCP [µF]
−
+
+
−
+
+
+
−INE1
(−INE2)
(−INE3)
CS1
(CS2)
(CS3)
FB1
(FB2)
(FB3)
CSCP
Latch UVLO
VCC
SR
14
Error
Amp
1.23 V
/1.0 V
2.7 V
VO
R1
R2
VREF
10 µA
1 µA
SCP
Comp.
[SCP]
H: at SCP
H: UVLO release
•
••
• Timer-latch short-circuit protection circuit
MB39A112
17
■TREATMENT WITHOUT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 14) to GND with
the shortest distance.
14
7
CSCP
GND
•
••
• Treatment without using CSCP terminal
MB39A112
18
■I/O EQUIVALENT CIRCUIT
4
14
VCC
CSCP
2 kΩ
VREF
(3.5 V)
7
2
GND
5
VCC
1.2 V
RT
VREF
(3.5 V)
GND
−
+6
VCC
VREF
(3.5 V)
GND
CT
VCC
VREF
(3.5 V)
GND
VCC
CS1 FB11.00 V
−INE1
VREF
(3.5 V)
GND
CSX 3
VCC
CSX FBX
VCC
FBX CT
GND
1.23 V
VREF
(3.5 V)
GND
16
20
VCC VCCO VCCO
GND GNDO
OUTX
VH
VH
15
GNDO
<<Short-circuit detection block>>
ESD
protection
element
<<Triangular wave oscillator block
(RT) >> <<Triangular wave oscillator block
(CT) >>
<<Soft-start block>> <<Error amplifier block (CH1) >>
<<Error amplifier block (CH2, CH3) >> <<PWM comparator block>>
<<Bias voltage block>> <<Output block>>
ESD
protection
element
X : Each channel No.
ESD
protection
element
MB39A112
19
■APPLICATION EXAMPLE
A
B
C
A
B
C
R6
2.2 kΩR7
18 kΩ
R8
100 kΩ
(L : ON, H : OFF)
(L : ON, H : OFF)
(L : ON, H : OFF)
R9
820 Ω
C8
0.022 µF
C7
0.1
µF
CTL1
R11
4.7 kΩR12
56 kΩ
R13
36 kΩ
R14
820 Ω
C11
0.01 µF
C12
0.1
µF
CTL2
R15
680 Ω
VIN
(12 V)
R16
30 kΩ
R17
10 kΩ
R18
1 kΩ
C14
0.01 µF
C15
1000 pF
R10
5.1 kΩC10
100 pF
C9
0.1 µF
C16
0.1 µF
C5
2.2 µFC6
4.7 µF
VO3
(5.0 V)
IO3 = 0.15 ∼ 0.3 A
Q3 L3
10 µH
D3
C3
2.2 µFC4
4.7 µF
VO2
(3.3 V)
IO2 = 0.15 ∼ 1 A
Q2 L2
3.3 µH
D2
C1
2.2 µF
C17
0.1 µFC2
4.7 µF
VO1
(1.2 V)
IO1 = 0.8 ∼ 1.5 A
Q1 L1
2 µH
D1
C13
0.1
µF
CTL3
−
+
++
−
2
1
3
19
−
+
++
−
9
10
8
18
−
+
+
−
+
+
+
+
−
12
11
13
14
5 6 7
17
16
15
4
20
−INE1
CS1
FB1
−INE2
CS2
FB2
−INE3
CS3
FB3
CSCP
RT CT GND
OUT1
OUT2
OUT3
VH
GNDO
VCC
VCCO
VREF Error
Amp1
1.0 V
10 µA
VREF Error
Amp2
1.23 V
10 µA
VREF
SCP
OSC UVLO VREF VR Power
ON/OFF
CTL
Bias
Voltage
VH
IO = 150 mA
Pch Drive3
VCCO − 5 V
GND
bias
3.5 V
Error
Amp3 PWM
Comp.3
SCP
Comp.
1.23 V
2.7 V
2.5 V
2.0 V
10 µA
CH3
IO = 150 mA
Pch Drive2
PWM
Comp.2
CH2
IO = 150 mA
Pch Drive1
PWM
Comp.1
CH1
Threshold voltage
1.23 V ± 1 %
Threshold voltage
1.0 V ±
±±
± 1 %
%%
%
Charge
current
1 µAError Amp Power Supply
SCP Comp. Power Supply
L
priority
L
priority
L
priority
H
priority
H: at SCP
H: UVLO release
Step-
down
Threshold voltage
1.23 V ± 1 %
ErrorAmp Reference
1.0 V/1.23 V
CH1
ON/OFF signal
CH2
ON/OFF signal
CH3
ON/OFF signal
Step-
down
Step-
down
MB39A112
20
■PARTS LIST
Note : SANYO : SANYO Electric Co., Ltd.
TOKO : TOKO Inc.
TDK : TDK Corporation
ssm : SUSUMU Co., Ltd.
COMPONENT ITEM SPECIFICATION VENDOR PARTS No.
Q1, Q2,
Q3 Pch FET
Pch FET VDS = − 30 V, ID = − 2.0 A
VDS = − 30 V, ID = − 1.0 A SANYO
SANYO MCH3312
MCH3308
D1, D2
D3 Diode
Diode VF = 0.55 V (Max) , at IF = 2 A
VF = 0.4 V (Max) , at IF = 0.5 A SANYO
SANYO SBE001
SBE005
L1
L2
L3
Inductor
Inductor
Inductor
2 µH
3.3 µH
10 µH
3 A, 16 mΩ
2.57 A, 21.4 mΩ
1.49 A, 41.2 mΩ
TOKO
TOKO
TOKO
A916CY-2R0M
A916CY-3R3M
A916CY-100M
C1, C3, C5
C2, C4, C6
C7, C9, C12
C8
C10
C11, C14
C13, C16, C17
C15
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
2.2 µF
4.7 µF
0.1 µF
0.022 µF
100 pF
0.01 µF
0.1 µF
1000 pF
25 V
10 V
50 V
50 V
50 V
50 V
50 V
50 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C3216JB1E225K
C3216JB1A475M
C1608JB1H104K
C1608JB1H223K
C1608CH1H101J
C1608JB1H103K
C1608JB1H104K
C1608JB1H102K
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
2.2 kΩ
18 kΩ
100 kΩ
820 Ω
5.1 kΩ
4.7 kΩ
56 kΩ
36 kΩ
820 Ω
680 Ω
30 kΩ
10 kΩ
1 kΩ
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-222-D
RR0816P-183-D
RR0816P-104-D
RR0816P-821-D
RR0816P-512-D
RR0816P-472-D
RR0816P-563-D
RR0816P-363-D
RR0816P-821-D
RR0816P-681-D
RR0816P-303-D
RR0816P-103-D
RR0816P-102-D
MB39A112
21
■SELECTION OF COMPONENTS
•Pch MOS FET
The Pch MOS FET f or s witching use should be rated f or at least 20 % or more than the maxim um input v oltage.
To minimize continuity loss, use a FET with low RDS (ON) between the drain and source. For high input voltage
and high frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered.
In this application, the SANYO MCH3312 and MCH3308 are used. Continuity loss, on/off-cycle switching loss
and total loss are determined by the f ollo wing f ormulas. The selection m ust ensure that peak drain current does
not exceed rated values.
Example : Using the MCH3312
•CH1
Input v oltage VIN = 12 V, output vo ltage VO = 1.2 V, drain current ID = 1.5 A, oscillation frequency fOSC = 2350 kHz,
L = 2 µH, drain-source on resistance RDS(ON) := 180 mΩ, tr := 2.9 ns, tf := 8.7 ns.
Continuity loss : Pc
PC = ID2 × RDS (ON) × Duty
On-cycle switching loss : PS (ON)
PS (ON) = VD (Max) × ID × tr × fosc
6
Off-cycle switching loss : PS (OFF)
PS (OFF) = VD (Max) × ID (Max) × tf × fosc
6
Total loss : PT
PT = PC + PS (ON) + PS (OFF)
Drain current (Max) : ID (Max)
ID (Max) =Io +VIN − Vo tON
2L
=1.5 +12 − 1.2 × 1 × 0.1
2 × 2.0 × 10−62350 × 103
:= 1.61 A
Drain current (Min) : ID (Min)
ID (Min) =Io−VIN − Vo tON
2L
=1.5 −12 − 1.2 × 1 × 0.1
2 × 2.0 × 10−62350 × 103
:=1.39 A
MB39A112
22
The above power dissipation figures for the MCH3312 are satisfied with ample margin at 1.0 W (Ta = +25 °C) .
•CH2
Input v oltage VIN = 12 V, output vo ltage VO = 3.3 V, drain current ID = 1.0 A, oscillation frequency fOSC = 2350 kHz,
L = 3.3 µH, drain-source on resistance RDS(ON) := 180 mΩ, tr := 2.9 ns, tf := 8.7 ns.
PC =ID2 × RDS (ON) × Duty
=1.52 × 0.18 × 0.1
:=0.04 W
PS (ON) =VD × ID × tr × fosc
6
=12 × 1.5 × 2.9 × 10−9 × 2350 × 103
6
:=0.02 W
PS (OFF) =VD × ID (Max) × tf × fosc
6
=12 × 1.61 × 8.7 × 10−9 × 2350 × 103
6
:= 0.066 W
PT =Pc + PS (ON) + PS (OFF)
:=0.04 + 0.02 + 0.066
:= 0.126 W
Drain current (Max) : ID (Max)
ID (Max) =Io + VIN − Vo tON
2L
=1 + 12 − 3.3 × 1 × 0.275
2 × 3.3 × 10−62350 × 103
:=1.15 A
Drain current (Min) : ID (Min)
ID (Min) =Io − VIN − Vo tON
2L
=1 − 12 − 3.3 × 1 × 0.275
2 × 3.3 × 10−6 2350 × 103
:=0.85 A
PC =ID2 × RDS (ON) × Duty
=12 × 0.18 × 0.275
:= 0.0495 W
MB39A112
23
The above power dissipation figures for the MCH3312 are satisfied with ample margin at 1.0 W (Ta = +25 °C) .
Example : Using the MCH3308
•CH3
Input voltage VIN = 12 V, output voltage Vo = 5.0 V, drain current ID = 0.3 A, oscillation frequency fosc =
2350 kHz, L = 10 µH, drain-source on resistance RDS (ON) := 600 mΩ, tr := 4 ns, tf := 4 ns.
PS (ON) =VD × ID × tr × fosc
6
=12 × 1 × 2.9 × 10−9 × 2350 × 103
6
:= 0.0136 W
PS (OFF) =VD × ID (Max) × tf × fosc
6
=12 × 1.15 × 8.7 × 10−9 × 2350 × 103
6
:=0.047 W
PT =PC + PS (ON) + PS (OFF)
:= 0.0495 + 0.0136 + 0.047
:=0.11 W
Drain current (Max) : ID (Max)
ID (Max) =Io +VIN − Vo tON
2L
=0.3 +12 − 5 × 1 × 0.417
2 × 10 × 10−62350 × 103
:= 0.36 (A)
Drain current (Min) : ID (Min)
ID (Min) =Io −VIN − Vo tON
2L
=0.3 −12 − 5 × 1 × 0.417
2 × 10 × 10−62350 × 103
:= 0.24 (A)
PC =ID2 × RDS (ON) × Duty
=0.32 × 0.6 × 0.417
:= 0.023 W
MB39A112
24
The above power dissipation figures for the MCH3308 are satisfied with ample margin at 0.8 W (Ta = +25 °C) .
• Inductors
In selecting inductors, it is of course essential not to apply more current than the r ated capacity of the inductor,
but also to note that the lower limit for r ipple current is a critical point that if reached will cause discontinuous
operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value,
which will enable contin uous oper ation under light loads . Note that if the inductance value is too high, how ever,
direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at
the point where efficiency is greatest.
Note also that the DC superimposition characteristics become worse as the load current value approaches the
rated current v alue of the inductor , so that the inductance v alue is reduced and ripple current increases, causing
loss of efficiency. The selection of rated current value and inductance value will var y depending on where the
point of peak efficiency lies with respect to load current.
Inductance values are determined by the following formulas.
The L value for all load current conditions is set so that the peak to peak value of the r ipple current is 1/2 the
load current or less.
Example
•CH1
PS (ON) =VD × ID × tr × fosc
6
=12 × 0.3 × 4 × 10−9 × 2350 × 103
6
:= 0.0056 W
PS (OFF) =VD × ID (Max) × tf × fosc
6
=12 × 0.36 × 4 × 10−9 × 2350 × 103
6
:= 0.0068 W
PT =Pc + PS (ON) + PS (OFF)
:= 0.023 + 0.0056 + 0.0068
:= 0.0354 W
Inductance value : L
L ≥2 (VIN − Vo) tON
Io
L ≥2 (VIN − Vo1) tON
Io
≥2 × (12 −1.2) × 1 × 0.1
1.5 2350 × 103
≥0.61 µH
MB39A112
25
•CH2
•CH3
Inductance values derived from the above formulas are values that provide sufficient margin for continuous
operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore
necessary to determine the load level at which continuous operation becomes possible. In this application, the
T OK O A916CY-2R0M, A916CY-3R3M and A916CY-100M are used. At 2 µH, 3.3 µH and 10 µH, the load current
value under continuous operating conditions is determined by the following formula.
Example : Using the A916CY-2R0M
2 µH (allowable tolerance ± 20 %), rated current = 3 A
•CH1
Example : Using the A916CY-3R3M
3.3 µH (allowable tolerance ± 20 %) , rated current = 2.57 A
•CH2
L ≥2 (VIN − Vo2) tON
Io
≥2 × (12−3.3) × 1 × 0.275
1 2350 × 103
≥2.04 µH
L ≥2 (VIN − Vo3) tON
Io
≥2 × (12 − 5) × 1 × 0.417
0.3 2350 × 103
≥8.28 µH
Load current value under continuous operating conditions : Io
Io ≥Vo tOFF
2L
Io ≥Vo1 tOFF
2L
≥1.2 × 1 × (1 − 0.1)
2 × 2 × 10−62350 × 103
≥0.11 A
Io ≥Vo2 tOFF
2L
≥3.3 × 1 × (1 − 0.275)
2 × 3.3 × 10−62350 × 103
≥0.15 A
MB39A112
26
Example : Using the A916CY-100M
10.0 µH (allowable tolerance ± 20 %) , rated current = 1.49 A
•CH3
To deter mine whether the current through the inductor is within rated values, it is necessar y to determine the
peak value of the r ipple current as well as the peak-to-peak values of the ripple current that affect the output
ripple voltage . The peak value and peak-to-peak value of the ripple current can be determined by the following
formulas.
Example : Using the A916CY-2R0M
2.0 µH (allowable tolerance ± 20 %) , rated current = 3.0 A
•CH1
Peak value
Peak-to-peak value
Io ≥Vo3 tOFF
2L
≥5 × 1 × (1 − 0.417)
2 × 10 × 10−62350 × 103
≥62.0 mA
Peak value : IL
IL ≥Io + VIN − Vo tON
2L
Peak-to-peak value : ∆IL
∆IL =VIN − Vo tON
L
IL ≥Io + VIN − Vo1 tON
2L
≥1.5 + 12 − 1.2 × 1 × 0.1
2 × 2.0 × 10−62350 × 103
≥1.61 A
∆IL =VIN − Vo1 tON
L
=12 − 1.2 × 1 × 0.1
2.0 × 10−62350 × 103
:=0.23 A
MB39A112
27
Example : Using the A916CY-3R3M
3.3 µH (allowable tolerance ± 20 %) , rated current = 2.57 A
•CH2
Peak value
Peak-to-peak value
Example : Using the A916CY-100M
10.0 µH (allowable tolerance ± 20 %) , rated current = 1.49 A
•CH3
Peak value
Peak-to-peak value
IL ≥Io + VIN − Vo2 tON
2L
≥1.0 + 12 − 3.3 × 1 × 0.275
2 × 3.3 × 10−62350 × 103
≥1.15 A
∆IL =VIN − Vo2 tON
L
=12 − 3.3 × 1 × 0.275
3.3 × 10−62350 × 103
:= 0.309 A
IL ≥Io + VIN − Vo3 tON
2L
≥0.3 + 12 − 5 × 1 × 0.417
2 × 10 × 10−62350 × 103
≥0.36 A
∆IL =VIN − Vo3 tON
L
=12 − 5 × 1 × 0.417
10 × 10−62350 × 103
:= 0.124 A
MB39A112
28
• Flyback diode
The flyback diode is generally used as a Shottky barr ier diode (SBD) when the reverse voltage to the diode is
less than 40 V. The SBD has the characteristics of higher speed in ter ms of faster reverse recovery time, and
low er forward voltage, and is ideal for archiving high efficiency. As long as the DC re v erse voltage is sufficiently
higher than the input v oltage, the a v er age current flowing through the diode is within the a v er age output current
level, and peak current is within peak surge current limits, there is no problem. In this application the SANYO
SBE001, SBS005 are used. The diode average current and diode peak current can be calculated by the following
formulas.
Example : Using the SBE001
VR (DC reverse voltage) = 30 V, average output current = 2.0 A, peak surge current = 20 A,
VF (forward voltage) = 0.55 V, at IF = 2.0 A
•CH1
Diode mean current
Diode peak current
•CH2
Diode mean current
Diode mean current : IDi
IDi ≥Io × (1 −Vo )
VIN
Diode peak current : IDip
IDip ≥ (Io +Vo tOFF)
2L
IDi ≥Io × (1 −Vo1 )
VIN
≥1.5 × (1 − 0.1)
≥1.35 A
IDip ≥ (Io +Vo1 tOFF)
2L
≥1.61 A
IDi ≥Io × (1 −Vo2 )
VIN
≥1.0
×
(1 − 0.275)
≥0.725 A
MB39A112
29
Diode peak current
Example : Using the SBS005
VR (DC reverse voltage) = 30 V, average output current = 1.0 A, peak surge current = 10 A,
VF (forward voltage) = 0.4 V, at IF = 0.5 A
•CH3
Diode mean current
Diode peak current
IDip ≥ (Io +Vo2 tOFF)
2L
≥1.15 A
IDi ≥Io × (1 −Vo3 )
VIN
≥0.3 × (1 − 0.417)
≥0.175 A
IDip ≥ (Io +Vo3 tOFF)
2L
≥0.36 A
MB39A112
30
■REFERENCE DATA
(Continued)
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH1)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
1.2 V output
CTL1 = “L”
CTL2 = “H”
CTL3 = “H”
RT = 5.1 kΩ
CT = 100 pF
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH2)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
3.3 V output
CTL1 = “H”
CTL2 = “L”
CTL3 = “H”
RT = 5.1 kΩ
CT = 100 pF
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH3)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
5.0 V output
CTL1 = “H”
CTL2 = “H”
CTL3 = “L”
RT = 5.1 kΩ
CT = 100 pF
MB39A112
31
(Continued)
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH1)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
1.2 V output
CTL1 = “L”
CTL2 = “H”
CTL3 = “H”
RT = 10 kΩ
CT = 100 pF
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH2)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
3.3 V output
CTL1 = “H”
CTL2 = “L”
CTL3 = “H”
RT = 10 kΩ
CT = 100 pF
100
90
80
70
60
50
40
3010m 100m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH3)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
5.0 V output
CTL1 = “H”
CTL2 = “H”
CTL3 = “L”
RT = 10 kΩ
CT = 100 pF
MB39A112
32
(Continued)
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH1)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
1.2 V output
CTL1 = “L”
CTL2 = “H”
CTL3 = “H”
RT = 24 kΩ
CT = 100 pF
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Conversion Efficiency vs. Load Current Characteristics (CH2)
Conversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
3.3 V output
CTL1 = “H”
CTL2 = “L”
CTL3 = “H”
RT = 24 kΩ
CT = 100 pF
100
90
80
70
60
50
40
3010 m 100 m 1 10
VIN = 7 V
VIN = 10 V
VIN = 12 V
Cconversion Efficiency vs. Load Current Characteristics (CH3)
Cconversion efficiency η
ηη
η (%)
Load current IL (A)
Ta = + 25 °C
5.0 V output
CTL1 = “H”
CTL2 = “H”
CTL3 = “L”
RT = 24 kΩ
CT = 100 pF
MB39A112
33
■USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
• The use of negativ e voltages below −0.3 V may create parasitic transistors on LSI lines , which can cause
abnormal operation.
■ORDERING INFORMATION
Part number Package Remarks
MB39A112PFT 20-pin plastic TSSOP
(FPT-20P-M06)
MB39A112
34
■PACKAGE DIMENSION
20-pin plastic TSSOP
(FPT-20P-M06)
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) .
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
C
2003 FUJITSU LIMITED F20026S-c-3-3
6.50±0.10(.256±.004)
4.40±0.10 6.40±0.20
(.252±.008)(.173±.004)
0.10(.004)
0.65(.026) 0.24±0.08
(.009±.003)
1 10
20 11
"A"
0.17±0.05
(.007±.002)
M
0.13(.005)
Details of "A" part
0~8˚
(.024±.006)
0.60±0.15
(0.50(.020))
0.25(.010)
(.041±.002)
1.05±0.05 (Mounting height)
0.07 +0.03
–0.07 +.001
–.003
.003
(Stand off)
LEAD No.
INDEX
*1
*2
MB39A112
FUJITSU LIMITED
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The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information, such as descriptions of function and application
circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
information. When you develop equipment incorporating the
device based on such information, you must assume any
responsibility arising out of such use of the information. Fujitsu
assumes no liability for any damages whatsoever arising out of
the use of the information.
Any information in this document, including descriptions of
function and schematic diagrams, shall not be construed as license
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Fujitsu assumes no liability for any infringement of the intellectual
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The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
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extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
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F0311
FUJITSU LIMITED Printed in Japan
