AOB256L
150V N-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 19A
R
DS(ON)
(at V
GS
=10V) < 85mΩ
R
DS(ON)
(at V
GS
=4.5V) < 100mΩ
100% UIS Tested
100% R
g
Tested
Symbol
The AOB256L uses trench MOSFET technology that is
uniquely optimized to provide the most efficient high
frequency switching performance. Both conduction and
switching power losses are minimized due to an
extremely low combination of R
DS(ON)
, Ciss and Coss.
This device is ideal for boost converters and synchronous
rectifiers for consumer, telecom, industrial power supplies
and LED backlighting.
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
150V
G
D
S
TO-263
D2PAK
Top View Bottom View
D
D
S
GG
S
Symbol
V
DS
V
GS
I
DM
I
AS
E
AS
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJC
Maximum Junction-to-Ambient
A
°C/W
R
θJA
12
50 15
V±20Gate-Source Voltage
Drain-Source Voltage 150
Units
Junction and Storage Temperature Range -55 to 175 °C
Thermal Characteristics
Parameter Typ Max
V
Maximum
Units
Parameter
mJ
Avalanche Current
C
2.5
Continuous Drain
Current
4
3
A9
Avalanche energy L=0.1mH
C
A
T
A
=25°C I
DSM
A
T
A
=70°C
I
D
19
13.5
T
C
=25°C
T
C
=100°C 35Pulsed Drain Current
C
Continuous Drain
Current
W
Power Dissipation
A
P
DSM
W
T
A
=70°C
83
1.3
T
A
=25°C
T
C
=25°C
2.1
41.5
T
C
=100°C
Power Dissipation
B
P
D
Maximum Junction-to-Case °C/W
°C/W
Maximum Junction-to-Ambient
1.5 60
1.8
Rev 0: August 2012
www.aosmd.com Page 1 of 6
AOB256L
Symbol Min Typ Max Units
BV
DSS
150 V
V
DS
=150V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
±100 nA
V
GS(th)
Gate Threshold Voltage 1.8 2.25 2.8 V
I
D(ON)
35 A
70 85
T
J
=125°C 139 170
78 100 mΩ
g
FS
35 S
V
SD
0.72 1 V
I
S
19 A
C
iss
1165 pF
C
oss
61.5 pF
C
rss
2.5 pF
R
g
1.1 2.2 3.3 Ω
Q
g
(10V) 15.5 22 nC
Q
g
(4.5V) 7 10 nC
Q
gs
4 nC
Q
gd
1.2 nC
t
D(on)
6.5 ns
t
5
Turn-On Rise Time
V
=10V, V
=75V, R
=7.5
Ω
,
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Total Gate Charge
SWITCHING PARAMETERS
Turn-On DelayTime
V
GS
=10V, V
DS
=75V, I
D
=10A
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter Conditions
I
DSS
µA
Zero Gate Voltage Drain Current
Drain-Source Breakdown Voltage
Reverse Transfer Capacitance V
GS
=0V, V
DS
=75V, f=1MHz
V
DS
=V
GS，
I
D
=250µA
V
DS
=0V, V
GS
=±20V
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Forward Transconductance I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=10A
DYNAMIC PARAMETERS
V
GS
=4.5V, I
D
=8A
R
DS(ON)
Static Drain-Source On-Resistance
Diode Forward Voltage
mΩ
On state drain current
I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=10A
Gate-Body leakage current
t
r
5
t
D(off)
23 ns
t
f
2.5 ns
t
rr
37 ns
Q
rr
265 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Turn-On Rise Time
Turn-Off DelayTime
V
GS
=10V, V
DS
=75V, R
L
=7.5
Ω
,
R
GEN
=3Ω
Turn-Off Fall Time I
F
=10A, dI/dt=500A/µs
Body Diode Reverse Recovery Charge
Body Diode Reverse Recovery Time I
F
=10A, dI/dt=500A/µs
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PDis based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 0: August 2012 www.aosmd.com Page 2 of 6
AOB256L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
5
10
15
20
25
30
12345
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
50
60
70
80
90
100
0 3 6 9 12 15
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
0 25 50 75 100 125 150 175 200
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=4.5V
ID=8A
VGS=10V
ID=10A
25°C
125°C
VDS=5V
VGS=4.5V
VGS=10V
0
5
10
15
20
25
30
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=3.0V
3.5V
4.5V
7V
10V
4.0V
40
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
60
80
100
120
140
160
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=10A
25°C
125°C
Rev 0: August 2012 www.aosmd.com Page 3 of 6
AOB256L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
2
4
6
8
10
0 4 8 12 16 20
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
200
400
600
800
1000
1200
1400
0 25 50 75 100 125 150
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
0
200
400
600
800
1000
0.0001 0.001 0.01 0.1 1 10 100
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Coss C
rss
VDS=75V
ID=10A
TJ(Max)=175°C
TC=25°C
10
µ
s
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100 1000
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
10
µ
s
10ms
1ms
DC
RDS(ON)
limited
TJ(Max)=175°C
TC=25°C
100
µ
s
40
Case (Note F)
0.01
0.1
1
10
1E-05 0.0001 0.001 0.01 0.1 1 10 100
Zθ
θ
θ
θJC Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
Ton T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Operating Area (Note F)
RθJC=1.8°C/W
Rev 0: August 2012 www.aosmd.com Page 4 of 6
AOB256L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
20
40
60
80
100
0 25 50 75 100 125 150 175
Power Dissipation (W)
TCASE (°C)
Figure 13: Power De-rating (Note F)
0
5
10
15
20
0 25 50 75 100 125 150 175
Current rating ID(A)
TCASE (°C)
Figure 14: Current De
-
rating (Note F)
1
10
100
1000
10000
1E-05 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction
-
to
-
TA=25°C
1
10
100
1 10 100
IAR (A) Peak Avalanche Current
Time in avalanche, tA(µ
µµ
µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
TA=25°C
TA=150°C
TA=100°C
TA=125°C
40
0.001
0.01
0.1
1
10
0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Figure 14: Current De
-
rating (Note F)
Figure 15: Single Pulse Power Rating Junction
-
to
-
Ambient (Note H)
RθJA=60°C/W
Rev 0: August 2012 www.aosmd.com Page 5 of 6
AOB256L
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
Vdd
Vgs
Vgs
Rg
DUT
-
+
VDC
Vgs
Id
Vgs
I
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
Rev 0: August 2012 www.aosmd.com Page 6 of 6