LSM6DS3H iNEMO inertial module: always-on 3D accelerometer and 3D gyroscope Datasheet - production data Description The LSM6DS3H is a system-in-package featuring a 3D digital accelerometer and a 3D digital gyroscope performing at 1.1 mA (up to 1.6 kHz ODR) in highperformance mode and enabling always-on low-power features for an optimal motion experience for the consumer. LGA-14L (2.5 x 3 x 0.83 mm) typ. Features Power consumption: 0.85 mA in combo normal mode and 1.1 mA in combo high-performance mode up to 1.6 kHz. "Always-on" experience with low power consumption for both accelerometer and gyroscope Interface flexibility: selectable SPI (3/4-wire) or I2C with the main processor Auxiliary SPI (3-wire) to support OIS applications EIS/OIS support Accelerometer ODR up to 6.66 kHz Gyroscope ODR up to 3.33 kHz Smart FIFO 2/4/8/16 g full scale 125/250/500/1000/2000 dps full scale Analog supply voltage: 1.71 V to 3.6 V Independent IOs supply (1.62 V) Compact footprint, 2.5 mm x 3 mm x 0.83 mm SPI/I2C serial interface data synchronization feature Embedded temperature sensor ECOPACK(R), RoHS and "Green" compliant Applications EIS and OIS for camera applications Collecting sensor data Motion tracking and gesture detection Pedometer, step detector and step counter Significant motion and tilt functions Indoor navigation IoT and connected devices Vibration monitoring and compensation September 2017 This is information on a product in full production. The LSM6DS3H supports main OS requirements, offering real, virtual and batch sensors with 4 kbyte FIFO + flexible 4 kbyte (FIFO or programmable) for dynamic data batching. The LSM6DS3H gyroscope supports both OIS/EIS applications. The device can be connected to the camera module through a dedicated auxiliary SPI (Mode 3) while flexibility for the primary interface is available (I2C/SPI). ST's family of MEMS sensor modules leverages the robust and mature manufacturing processes already used for the production of micromachined accelerometers and gyroscopes. The various sensing elements are manufactured using specialized micromachining processes, while the IC interfaces are developed using CMOS technology that allows the design of a dedicated circuit which is trimmed to better match the characteristics of the sensing element. The LSM6DS3H has a full-scale acceleration range of 2/4/8/16 g and an angular rate range of 125/250/500/1000/2000 dps. High robustness to mechanical shock makes the LSM6DS3H the preferred choice of system designers for the creation and manufacturing of reliable products. The LSM6DS3H is available in a plastic land grid array (LGA) package. Table 1. Device summary Part number Temp. range [C] LSM6DS3H -40 to +85 LSM6DS3HTR -40 to +85 DocID028370 Rev 5 Package LGA-14L (2.5 x 3 x 0.83 mm) Packing Tray Tape & Reel 1/108 www.st.com Contents LSM6DS3H Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2 Embedded low-power features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 4 5 2/108 Tilt detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.3 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.4 Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4.1 SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4.2 I2C - inter-IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.6 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.6.1 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.6.2 Zero-g and zero-rate level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 Gyroscope power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 Accelerometer power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.4 Interface flexibility with auxiliary SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.5 FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.5.1 Bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.5.2 FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.5.3 Continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.5.4 Continuous-to-FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.5.5 Bypass-to-Continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.5.6 FIFO reading procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.5.7 Filter block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 DocID028370 Rev 5 LSM6DS3H 6 Contents Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6.1 I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6.1.1 6.2 7 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 6.2.1 SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 6.2.2 SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.2.3 SPI read in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7.1 LSM6DS3H electrical connections in Mode 1 . . . . . . . . . . . . . . . . . . . . . 42 7.2 LSM6DS3H electrical connections in Mode 2 . . . . . . . . . . . . . . . . . . . . . 43 7.3 LSM6DS3H electrical connections in Mode 3 . . . . . . . . . . . . . . . . . . . . . 44 8 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 9 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.1 FUNC_CFG_ACCESS (01h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.2 SENSOR_SYNC_TIME_FRAME (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.3 FIFO_CTRL1 (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.4 FIFO_CTRL2 (07h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 9.5 FIFO_CTRL3 (08h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 9.6 FIFO_CTRL4 (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 9.7 FIFO_CTRL5 (0Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.8 ORIENT_CFG_G (0Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.9 INT1_CTRL (0Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.10 INT2_CTRL (0Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9.11 WHO_AM_I (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9.12 CTRL1_XL (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 9.13 CTRL2_G (11h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 9.14 CTRL3_C (12h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 9.15 CTRL4_C (13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9.16 CTRL5_C (14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9.17 CTRL6_C (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 9.18 CTRL7_G (16h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 DocID028370 Rev 5 3/108 108 Contents 4/108 LSM6DS3H 9.19 CTRL8_XL (17h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 9.20 CTRL9_XL (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 9.21 CTRL10_C (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 9.22 MASTER_CONFIG (1Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 9.23 WAKE_UP_SRC (1Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.24 TAP_SRC (1Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.25 D6D_SRC (1Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.26 STATUS_REG/STATUS_SPIAux (1Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . 68 9.27 OUT_TEMP_L (20h), OUT_TEMP (21h) . . . . . . . . . . . . . . . . . . . . . . . . . 68 9.28 OUTX_L_G (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.29 OUTX_H_G (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.30 OUTY_L_G (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.31 OUTY_H_G (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 9.32 OUTZ_L_G (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 9.33 OUTZ_H_G (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 9.34 OUTX_L_XL (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 9.35 OUTX_H_XL (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.36 OUTY_L_XL (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.37 OUTY_H_XL (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.38 OUTZ_L_XL (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 9.39 OUTZ_H_XL (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.40 SENSORHUB1_REG (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.41 SENSORHUB2_REG (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.42 SENSORHUB3_REG (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 9.43 SENSORHUB4_REG (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.44 SENSORHUB5_REG (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.45 SENSORHUB6_REG (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.46 SENSORHUB7_REG (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 9.47 SENSORHUB8_REG(35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.48 SENSORHUB9_REG (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.49 SENSORHUB10_REG (37h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.50 SENSORHUB11_REG (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 9.51 SENSORHUB12_REG(39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 DocID028370 Rev 5 LSM6DS3H Contents 9.52 FIFO_STATUS1 (3Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 9.53 FIFO_STATUS2 (3Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 9.54 FIFO_STATUS3 (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.55 FIFO_STATUS4 (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.56 FIFO_DATA_OUT_L (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 9.57 FIFO_DATA_OUT_H (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 9.58 TIMESTAMP0_REG (40h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 9.59 TIMESTAMP1_REG (41h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 9.60 TIMESTAMP2_REG (42h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 9.61 STEP_TIMESTAMP_L (49h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.62 STEP_TIMESTAMP_H (4Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.63 STEP_COUNTER_L (4Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.64 STEP_COUNTER_H (4Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 9.65 SENSORHUB13_REG (4Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.66 SENSORHUB14_REG (4Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.67 SENSORHUB15_REG (4Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.68 SENSORHUB16_REG (50h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 9.69 SENSORHUB17_REG (51h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 9.70 SENSORHUB18_REG (52h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 9.71 FUNC_SRC (53h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9.72 TAP_CFG (58h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 9.73 TAP_THS_6D (59h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 9.74 INT_DUR2 (5Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 9.75 WAKE_UP_THS (5Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 9.76 WAKE_UP_DUR (5Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 9.77 FREE_FALL (5Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 9.78 MD1_CFG (5Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 9.79 MD2_CFG (5Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 9.80 OUT_MAG_RAW_X_L (66h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 9.81 OUT_MAG_RAW_X_H (67h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 9.82 OUT_MAG_RAW_Y_L (68h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 9.83 OUT_MAG_RAW_Y_H (69h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 9.84 OUT_MAG_RAW_Z_L (6Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 DocID028370 Rev 5 5/108 108 Contents LSM6DS3H 9.85 OUT_MAG_RAW_Z_H (6Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 9.86 CTRL_SPIAux (70h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 10 Embedded functions register mapping . . . . . . . . . . . . . . . . . . . . . . . . . 91 11 Embedded functions registers description . . . . . . . . . . . . . . . . . . . . . 93 11.1 SLV0_ADD (02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.2 SLV0_SUBADD (03h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.3 SLAVE0_CONFIG (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.4 SLV1_ADD (05h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 11.5 SLV1_SUBADD (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 11.6 SLAVE1_CONFIG (07h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 11.7 SLV2_ADD (08h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 11.8 SLV2_SUBADD (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 11.9 SLAVE2_CONFIG (0Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 11.10 SLV3_ADD (0Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 11.11 SLV3_SUBADD (0Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 11.12 SLAVE3_CONFIG (0Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 11.13 DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh) . . . . . . . . . . . . . . . . . . . . . 97 11.14 PEDO_THS_REG (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.15 SM_THS (13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.16 PEDO_DEB_REG (14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.17 STEP_COUNT_DELTA (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.18 MAG_SI_XX (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.19 MAG_SI_XY (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.20 MAG_SI_XZ (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 11.21 MAG_SI_YX (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.22 MAG_SI_YY (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.23 MAG_SI_YZ (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.24 MAG_SI_ZX (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 11.25 MAG_SI_ZY (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 11.26 MAG_SI_ZZ (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 11.27 MAG_OFFX_L (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 11.28 MAG_OFFX_H (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6/108 DocID028370 Rev 5 LSM6DS3H Contents 11.29 MAG_OFFY_L (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 11.30 MAG_OFFY_H (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 11.31 MAG_OFFZ_L (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 11.32 MAG_OFFZ_H (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 12 Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 13 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 14 13.1 LGA-14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 13.2 LGA-14 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 DocID028370 Rev 5 7/108 108 List of tables LSM6DS3H List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48. 8/108 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SPI slave timing values (in mode 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 I2C slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 I2C terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 SAD+Read/Write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Transfer when master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Transfer when master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . 37 Transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 37 Registers address map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 FUNC_CFG_ACCESS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 FUNC_CFG_ACCESS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 SENSOR_SYNC_TIME_FRAME register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 SENSOR_SYNC_TIME_FRAME register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 FIFO_CTRL1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 FIFO_CTRL1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 FIFO_CTRL2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 FIFO_CTRL2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 FIFO_CTRL3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 FIFO_CTRL3 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Gyro FIFO decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Accelerometer FIFO decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 FIFO_CTRL4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 FIFO_CTRL4 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Fourth FIFO data set decimation setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Third FIFO data set decimation setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 FIFO_CTRL5 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 FIFO_CTRL5 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 FIFO ODR selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 FIFO mode selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 ORIENT_CFG_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 ORIENT_CFG_G register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Settings for orientation of axes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 INT1_CTRL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 INT1_CTRL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 INT2_CTRL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 INT2_CTRL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 WHO_AM_I register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 CTRL1_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 CTRL1_XL register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Accelerometer ODR register setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 BW and ODR (high-performance mode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 DocID028370 Rev 5 LSM6DS3H Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96. Table 97. Table 98. Table 99. Table 100. List of tables CTRL2_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 CTRL2_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Gyroscope ODR configuration setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 CTRL3_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 CTRL3_C register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 CTRL4_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 CTRL4_C register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 CTRL5_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 CTRL5_C register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Output registers rounding pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Angular rate sensor self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Linear acceleration sensor self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 CTRL6_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 CTRL6_C register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 CTRL7_G register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 CTRL7_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Gyroscope high-pass filter mode configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 CTRL8_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 CTRL8_XL register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Accelerometer slope and high-pass filter selection and cutoff frequency . . . . . . . . . . . . . . 63 Accelerometer LPF2 cutoff frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 CTRL9_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 CTRL9_XL register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 CTRL10_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 CTRL10_C register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 MASTER_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 MASTER_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 WAKE_UP_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 WAKE_UP_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 TAP_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 TAP_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 D6D_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 D6D_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 STATUS_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 STATUS_REG register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 STATUS_SPIAux register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 STATUS_SPIAux description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 OUT_TEMP_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 OUT_TEMP_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 OUT_TEMP register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 OUTX_L_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 OUTX_L_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 OUTX_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 OUTX_H_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 OUTY_L_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 OUTY_L_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 OUTY_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 OUTY_H_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 OUTZ_L_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 OUTZ_L_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 OUTZ_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 OUTZ_H_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 DocID028370 Rev 5 9/108 108 List of tables Table 101. Table 102. Table 103. Table 104. Table 105. Table 106. Table 107. Table 108. Table 109. Table 110. Table 111. Table 112. Table 113. Table 114. Table 115. Table 116. Table 117. Table 118. Table 119. Table 120. Table 121. Table 122. Table 123. Table 124. Table 125. Table 126. Table 127. Table 128. Table 129. Table 130. Table 131. Table 132. Table 133. Table 134. Table 135. Table 136. Table 137. Table 138. Table 139. Table 140. Table 141. Table 142. Table 143. Table 144. Table 145. Table 146. Table 147. Table 148. Table 149. Table 150. Table 151. Table 152. 10/108 LSM6DS3H OUTX_L_XL register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 OUTX_L_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 OUTX_H_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTX_H_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTY_L_XL register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTY_L_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTY_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTY_H_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTZ_L_XL register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTZ_L_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 OUTZ_H_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 OUTZ_H_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB1_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB1_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB2_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB2_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB3_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB3_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 SENSORHUB4_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB4_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB5_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB5_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB6_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB6_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB7_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB7_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 SENSORHUB8_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB8_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB9_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB9_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB10_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB10_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB11_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB11_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 SENSORHUB12_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 SENSORHUB12_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 FIFO_STATUS1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 FIFO_STATUS1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 FIFO_STATUS2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 FIFO_STATUS2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 FIFO_STATUS3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 FIFO_STATUS3 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 FIFO_STATUS4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 FIFO_STATUS4 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 FIFO_DATA_OUT_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 FIFO_DATA_OUT_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 FIFO_DATA_OUT_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 FIFO_DATA_OUT_H register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 TIMESTAMP0_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 TIMESTAMP0_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 TIMESTAMP1_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 TIMESTAMP1_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 DocID028370 Rev 5 LSM6DS3H Table 153. Table 154. Table 155. Table 156. Table 157. Table 158. Table 159. Table 160. Table 161. Table 162. Table 163. Table 164. Table 165. Table 166. Table 167. Table 168. Table 169. Table 170. Table 171. Table 172. Table 173. Table 174. Table 175. Table 176. Table 177. Table 178. Table 179. Table 180. Table 181. Table 182. Table 183. Table 184. Table 185. Table 186. Table 187. Table 188. Table 189. Table 190. Table 191. Table 192. Table 193. Table 194. Table 195. Table 196. Table 197. Table 198. Table 199. Table 200. Table 201. Table 202. Table 203. Table 204. List of tables TIMESTAMP2_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 TIMESTAMP2_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 STEP_TIMESTAMP_L register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_TIMESTAMP_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_TIMESTAMP_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_TIMESTAMP_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_COUNTER_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_COUNTER_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_COUNTER_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 STEP_COUNTER_H register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 SENSORHUB13_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB13_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB14_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB14_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB15_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB15_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB16_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB16_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SENSORHUB17_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 SENSORHUB17_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 SENSORHUB18_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 SENSORHUB18_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 FUNC_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 FUNC_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 TAP_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 TAP_CFG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 TAP_THS_6D register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 TAP_THS_6D register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Threshold for D4D/D6D function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 INT_DUR2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 INT_DUR2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 WAKE_UP_THS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 WAKE_UP_THS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 WAKE_UP_DUR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 WAKE_UP_DUR register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 FREE_FALL register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 FREE_FALL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Threshold for free-fall function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 MD1_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 MD1_CFG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 MD2_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 MD2_CFG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 OUT_MAG_RAW_X_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 OUT_MAG_RAW_X_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 OUT_MAG_RAW_X_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_X_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_Y_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_Y_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_Y_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_Y_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_Z_L register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 OUT_MAG_RAW_Z_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 DocID028370 Rev 5 11/108 108 List of tables Table 205. Table 206. Table 207. Table 208. Table 209. Table 210. Table 211. Table 212. Table 213. Table 214. Table 215. Table 216. Table 217. Table 218. Table 219. Table 220. Table 221. Table 222. Table 223. Table 224. Table 225. Table 226. Table 227. Table 228. Table 229. Table 230. Table 231. Table 232. Table 233. Table 234. Table 235. Table 236. Table 237. Table 238. Table 239. Table 240. Table 241. Table 242. Table 243. Table 244. Table 245. Table 246. Table 247. Table 248. Table 249. Table 250. Table 251. Table 252. Table 253. Table 254. Table 255. Table 256. 12/108 LSM6DS3H OUT_MAG_RAW_Z_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 OUT_MAG_RAW_Z_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 CTRL_SPIAux register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 CTRL_SPIAux register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Registers address map - embedded functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 SLV0_ADD register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 SLV0_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 SLV0_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 SLV0_SUBADD register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 SLAVE0_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 SLAVE0_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 SLV1_ADD register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 SLV1_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 SLV1_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 SLV1_SUBADD register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 SLAVE1_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SLAVE1_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SLV2_ADD register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SLV2_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SLV2_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SLV2_SUBADD register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SLAVE2_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SLAVE2_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SLV3_ADD register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SLV3_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SLV3_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SLV3_SUBADD register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 SLAVE3_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 SLAVE3_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 DATAWRITE_SRC_MODE_SUB_SLV0 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 DATAWRITE_SRC_MODE_SUB_SLV0 register description. . . . . . . . . . . . . . . . . . . . . . . 97 PEDO_THS_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 PEDO_THS_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 SM_THS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 SM_THS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 PEDO_DEB_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 PEDO_DEB_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 STEP_COUNT_DELTA register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 STEP_COUNT_DELTA register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_XX register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_XX register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_XY register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_XY register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_XZ register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_XZ register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MAG_SI_YX register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_YX register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_YY register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_YY register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_YZ register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_YZ register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_ZX register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 DocID028370 Rev 5 LSM6DS3H Table 257. Table 258. Table 259. Table 260. Table 261. Table 262. Table 263. Table 264. Table 265. Table 266. Table 267. Table 268. Table 269. Table 270. Table 271. Table 272. Table 273. Table 274. Table 275. List of tables MAG_SI_ZX register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MAG_SI_ZY register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_SI_ZY register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_SI_ZZ register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_SI_ZZ register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_OFFX_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_OFFX_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_OFFX_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_OFFX_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 MAG_OFFY_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFY_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFY_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFY_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFZ_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFZ_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFZ_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 MAG_OFFX_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Reel dimensions for carrier tape of LGA-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 DocID028370 Rev 5 13/108 108 List of figures LSM6DS3H List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. 14/108 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 LSM6DS3H connection modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SPI slave timing diagram (in mode 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 I2C slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Mode 3 interface configuration (OIS applications) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Accelerometer chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Accelerometer composite filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Gyroscope chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Read and write protocol (in mode 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 SPI read protocol (in mode 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Multiple byte SPI read protocol (2-byte example) (in mode 3) . . . . . . . . . . . . . . . . . . . . . . 39 SPI write protocol (in mode 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Multiple byte SPI write protocol (2-byte example) (in mode 3) . . . . . . . . . . . . . . . . . . . . . . 40 SPI read protocol in 3-wire mode (in mode 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 LSM6DS3H electrical connections in Mode 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 LSM6DS3H electrical connections in Mode 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 LSM6DS3H electrical connections in Mode 3 (SPI 4-wire primary interface configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 LGA-14 2.5x3x0.86 14L package outline and mechanical data . . . . . . . . . . . . . . . . . . . . 104 Carrier tape information for LGA-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 LGA-14 package orientation in carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Reel information for carrier tape of LGA-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 DocID028370 Rev 5 LSM6DS3H 1 Overview Overview The LSM6DS3H is a system-in-package featuring a high-performance 3-axis digital accelerometer and 3-axis digital gyroscope. The integrated power-efficient modes are able to reduce the power consumption down to 1.1 mA in high-performance mode, combining always-on low-power features with superior sensing precision for an optimal motion experience for the consumer thanks to ultra-low noise performance for both the gyroscope and accelerometer. The LSM6DS3H delivers best-in-class motion sensing that can detect orientation and gestures in order to empower application developers and consumers with features and capabilities that are more sophisticated than simply orienting their devices to portrait and landscape mode. The event-detection interrupts enable efficient and reliable motion tracking and contextual awareness, implementing hardware recognition of free-fall events, 6D orientation, tap and double-tap sensing, activity or inactivity, and wakeup events. The LSM6DS3H supports main OS requirements, offering real, virtual and batch mode sensors. In addition, the LSM6DS3H can efficiently run the sensor-related features specified in Android, saving power and enabling faster reaction time. In particular, the LSM6DS3H has been designed to implement hardware features such as significant motion, tilt, pedometer functions, timestamping and to support the data acquisition of an external magnetometer with ironing correction (hard, soft). The LSM6DS3H offers hardware flexibility to connect the pins with different mode connections to external sensors to expand functionalities such as adding a sensor hub, auxiliary SPI, etc. The application processor connection is supported by both SPI and I2C interfaces for complete interface flexibility. Up to 8 kbyte of FIFO [4 kbyte FIFO + flexible 4 kbyte (FIFO or programmable)] with dynamic allocation of significant data (i.e. external sensors, timestamp, etc.) allows overall power saving of the system. Like the entire portfolio of MEMS sensor modules, the LSM6DS3H leverages the robust and mature in-house manufacturing processes already used for the production of micromachined accelerometers and gyroscopes. The various sensing elements are manufactured using specialized micromachining processes, while the IC interfaces are developed using CMOS technology that allows the design of a dedicated circuit which is trimmed to better match the characteristics of the sensing element. The LSM6DS3H is available in a small plastic land grid array (LGA) package of 2.5 x 3.0 x 0.83 mm to address ultra-compact solutions. DocID028370 Rev 5 15/108 108 Embedded low-power features 2 LSM6DS3H Embedded low-power features The LSM6DS3H has been designed to be fully compliant with Android, featuring the following on-chip functions: 8 kbyte data buffering - 4 kbyte FIFO + flexible 4 kbyte (FIFO or programmable) - 100% efficiency with flexible configurations and partitioning - possibility to store timestamp Event-detection interrupts (fully configurable): - free-fall - wakeup - 6D orientation - tap and double-tap sensing - activity / inactivity recognition Specific IP blocks with negligible power consumption and high-performance: - pedometer functions: step detector and step counters - tilt (Android compliant, refer to Section 2.1: Tilt detection for additional info - significant motion (Android compliant) Sensor hub - up to 6 total sensors: 2 internal (accelerometer and gyroscope) and 4 external sensors Data rate synchronization with external trigger for reduced sensor access and enhanced fusion 2.1 Tilt detection The tilt function helps to detect activity change and has been implemented in hardware using only the accelerometer to achieve both the targets of ultra-low power consumption and robustness during the short duration of dynamic accelerations. It is based on a trigger of an event each time the device's tilt changes by an angle greater than 35 degrees from the start position. The tilt function can be used with different scenarios, for example: a) Trigger when phone is in a front pants pocket and the user goes from sitting to standing or standing to sitting; b) Doesn't trigger when phone is in a front pants pocket and the user is walking, running or going upstairs. 16/108 DocID028370 Rev 5 LSM6DS3H 3 Pin description Pin description Figure 1. Pin connections Z X + + Y NC CS_Aux INT2 VDD Z X + X (TOP VIEW) DIRECTIONS OF THE DETECTABLE ANGULAR RATES 11 12 14 BOTTOM VIEW 1 4 8 7 SDO/SA0 SDx SCx INT1 5 VDDIO (1) SCL SDA DIRECTION OF THE DETECTABLE ACCELERATIONS CS (TOP VIEW) GND GND Y 1. Leave pin electrically unconnected and soldered to PCB. DocID028370 Rev 5 17/108 108 Pin description 3.1 LSM6DS3H Pin connections The LSM6DS3H offers the flexibility to connect the pins in order to have three different mode connections and functionalities. In detail: Mode 1: I2C slave interface or SPI (3- and 4-wire) serial interface is available; Mode 2: I2C slave interface or SPI (3- and 4-wire) serial interface and I2C interface master for external sensors connections are available; Mode 3(a): I2C slave interface or SPI (3- and 4-wire) serial interface is available for the application processor interface while an auxiliary SPI (3-wire) serial interface for external sensor connections (i.e. camera module) is available. Figure 2. LSM6DS3H connection modes 0RGH 0RGH +267 ,&63, Z /60'6+ 0RGH +267 +267 ,&63, Z ,&63, Z /60'6+ 0DVWHU,& /60'6+ $X[63, Z ([WHUQDOVHQVRUV &DPHUD 0RGXOH In the following table each mode is described for the pin connection and function. a. In the primary SPI connection, the gyroscope output data is available in registers 22h to 27h with user-selected FS and ODR. In the auxiliary SPI connection, gyroscope output data is available in registers 22h to 27h @ 3.3 kHz and FS = 250 dps. 18/108 DocID028370 Rev 5 LSM6DS3H Pin description Table 2. Pin description Pin# 1 Name Mode 1 function Mode 2 function Mode 3 function SDO/SA0 SPI 4-wire interface serial data output (SDO) I2C least significant bit of the device address (SA0) SPI 4-wire interface serial data output (SDO) I2C least significant bit of the device address (SA0) SPI 4-wire interface serial data output (SDO) I2C least significant bit of the device address (SA0) 2 SDx Connect to VDDIO or GND I2C serial data master (MSDA) Auxiliary SPI 3-wire interface serial data input (SDI_Aux) and serial data output (SDO_Aux) 3 SCx Connect to VDDIO or GND I2C serial clock master (MSCL) Auxiliary SPI 3-wire interface serial port clock (SPC_Aux) 4 INT1 Programmable interrupt 1 5 VDDIO(1) Power supply for I/O pins 6 GND 0 V supply 7 GND 0 V supply 8 VDD (2) 9 INT2 10 CS_Aux 11 NC(3) Power supply Programmable interrupt 2 (INT2)/ Data enable (DEN) Programmable interrupt 2 (INT2)/ Data enable (DEN)/ I2C master external synchronization signal (MDRDY) Programmable interrupt 2 (INT2)/ Data enable (DEN) Leave unconnected(3) Leave unconnected(3) Auxiliary SPI 3-wire interface enable Leave unconnected I2C/SPI mode selection (1: SPI idle mode / I2C communication enabled; 0: SPI communication mode / I2C disabled) I2C/SPI mode selection (1: SPI idle mode / I2C communication enabled; 0: SPI communication mode /I2C disabled) 12 CS I2C/SPI mode selection (1: SPI idle mode / I2C communication enabled; 0: SPI communication mode / I2C disabled) 13 SCL I2C serial clock (SCL) SPI serial port clock (SPC) I2C serial clock (SCL) SPI serial port clock (SPC) I2C serial clock (SCL) SPI serial port clock (SPC) SDA I2C serial data (SDA) SPI serial data input (SDI) 3-wire interface serial data output (SDO) I2C serial data (SDA) SPI serial data input (SDI) 3-wire interface serial data output (SDO) I2C serial data (SDA) SPI serial data input (SDI) 3-wire interface serial data output (SDO) 14 1. Recommended 100 nF filter capacitor. 2. Recommended 100 nF capacitor. 3. Leave pin electrically unconnected and soldered to PCB. DocID028370 Rev 5 19/108 108 Module specifications LSM6DS3H 4 Module specifications 4.1 Mechanical characteristics @ Vdd = 1.8 V, T = 25 C unless otherwise noted. Table 3. Mechanical characteristics Symbol Parameter Test conditions Min. Typ.(1) Max. Unit 2 LA_FS 4 Linear acceleration measurement range 8 g 16 125 250 G_FS Angular rate measurement range 500 dps 1000 2000 LA_So G_So Linear acceleration sensitivity(2) Angular rate sensitivity (3) FS = 2 0.061 FS = 4 0.122 FS = 8 0.244 FS = 16 0.488 FS = 125 4.375 FS = 250 8.75 FS = 500 17.50 FS = 1000 35 FS = 2000 70 mg/LSB mdps/LSB LA_SoDr Linear acceleration sensitivity change vs. temperature from -40 to +85 delta from T=25 1 % G_SoDr Angular rate sensitivity change vs. temperature from -40 to +85 delta from T=25 1.5 % LA_TyOff Linear acceleration typical zero-g level offset accuracy(4) 40 mg G_TyOff Angular rate typical zero-rate level(4) 10 dps LA_OffDr Linear acceleration zero-g level change vs. temperature 0.5 mg/ C G_OffDr Angular rate typical zero-rate level change vs. temperature 0.05 dps/C 20/108 DocID028370 Rev 5 LSM6DS3H Module specifications Table 3. Mechanical characteristics (continued) Symbol Rn RnRMS An RMS LA_ODR G_ODR Vst Top Parameter Test conditions Min. Rate noise density in high-performance mode(5) Acceleration RMS noise in normal/low-power mode(8) Max. Unit 6 mdps/Hz 120 mdps FS= 2 g 90 g/Hz FS= 4 g 90 g/Hz FS= 8 g 110 g/Hz FS= 16 g 180 g/Hz FS= 2 g 1.7 mg(RMS) FS= 4 g 2.0 mg(RMS) FS= 8 g 2.7 mg(RMS) FS= 16 g 4.4 mg(RMS) 12.5 26 52 104 208 416 833 1666 3332 6664 Hz Gyroscope RMS noise in low-power mode(6) Acceleration noise density in high-performance mode(7) Typ.(1) Linear acceleration output data rate 12.5 26 52 104 208 416 833 1666 3332(9) Angular rate output data rate Linear acceleration self-test output change(10)(11) FS = 2 g 90 1700 mg Angular rate self-test output change(12)(13) FS = 2000 dps 150 700 dps -40 +85 C Operating temperature range 1. Typical specifications are not guaranteed. 2. Linear acceleration sensitivity after factory calibration test and trimming. 3. Angular rate sensitivity after factory calibration test and trimming. 4. Values after soldering. 5. RND (rate noise density) mode is independent of the ODR and FS setting. DocID028370 Rev 5 21/108 108 Module specifications LSM6DS3H 6. Gyro noise RMS is independent of the ODR and FS setting. 7. Noise density in HP mode is the same for all ODRs. 8. Noise RMS in Normal/LP mode is the same for all the ODR RMS related to BW = ODR /2 (for ODR /9, typ value can be calculated by Typ *0.6) 9. To enable this ODR, refer to CTRL4_C (13h). 10. The sign of the linear acceleration self-test output change is defined by the STx_XL bits in CTRL5_C (14h), Table 60 for all the axes. 11. The linear acceleration self-test output change is defined with the device in stationary condition as the absolute value of: OUTPUT[LSb] (self-test enabled) - OUTPUT[LSb] (self-test disabled). 1LSb = 0.061 mg at 2 g full scale. 12. The sign of the angular rate self-test output change is defined by the STx_G bits in CTRL5_C (14h), Table 59 for all the axes. 13. The angular rate self-test output change is defined with the device in stationary condition as the absolute value of: OUTPUT[LSb] (self-test enabled) - OUTPUT[LSb] (self-test disabled). 1LSb = 70 mdps at 2000 dps full scale. 22/108 DocID028370 Rev 5 LSM6DS3H 4.2 Module specifications Electrical characteristics @ Vdd = 1.8 V, T = 25 C unless otherwise noted. Table 4. Electrical characteristics Symbol Vdd Vdd_IO Min. Typ.(1) Max. Unit Supply voltage 1.71 1.8 3.6 V Power supply for I/O 1.62 Vdd + 0.1 V Parameter Test conditions IddHP Gyroscope and accelerometer in high-performance mode up to ODR = 1.6 kHz 1.1 mA IddNM Gyroscope and accelerometer in normal mode ODR = 208 Hz 0.85 mA IddLP Gyroscope and accelerometer in low-power mode ODR = 12.5 Hz 0.4 mA LA_IddHP Accelerometer current consumption in high-performance up to ODR = 1.6 kHz mode 240 A LA_IddNM Accelerometer current consumption in normal mode ODR = 104 Hz 60 A LA_IddLM Accelerometer current consumption in low-power mode ODR = 12.5 Hz 10 A IddPD Gyroscope and accelerometer in power down 6 A 0.7 * VDD_IO VIH Digital high-level input voltage VIL Digital low-level input voltage VOH High-level output voltage IOH = 4 mA (2) VOL Low-level output voltage IOL = 4 mA (2) Top Operating temperature range V 0.3 * VDD_IO V VDD_IO 0.2 -40 V 0.2 V +85 C 1. Typical specifications are not guaranteed. 2. 4 mA is the maximum driving capability, i.e. the maximum DC current that can be sourced/sunk by the digital pad in order to guarantee the correct digital output voltage levels VOH and VOL. For details related to the LSM6DS3H operating modes, refer to 5.2: Gyroscope power modes and 5.3: Accelerometer power modes. DocID028370 Rev 5 23/108 108 Module specifications 4.3 LSM6DS3H Temperature sensor characteristics @ Vdd = 1.8 V, T = 25 C unless otherwise noted. Table 5. Temperature sensor characteristics Symbol TODR Toff Parameter Test condition Min. Temperature refresh rate Temperature offset (2) TSen Temperature sensitivity TST Temperature stabilization time(3) Operating temperature range 1. Typical specifications are not guaranteed. 2. The output of the temperature sensor is 0 LSB (typ.) at 25 C. 3. Time from power ON bit to valid data based on characterization data. 24/108 DocID028370 Rev 5 Max. 52 -15 +15 C LSB/C 500 12 -40 Unit Hz 16 T_ADC_res Temperature ADC resolution Top Typ.(1) s bit +85 C LSM6DS3H Module specifications 4.4 Communication interface characteristics 4.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 6. SPI slave timing values (in mode 3) Value(1) Symbol Parameter Unit Min tc(SPC) SPI clock cycle fc(SPC) SPI clock frequency tsu(CS) CS setup time 5 th(CS) CS hold time 20 tsu(SI) SDI input setup time 5 th(SI) SDI input hold time 15 tv(SO) SDO valid output time th(SO) SDO output hold time tdis(SO) SDO output disable time Max 100 ns 10 MHz ns 50 5 50 1. Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production Figure 3. SPI slave timing diagram (in mode 3) Note: Measurement points are done at 0.2*Vdd_IO and 0.8*Vdd_IO, for both input and output ports. DocID028370 Rev 5 25/108 108 Module specifications LSM6DS3H I2C - inter-IC control interface 4.4.2 Subject to general operating conditions for Vdd and Top. Table 7. I2C slave timing values Symbol f(SCL) I2C Standard mode(1) Parameter SCL clock frequency I2C Fast mode (1) Min Max Min Max 0 100 0 400 tw(SCLL) SCL clock low time 4.7 1.3 tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 th(SDA) SDA data hold time 0 th(ST) START condition hold time 4 0.6 tsu(SR) Repeated START condition setup time 4.7 0.6 tsu(SP) STOP condition setup time 4 0.6 4.7 1.3 tw(SP:SR) Bus free time between STOP and START condition 3.45 ns 0 0.9 5(3($7(' 67$57 67$57 WVX 65 67$57 WZ 6365 6'$ WK 6'$ WVX 63 6723 6&/ Note: 26/108 WZ 6&// WZ 6&/+ Measurement points are done at 0.2*Vdd_IO and 0.8*Vdd_IO, for both ports. DocID028370 Rev 5 s s Figure 4. I2C slave timing diagram WK 67 kHz s 1. Data based on standard I2C protocol requirement, not tested in production. WVX 6'$ Unit LSM6DS3H 4.5 Module specifications Absolute maximum ratings Stresses above those listed as "Absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 8. Absolute maximum ratings Symbol Maximum value Unit Vdd Supply voltage -0.3 to 4.8 V TSTG Storage temperature range -40 to +125 C 10,000 g 2 kV -0.3 to Vdd_IO +0.3 V Sg ESD Vin Note: Ratings Acceleration g for 0.2 ms Electrostatic discharge protection (HBM) Input voltage on any control pin (including CS, SCL/SPC, SDA/SDI/SDO, SDO/SA0) Supply voltage on any pin should never exceed 4.8 V. This device is sensitive to mechanical shock, improper handling can cause permanent damage to the part. This device is sensitive to electrostatic discharge (ESD), improper handling can cause permanent damage to the part. DocID028370 Rev 5 27/108 108 Module specifications 4.6 Terminology 4.6.1 Sensitivity LSM6DS3H Linear acceleration sensitivity can be determined, for example, by applying 1 g acceleration to the device. Because the sensor can measure DC accelerations, this can be done easily by pointing the selected axis towards the ground, noting the output value, rotating the sensor 180 degrees (pointing towards the sky) and noting the output value again. By doing so, 1 g acceleration is applied to the sensor. Subtracting the larger output value from the smaller one, and dividing the result by 2, leads to the actual sensitivity of the sensor. This value changes very little over temperature and over time. The sensitivity tolerance describes the range of sensitivities of a large number of sensors. An angular rate gyroscope is device that produces a positive-going digital output for counterclockwise rotation around the axis considered. Sensitivity describes the gain of the sensor and can be determined by applying a defined angular velocity to it. This value changes very little over temperature and time. 4.6.2 Zero-g and zero-rate level Linear acceleration zero-g level offset (TyOff) describes the deviation of an actual output signal from the ideal output signal if no acceleration is present. A sensor in a steady state on a horizontal surface will measure 0 g on both the X-axis and Y-axis, whereas the Z-axis will measure 1 g. Ideally, the output is in the middle of the dynamic range of the sensor (content of OUT registers 00h, data expressed as 2's complement number). A deviation from the ideal value in this case is called zero-g offset. Offset is to some extent a result of stress to MEMS sensor and therefore the offset can slightly change after mounting the sensor onto a printed circuit board or exposing it to extensive mechanical stress. Offset changes little over temperature, see "Linear acceleration zero-g level change vs. temperature" in Table 3. The zero-g level tolerance (TyOff) describes the standard deviation of the range of zero-g levels of a group of sensors. Zero-rate level describes the actual output signal if there is no angular rate present. The zero-rate level of precise MEMS sensors is, to some extent, a result of stress to the sensor and therefore the zero-rate level can slightly change after mounting the sensor onto a printed circuit board or after exposing it to extensive mechanical stress. This value changes very little over temperature and time. 28/108 DocID028370 Rev 5 LSM6DS3H Functionality 5 Functionality 5.1 Operating modes The LSM6DS3H has three operating modes available: only accelerometer active and gyroscope in power-down only gyroscope active and accelerometer in power-down both accelerometer and gyroscope sensors active with independent ODR The accelerometer is activated from power down by writing ODR_XL[3:0] in CTRL1_XL (10h) while the gyroscope is activated from power-down by writing ODR_G[3:0] in CTRL2_G (11h). For combo mode the ODRs are totally independent. 5.2 Gyroscope power modes In the LSM6DS3H, the gyroscope can be configured in four different operating modes: power-down, low-power, normal mode and high-performance mode. The operating mode selected depends on the value of the G_HM_MODE bit in CTRL7_G (16h). If G_HM_MODE is set to `0', high-performance mode is valid for all ODRs (from 12.5 Hz up to 1.6 kHz). To enable the low-power and normal mode, the G_HM_MODE bit has to be set to `1'. Lowpower mode is available for lower ODR (12.5, 26, 52 Hz) while normal mode is available for ODRs equal to 104 and 208 Hz. 5.3 Accelerometer power modes In the LSM6DS3H, the accelerometer can be configured in four different operating modes: power-down, low-power, normal mode and high-performance mode. The operating mode selected depends on the value of the XL_HM_MODE bit in CTRL6_C (15h). If XL_HM_MODE is set to `0', high-performance mode is valid for all ODRs (from 12.5 Hz up to 6.66 kHz). To enable the low-power and normal mode, the XL_HM_MODE bit has to be set to `1'. Lowpower mode is available for lower ODRs (12.5, 26, 52 Hz) while normal mode is available for ODRs equal to 104 and 208 Hz. DocID028370 Rev 5 29/108 108 Functionality 5.4 LSM6DS3H Interface flexibility with auxiliary SPI In Mode3 configuration of the LSM6DS3H, interface flexibility is supported as follows: Primary interface: I2C or SPI (3/4-wire) Auxiliary interface: SPI (3-wire) This configuration can support OIS applications, see details in the following figure. Figure 5. Mode 3 interface configuration (OIS applications) The primary interface is always available and the gyroscope output values are in registers 22h to 27h as per user-selected FS and ODR. The auxiliary interface needs to be enabled in CTRL_SPIAux (70h) register and gyroscope output values are in registers 22h to 27h with FS = 250 dps and ODR = 3.3 kHz. In this interface SPI can write only to the dedicated register (CTRL_SPIAux (70h)). When the auxiliary SPI is connected to the camera module, the recommendations are as follows: Single axis enable bits in CTRL9_XL (18h) and CTRL10_C (19h) have to be `1' (default value) Sign and orient bits in ORIENT_CFG_G (0Bh) have to be set to `0' (default value) Sleep bit in CTRL4_C (13h) has to be set to `0' (default value) Avoid using the self-test if the camera module is reading data When the camera module is not connected, the device has the same behavior as the LSM6DS3 (all bits supported). 30/108 DocID028370 Rev 5 LSM6DS3H 5.5 Functionality FIFO The presence of a FIFO allows consistent power saving for the system since the host processor does not need continuously poll data from the sensor, but it can wake up only when needed and burst the significant data out from the FIFO. LSM6DS3H embeds 4 kbyte FIFO + flexible 4 kbyte (FIFO or programmable) to store the following data: gyroscope accelerometer external sensors step counter and timestamp temperature Writing data in the FIFO can be configured to be triggered by the: - accelerometer/gyroscope data-ready signal; in which case the ODR must be lower than or equal to both the accelerometer and gyroscope ODRs; - sensor hub data-ready signal; - step detection signal. In addition, each data can be stored at a decimated data rate compared to FIFO ODR and it is configurable by the user, setting the registers FIFO_CTRL3 (08h) and FIFO_CTRL4 (09h). The available decimation factors are 2, 3, 4, 8, 16, 32. Programmable FIFO threshold can be set in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h) using the FTH [11:0] bits. To monitor the FIFO status, dedicated registers (FIFO_STATUS1 (3Ah), FIFO_STATUS2 (3Bh), FIFO_STATUS3 (3Ch), FIFO_STATUS4 (3Dh)) can be read to detect FIFO overrun events, FIFO full status, FIFO empty status, FIFO threshold status and the number of unread samples stored in the FIFO. To generate dedicated interrupts on the INT1 and INT2 pads of these status events, the configuration can be set in INT1_CTRL (0Dh) and INT2_CTRL (0Eh). FIFO buffer can be configured according to five different modes: - Bypass mode - FIFO mode - Continuous mode - Continuous-to-FIFO mode - Bypass-to-continuous mode Each mode is selected by the FIFO_MODE_[2:0] in FIFO_CTRL5 (0Ah) register. To guarantee the correct acquisition of data during the switching into and out of FIFO mode, the first sample acquired must be discarded. DocID028370 Rev 5 31/108 108 Functionality 5.5.1 LSM6DS3H Bypass mode In Bypass mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 000), the FIFO is not operational and it remains empty. Bypass mode is also used to reset the FIFO when in FIFO mode. 5.5.2 FIFO mode In FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 001) data from the output channels are stored in the FIFO until it is full. To reset FIFO content, Bypass mode should be selected by writing FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0]) to '000' After this reset command, it is possible to restart FIFO mode by writing FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0]) to '001'. FIFO buffer memorizes up to 4096 samples of 16 bits each but the depth of the FIFO can be resized by setting the FTH [11:0] bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h). If the STOP_ON_FTH bit in CTRL4_C (13h) is set to '1', FIFO depth is limited up to FTH [11:0] bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h). 5.5.3 Continuous mode Continuous mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 110) provides a continuous FIFO update: as new data arrives, the older data is discarded. A FIFO threshold flag FIFO_STATUS2 (3Bh)(FTH) is asserted when the number of unread samples in FIFO is greater than or equal to FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h)(FTH [11:0]). It is possible to route FIFO_STATUS2 (3Bh) (FTH) to the INT1 pin by writing in register INT1_CTRL (0Dh) (INT1_FTH) = `1' or to the INT2 pin by writing in register INT2_CTRL (0Eh) (INT2_FTH) = `1'. A full-flag interrupt can be enabled, INT1_CTRL (0Dh) (INT_ FULL_FLAG) = '1', in order to indicate FIFO saturation and eventually read its content all at once. If an overrun occurs, at least one of the oldest samples in FIFO has been overwritten and the OVER_RUN flag in FIFO_STATUS2 (3Bh) is asserted. In order to empty the FIFO before it is full, it is also possible to pull from FIFO the number of unread samples available in FIFO_STATUS1 (3Ah) and FIFO_STATUS2 (3Bh) (DIFF_FIFO[11:0]). 5.5.4 Continuous-to-FIFO mode In Continuous-to-FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 011), FIFO behavior changes according to the trigger event detected in one of the following interrupt registers FUNC_SRC (53h), TAP_SRC (1Ch), WAKE_UP_SRC (1Bh) and D6D_SRC (1Dh). When the selected trigger bit is equal to '1', FIFO operates in FIFO mode. When the selected trigger bit is equal to '0', FIFO operates in Continuous mode. 32/108 DocID028370 Rev 5 LSM6DS3H 5.5.5 Functionality Bypass-to-Continuous mode In Bypass-to-Continuous mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = '100'), data measurement storage inside FIFO operates in Continuous mode when selected triggers in one of the following interrupt registers FUNC_SRC (53h), TAP_SRC (1Ch), WAKE_UP_SRC (1Bh) and D6D_SRC (1Dh) are equal to '1', otherwise FIFO content is reset (Bypass mode). 5.5.6 FIFO reading procedure The data stored in FIFO are accessible from dedicated registers (FIFO_DATA_OUT_L (3Eh) and FIFO_DATA_OUT_H (3Fh)) and each FIFO sample is composed of 16 bits. All FIFO status registers (FIFO_STATUS1 (3Ah), FIFO_STATUS2 (3Bh), FIFO_STATUS3 (3Ch), FIFO_STATUS4 (3Dh)) can be read at the start of a reading operation, minimizing the intervention of the application processor. Saving data in the FIFO buffer is organized in four FIFO data sets consisting of 6 bytes each: The 1st FIFO data set is reserved for gyroscope data; The 2nd FIFO data set is reserved for accelerometer data; The 3rd FIFO data set is reserved for the external sensor data stored in the registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h); The 4th FIFO data set can be alternately associated to the external sensor data stored in the registers from SENSORHUB7_REG (34h) to SENSORHUB12_REG(39h), to the step counter and timestamp info, or to the temperature sensor data. 5.5.7 Filter block diagrams Figure 6. Accelerometer chain $QDORJ $QWLDOLDVLQJ /3)LOWHU 'LJLWDO /3)LOWHU /3) $'& %:B;/>@ &RPSRVLWH )LOWHU 2'5B;/>@ DocID028370 Rev 5 33/108 108 Functionality LSM6DS3H Figure 7. Accelerometer composite filter 'LJLWDO +3)LOWHU 6/23(B)'6 $FWLYLW\ ,QDFWLYLW\ /3)B;/B(1 +3B6/23(B;/B(1 6/23(B)'625 )81&B(1 6/23( ),/7(5 ;/ 2XWSXW 5HJ 'LJLWDO /3)LOWHU /3) :DNHXS 6'7DS +3&)B;/>@ /3)B;/B(1 +3B6/23(B;/B(1 ),)2 6/23(B)'625 )81&B(1 /3)B;/B(1 ; +3B6/23(B;/B(1 )UHHIDOO $QGURLG IXQFWLRQV '' /2:B3$66B21B' Figure 8. Gyroscope chain 'LJLWDO +3)LOWHU $QDORJ $QWLDOLDVLQJ /3)LOWHU /3)LOWHU $'& +3B*B(1 2'5B*>@ 34/108 DocID028370 Rev 5 LSM6DS3H 6 Digital interfaces Digital interfaces The registers embedded inside the LSM6DS3H may be accessed through both the I2C and SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode. The device is compatible with SPI modes 0 and 3. The serial interfaces are mapped onto the same pins. To select/exploit the I2C interface, the CS line must be tied high (i.e connected to Vdd_IO). Table 9. Serial interface pin description Pin name CS SCL/SPC SDA/SDI/SDO SDO/SA0 6.1 Pin description SPI enable I2C/SPI mode selection (1: SPI idle mode / I2C communication enabled; 0: SPI communication mode / I2C disabled) I2C Serial Clock (SCL) SPI Serial Port Clock (SPC) I2C Serial Data (SDA) SPI Serial Data Input (SDI) 3-wire Interface Serial Data Output (SDO) SPI Serial Data Output (SDO) I2C less significant bit of the device address I2C serial interface The LSM6DS3H I2C is a bus slave. The I2C is employed to write the data to the registers, whose content can also be read back. The relevant I2C terminology is provided in the table below. Table 10. I2C terminology Term Transmitter Receiver Description The device which sends data to the bus The device which receives data from the bus Master The device which initiates a transfer, generates clock signals and terminates a transfer Slave The device addressed by the master There are two signals associated with the I2C bus: the serial clock line (SCL) and the Serial DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data to/from the interface. Both the lines must be connected to Vdd_IO through external pull-up resistors. When the bus is free, both the lines are high. The I2C interface is implemeted with fast mode (400 kHz) I2C standards as well as with the standard mode. In order to disable the I2C block, (I2C_disable) = 1 must be written in CTRL4_C (13h). DocID028370 Rev 5 35/108 108 Digital interfaces 6.1.1 LSM6DS3H I2C operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the master, the bus is considered busy. The next byte of data transmitted after the start condition contains the address of the slave in the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to the slave. When an address is sent, each device in the system compares the first seven bits after a start condition with its address. If they match, the device considers itself addressed by the master. The Slave ADdress (SAD) associated to the LSM6DS3H is 110101xb. The SDO/SA0 pin can be used to modify the less significant bit of the device address. If the SDO/SA0 pin is connected to the supply voltage, LSb is `1' (address 1101011b); else if the SDO/SA0 pin is connected to ground, the LSb value is `0' (address 1101010b). This solution permits to connect and address two different inertial modules to the same I2C bus. Data transfer with acknowledge is mandatory. The transmitter must release the SDA line during the acknowledge pulse. The receiver must then pull the data line LOW so that it remains stable low during the HIGH period of the acknowledge clock pulse. A receiver which has been addressed is obliged to generate an acknowledge after each byte of data received. The I2C embedded inside the LSM6DS3H behaves like a slave device and the following protocol must be adhered to. After the start condition (ST) a slave address is sent, once a slave acknowledge (SAK) has been returned, an 8-bit sub-address (SUB) is transmitted. The increment of the address is configured by the CTRL3_C (12h) (IF_INC). The slave address is completed with a Read/Write bit. If the bit is `1' (Read), a repeated START (SR) condition must be issued after the two sub-address bytes; if the bit is `0' (Write) the master will transmit to the slave with direction unchanged. Table 11 explains how the SAD+Read/Write bit pattern is composed, listing all the possible configurations. Table 11. SAD+Read/Write patterns Command SAD[6:1] SAD[0] = SA0 R/W SAD+R/W Read 110101 0 1 11010101 (D5h) Write 110101 0 0 11010100 (D4h) Read 110101 1 1 11010111 (D7h) Write 110101 1 0 11010110 (D6h) Table 12. Transfer when master is writing one byte to slave Master ST SAD + W Slave SUB SAK DATA SAK SP SAK Table 13. Transfer when master is writing multiple bytes to slave Master Slave 36/108 ST SAD + W SUB SAK DATA SAK DocID028370 Rev 5 DATA SAK SP SAK LSM6DS3H Digital interfaces Table 14. Transfer when master is receiving (reading) one byte of data from slave Master ST SAD + W Slave SUB SAK SR SAD + R SAK NMAK SAK SP DATA Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave Master ST SAD+W Slave SUB SAK SR SAD+R SAK MAK SAK DATA MAK DATA NMAK SP DATA Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of bytes transferred per transfer is unlimited. Data is transferred with the Most Significant bit (MSb) first. If a receiver can't receive another complete byte of data until it has performed some other function, it can hold the clock line, SCL LOW to force the transmitter into a wait state. Data transfer only continues when the receiver is ready for another byte and releases the data line. If a slave receiver doesn't acknowledge the slave address (i.e. it is not able to receive because it is performing some real-time function) the data line must be left HIGH by the slave. The master can then abort the transfer. A LOW to HIGH transition on the SDA line while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be terminated by the generation of a STOP (SP) condition. In the presented communication format MAK is Master acknowledge and NMAK is No Master Acknowledge. DocID028370 Rev 5 37/108 108 Digital interfaces 6.2 LSM6DS3H SPI bus interface The LSM6DS3H SPI is a bus slave. The SPI allows writing and reading the registers of the device. The serial interface communicates to the application using 4 wires: CS, SPC, SDI and SDO. Figure 9. Read and write protocol (in mode 3) &6 63& 6', ', ', ', ', ', ', ', ', 5: $' $' $' $' $' $' $' 6'2 '2 '2 '2 '2 '2 '2 '2 '2 CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of the transmission and goes back high at the end. SPC is the serial port clock and it is controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI and SDO are, respectively, the serial port data input and output. Those lines are driven at the falling edge of SPC and should be captured at the rising edge of SPC. Both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case of multiple read/write bytes. Bit duration is the time between two falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the falling edge of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SPC just before the rising edge of CS. bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0) from the device is read. In latter case, the chip will drive SDO at the start of bit 8. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DI(7:0) (write mode). This is the data that is written into the device (MSb first). bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first). In multiple read/write commands further blocks of 8 clock periods will be added. When the CTRL3_C (12h) (IF_INC) bit is `0', the address used to read/write data remains the same for every block. When the CTRL3_C (12h) (IF_INC) bit is `1', the address used to read/write data is increased at every block. The function and the behavior of SDI and SDO remain unchanged. 38/108 DocID028370 Rev 5 LSM6DS3H 6.2.1 Digital interfaces SPI read Figure 10. SPI read protocol (in mode 3) &6 63& 6', 5: $' $' $' $' $' $' $' 6'2 '2 '2 '2 '2 '2 '2 '2 '2 The SPI Read command is performed with 16 clock pulses. A multiple byte read command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: READ bit. The value is 1. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb first). bit 16-...: data DO(...-8). Further data in multiple byte reads. Figure 11. Multiple byte SPI read protocol (2-byte example) (in mode 3) &6 63& 6', 5: $' $' $' $' $' $' $' 6'2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 '2 DocID028370 Rev 5 39/108 108 Digital interfaces 6.2.2 LSM6DS3H SPI write Figure 12. SPI write protocol (in mode 3) &6 63& 6', ', ', ', ', ', ', ', ', 5: $' $' $' $' $' $' $' The SPI Write command is performed with 16 clock pulses. A multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit. The value is 0. bit 1 -7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DI(7:0) (write mode). This is the data that is written inside the device (MSb first). bit 16-... : data DI(...-8). Further data in multiple byte writes. Figure 13. Multiple byte SPI write protocol (2-byte example) (in mode 3) &6 63& 6', ', ', ', ', ', ', ', ', ',',',',',',', ', 5: $' $' $' $' $' $' $' 40/108 DocID028370 Rev 5 LSM6DS3H 6.2.3 Digital interfaces SPI read in 3-wire mode A 3-wire mode is entered by setting the CTRL3_C (12h) (SIM) bit equal to `1' (SPI serial interface mode selection). Figure 14. SPI read protocol in 3-wire mode (in mode 3) &6 63& 6',2 '2 '2 '2 '2 '2 '2 '2 '2 5: $' $' $' $' $' $' $' The SPI read command is performed with 16 clock pulses: bit 0: READ bit. The value is 1. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first). A multiple read command is also available in 3-wire mode. DocID028370 Rev 5 41/108 108 Application hints LSM6DS3H 7 Application hints 7.1 LSM6DS3H electrical connections in Mode 1 Figure 15. LSM6DS3H electrical connections in Mode 1 ,&FRQILJXUDWLRQ 9GGB,2 5SX 5SX 6&/ 6'$ 3XOOXSWREHDGGHG 5SX N2KP 1. Leave pin electrically unconnected and soldered to PCB. The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic) should be placed as near as possible to the supply pin of the device (common design practice). The functionality of the device and the measured acceleration/angular rate data is selectable and accessible through the SPI/I2C interface. The functions, the threshold and the timing of the two interrupt pins for each sensor can be completely programmed by the user through the SPI/I2C interface. 42/108 DocID028370 Rev 5 LSM6DS3H 7.2 Application hints LSM6DS3H electrical connections in Mode 2 Figure 16. LSM6DS3H electrical connections in Mode 2 +267 &6 6&/ 6'$ 0RGH ,&63, Z 6'26$ 723 9,(: 06'$ 06&/ 1& /60'6+ 0DVWHU,& 0'5'<,17 9GG 9'' ([WHUQDOVHQVRUV & *1' 9'',2 *1' ,17 1& Q) ,&FRQILJXUDWLRQ *1' 9GGB,2 & 9GGB,2 5SX 5SX Q) 6&/ *1' 6'$ 3XOOXSWREHDGGHG 5SX N2KP 1. Leave pin electrically unconnected and soldered to PCB. The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic) should be placed as near as possible to the supply pin of the device (common design practice). The functionality of the device and the measured acceleration/angular rate data is selectable and accessible through the SPI/I2C interface. The functions, the threshold and the timing of the two interrupt pins for each sensor can be completely programmed by the user through the SPI/I2C interface. DocID028370 Rev 5 43/108 108 Application hints 7.3 LSM6DS3H LSM6DS3H electrical connections in Mode 3 Figure 17. LSM6DS3H electrical connections in Mode 3 (SPI 4-wire primary interface configuration) 0RGH +267 ,&63, Z /60'6+ $X[63, Z &DPHUD 0RGXOH ,&FRQILJXUDWLRQ 9GGB,2 5SX 127( 7RDYRLGOHDNDJHFXUUHQWLWLVUHFRPPHQGHGWRDGGSXOOXS UHVLVWRUVRQWKH63,OLQHVXQOHVVWKH63,PDVWHUFDQEHOHIWRQ DOVRZKLOHWKH2,6V\VWHPLVRII 5SX 6&/ 6'$ 3XOOXSWREHDGGHG 5SX N2KP 1. Leave pin electrically unconnected and soldered to PCB. The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic) should be placed as near as possible to the supply pin of the device (common design practice). The functionality of the device and the measured acceleration/angular rate data is selectable and accessible through the SPI/I2C interface. The functions, the threshold and the timing of the two interrupt pins for each sensor can be completely programmed by the user through the SPI/I2C interface. In the primary SPI connection, the gyroscope output data is available in registers 22h to 27h with user-selected FS and ODR. In the auxiliary SPI, the gyroscope output is available in registers 22h to 27h @ 3.3 kHz and FS = 250 dps. 44/108 DocID028370 Rev 5 LSM6DS3H 8 Register mapping Register mapping The table given below provides a list of the 8/16 bit registers embedded in the device and the corresponding addresses. Table 16. Registers address map Register address Name RESERVED FUNC_CFG_ACCESS Type - Default Hex Binary 00 00000000 Comment 00000000 Reserved Embedded functions configuration register r/w 01 00000001 00000000 RESERVED - 02 00000010 - Reserved RESERVED - 03 00000011 - Reserved r/w 04 00000100 00000000 RESERVED - 05 00000101 - FIFO_CTRL1 r/w 06 00000110 00000000 FIFO_CTRL2 r/w 07 00000111 00000000 FIFO_CTRL3 r/w 08 00001000 00000000 FIFO_CTRL4 r/w 09 00001001 00000000 FIFO_CTRL5 r/w 0A 00001010 00000000 ORIENT_CFG_G r/w 0B 00001011 00000000 RESERVED - 0C 00001100 - INT1_CTRL r/w 0D 00001101 00000000 INT1 pin control INT2_CTRL r/w 0E 00001110 00000000 INT2 pin control WHO_AM_I r 0F 00001111 01101001 Who I am ID CTRL1_XL r/w 10 00010000 00000000 CTRL2_G r/w 11 00010001 00000000 CTRL3_C r/w 12 00010010 00000100 CTRL4_C r/w 13 00010011 00000000 CTRL5_C r/w 14 00010100 00000000 CTRL6_C r/w 15 00010101 00000000 CTRL7_G r/w 16 00010110 00000000 CTRL8_XL r/w 17 0001 0111 00000000 CTRL9_XL r/w 18 00011000 00111000 CTRL10_C r/w 19 00011001 00111000 SENSOR_SYNC_TIME_ FRAME DocID028370 Rev 5 Sensor sync configuration register Reserved FIFO configuration registers Reserved Accelerometer and gyroscope control registers 45/108 108 Register mapping LSM6DS3H Table 16. Registers address map (continued) Register address Name Default Hex Binary r/w 1A 00011010 00000000 WAKE_UP_SRC r 1B 00011011 output TAP_SRC r 1C 00011100 output D6D_SRC r 1D 00011101 output MASTER_CONFIG 46/108 Type STATUS_REG(1)/ STATUS_SPIAux(2) r 1E 00011110 output RESERVED - 1F 00011111 - OUT_TEMP_L r 20 00100000 output OUT_TEMP_H r 21 00100001 output OUTX_L_G r 22 00100010 output OUTX_H_G r 23 00100011 output OUTY_L_G r 24 00100100 output OUTY_H_G r 25 00100101 output OUTZ_L_G r 26 00100110 output OUTZ_H_G r 27 00100111 output OUTX_L_XL r 28 00101000 output OUTX_H_XL r 29 00101001 output OUTY_L_XL r 2A 00101010 output OUTY_H_XL r 2B 00101011 output OUTZ_L_XL r 2C 00101100 output OUTZ_H_XL r 2D 00101101 output DocID028370 Rev 5 Comment I2C master configuration register Interrupt registers Status data register for user interface and OIS data Reserved Temperature output data registers Gyroscope output registers for user interface and OIS data Accelerometer output registers LSM6DS3H Register mapping Table 16. Registers address map (continued) Register address Name Type Default Hex Binary SENSORHUB1_REG r 2E 00101110 output SENSORHUB2_REG r 2F 00101111 output SENSORHUB3_REG r 30 00110000 output SENSORHUB4_REG r 31 00110001 output SENSORHUB5_REG r 32 00110010 output SENSORHUB6_REG r 33 00110011 output SENSORHUB7_REG r 34 00110100 output SENSORHUB8_REG r 35 00110101 output SENSORHUB9_REG r 36 00110110 output SENSORHUB10_REG r 37 00110111 output SENSORHUB11_REG r 38 00111000 output SENSORHUB12_REG r 39 00111001 output FIFO_STATUS1 r 3A 00111010 output FIFO_STATUS2 r 3B 00111011 output FIFO_STATUS3 r 3C 00111100 output FIFO_STATUS4 r 3D 00111101 output FIFO_DATA_OUT_L r 3E 00111110 output FIFO_DATA_OUT_H r 3F 00111111 output TIMESTAMP0_REG r 40 01000000 output TIMESTAMP1_REG r 41 01000001 output TIMESTAMP2_REG r/w 42 01000010 output RESERVED - 43-48 STEP_TIMESTAMP_L r 49 0100 1001 output STEP_TIMESTAMP_H r 4A 0100 1010 output STEP_COUNTER_L r 4B 01001011 output STEP_COUNTER_H r 4C 01001100 output SENSORHUB13_REG r 4D 01001101 output SENSORHUB14_REG r 4E 01001110 output SENSORHUB15_REG r 4F 01001111 output SENSORHUB16_REG r 50 01010000 output SENSORHUB17_REG r 51 01010001 output SENSORHUB18_REG r 52 01010010 output FUNC_SRC r 53 01010011 output DocID028370 Rev 5 - Comment Sensor hub output registers FIFO status registers FIFO data output registers Timestamp output registers Reserved Step counter timestamp registers Step counter output registers Sensor hub output registers Interrupt register 47/108 108 Register mapping LSM6DS3H Table 16. Registers address map (continued) Register address Name Type Default Hex RESERVED - 54-57 TAP_CFG r/w 58 01011000 00000000 TAP_THS_6D r/w 59 01011001 00000000 INT_DUR2 r/w 5A 01011010 00000000 WAKE_UP_THS r/w 5B 01011011 00000000 WAKE_UP_DUR r/w 5C 01011100 00000000 FREE_FALL r/w 5D 01011101 00000000 MD1_CFG r/w 5E 01011110 00000000 MD2_CFG r/w 5F 01011111 00000000 RESERVED - 60-65 OUT_MAG_RAW_X_L r 66 0110 0110 output OUT_MAG_RAW_X_H r 67 0110 0111 output OUT_MAG_RAW_Y_L r 68 0110 1000 output OUT_MAG_RAW_Y_H r 69 0110 1001 output OUT_MAG_RAW_Z_L r 6A 0110 1010 output OUT_MAG_RAW_X_H r 6B 0110 1011 output r/w 70 0111 0000 00000000 CTRL_SPIAux Comment Binary - - Reserved Interrupt registers Reserved External magnetometer raw data output registers OIS data control register 1. This register status is read using the primary interface for user interface gyroscope data. 2. This register status is read using the auxiliary SPI for OIS gyroscope data. Registers marked as Reserved must not be changed. Writing to those registers may cause permanent damage to the device. The content of the registers that are loaded at boot should not be changed. They contain the factory calibration values. Their content is automatically restored when the device is powered up. 48/108 DocID028370 Rev 5 LSM6DS3H 9 Register description Register description The device contains a set of registers which are used to control its behavior and to retrieve linear acceleration, angular rate and temperature data. The register addresses, made up of 7 bits, are used to identify them and to write the data through the serial interface. 9.1 FUNC_CFG_ACCESS (01h) Enable embedded functions register (r/w). Table 17. FUNC_CFG_ACCESS register FUNC_CFG_EN 0 (1) 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) 1. This bit must be set to `0' for the correct operation of the device. Table 18. FUNC_CFG_ACCESS register description Enable access to the embedded functions configuration registers (1) from address 02h to 32h. Default value: 0. FUNC_CFG_EN (0: disable access to embedded functions configuration registers; 1: enable access to embedded functions configuration registers) 1. The embedded functions configuration registers details are available in 10: Embedded functions register mapping and 11: Embedded functions registers description. 9.2 SENSOR_SYNC_TIME_FRAME (04h) Sensor synchronization time frame register (r/w). Table 19. SENSOR_SYNC_TIME_FRAME register TPH_7 TPH_6 TPH_5 TPH_4 TPH_3 TPH_2 TPH_1 TPH_0 Table 20. SENSOR_SYNC_TIME_FRAME register description TPH_ [7:0] 9.3 Sensor synchronization time frame with the step of 500 ms and full range of 5 s. Unsigned 8-bit. Default value: 0000 0000 FIFO_CTRL1 (06h) FIFO control register (r/w). Table 21. FIFO_CTRL1 register FTH_7 FTH_6 FTH_5 FTH_4 FTH_3 FTH_2 FTH_1 FTH_0 Table 22. FIFO_CTRL1 register description FIFO threshold level setting(1). Default value: 0000 0000. FTH_[7:0] Watermark flag rises when the number of bytes written to FIFO after the next write is greater than or equal to the threshold level. Minimum resolution for the FIFO is 1 LSB = 2 bytes (1 word) in FIFO 1. For a complete watermark threshold configuration, consider FTH_[11:8] in FIFO_CTRL2 (07h). DocID028370 Rev 5 49/108 108 Register description 9.4 LSM6DS3H FIFO_CTRL2 (07h) FIFO control register (r/w). Table 23. FIFO_CTRL2 register TIMER_PEDO TIMER_PEDO _FIFO_EN _FIFO_DRDY 0(1) 0(1) FTH_11 FTH10 FTH_9 FTH_8 1. This bit must be set to `0' for the correct operation of the device. Table 24. FIFO_CTRL2 register description TIMER_PEDO _FIFO_EN Enable pedometer step counter and timestamp as 4th FIFO data set. Default: 0 (0: disable step counter and timestamp data as 4th FIFO data set; 1: enable step counter and timestamp data as 4th FIFO data set) TIMER_PEDO _FIFO_DRDY FIFO write mode(1). Default: 0 (0: enable write in FIFO based on XL/Gyro data-ready; 1: enable write in FIFO at every step detected by step counter.) FTH_[11:8] FIFO threshold level setting(2). Default value: 0000 Watermark flag rises when the number of bytes written to FIFO after the next write is greater than or equal to the threshold level. Minimum resolution for the FIFO is 1LSB = 2 bytes (1 word) in FIFO 1. This bit is effective if the DATA_VALID_SEL_FIFO bit of the MASTER_CONFIG (1Ah) register is set to 0. 2. For a complete watermark threshold configuration, consider FTH_[7:0] in FIFO_CTRL1 (06h) 9.5 FIFO_CTRL3 (08h) FIFO control register (r/w). Table 25. FIFO_CTRL3 register 0(1) 0(1) DEC_FIFO DEC_FIFO DEC_FIFO DEC_FIFO DEC_FIFO DEC_FIFO _GYRO2 _GYRO1 _GYRO0 _XL2 _XL1 _XL0 1. This bit must be set to `0' for the correct operation of the device. Table 26. FIFO_CTRL3 register description DEC_FIFO_GYRO [2:0] DEC_FIFO_XL [2:0] 50/108 Gyro FIFO (first data set) decimation setting. Default: 000 For the configuration setting, refer to Table 27. Accelerometer FIFO (second data set) decimation setting. Default: 000 For the configuration setting, refer to Table 28. DocID028370 Rev 5 LSM6DS3H Register description Table 27. Gyro FIFO decimation setting DEC_FIFO_GYRO [2:0] Configuration 000 Gyro sensor not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 Table 28. Accelerometer FIFO decimation setting DEC_FIFO_XL [2:0] 9.6 Configuration 000 Accelerometer sensor not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 FIFO_CTRL4 (09h) FIFO control register (r/w). Table 29. FIFO_CTRL4 register 0(1) ONLY_HIGH DEC_DS4 _DATA _FIFO2 DEC_DS4 _FIFO1 DEC_DS4 _FIFO0 DEC_DS3 _FIFO2 DEC_DS3 _FIFO1 DEC_DS3 _FIFO0 1. This bit must be set to `0' for the correct operation of the device. Table 30. FIFO_CTRL4 register description 8-bit data storage in FIFO. Default: 0 ONLY_HIGH_DATA (0: disable MSByte only memorization in FIFO for XL and Gyro; 1: enable MSByte only memorization in FIFO for XL and Gyro in FIFO) DEC_DS4_FIFO[2:0] DEC_DS3_FIFO[2:0] Fourth FIFO data set decimation setting. Default: 000 For the configuration setting, refer to Table 31. Third FIFO data set decimation setting. Default: 000 For the configuration setting, refer to Table 32. DocID028370 Rev 5 51/108 108 Register description LSM6DS3H Table 31. Fourth FIFO data set decimation setting DEC_DS4_FIFO[2:0] Configuration 000 Fourth FIFO data set not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 Table 32. Third FIFO data set decimation setting DEC_DS3_FIFO[2:0] 9.7 Configuration 000 Third FIFO data set not in FIFO 001 No decimation 010 Decimation with factor 2 011 Decimation with factor 3 100 Decimation with factor 4 101 Decimation with factor 8 110 Decimation with factor 16 111 Decimation with factor 32 FIFO_CTRL5 (0Ah) FIFO control register (r/w). Table 33. FIFO_CTRL5 register 0(1) ODR_ FIFO_3 ODR_ FIFO_2 ODR_ FIFO_1 ODR_ FIFO_0 FIFO_ MODE_2 FIFO_ MODE_1 FIFO_ MODE_0 1. This bit must be set to `0' for the correct operation of the device. Table 34. FIFO_CTRL5 register description ODR_FIFO_[3:0] FIFO_MODE_[2:0] 52/108 FIFO ODR selection, setting FIFO_MODE also. Default: 0000 For the configuration setting, refer to Table 35 FIFO mode selection bits, setting ODR_FIFO also. Default value: 000 For the configuration setting refer to Table 36 DocID028370 Rev 5 LSM6DS3H Register description Table 35. FIFO ODR selection Configuration(1) ODR_FIFO_[3:0] 0000 FIFO disabled 0001 FIFO ODR is set to 12.5 Hz 0010 FIFO ODR is set to 26 Hz 0011 FIFO ODR is set to 52 Hz 0100 FIFO ODR is set to 104 Hz 0101 FIFO ODR is set to 208 Hz 0110 FIFO ODR is set to 416 Hz 0111 FIFO ODR is set to 833 Hz 1000 FIFO ODR is set to 1.66 kHz 1001 FIFO ODR is set to 3.33 kHz 1010 FIFO ODR is set to 6.66 kHz 1. If the device is working at an ODR slower than the one selected, FIFO ODR is limited to that ODR value. Moreover, these bits are effective if both the DATA_VALID_SEL FIFO bit of MASTER_CONFIG (1Ah) and the TIMER_PEDO_FIFO_DRDY bit of FIFO_CTRL2 (07h) are set to 0. Table 36. FIFO mode selection FIFO_MODE_[2:0] Configuration mode 000 Bypass mode. FIFO disabled. 001 FIFO mode. Stops collecting data when FIFO is full. 010 Reserved 011 Continuous mode until trigger is deasserted, then FIFO mode. 100 Bypass mode until trigger is deasserted, then Continuous mode. 101 Reserved 110 Continuous mode. If the FIFO is full, the new sample overwrites the older one. 111 Reserved DocID028370 Rev 5 53/108 108 Register description 9.8 LSM6DS3H ORIENT_CFG_G (0Bh) Angular rate sensor sign and orientation register (r/w). Table 37. ORIENT_CFG_G register DRDY_ PULSED 0(1) SignX_G SignY_G SignZ_G Orient_2 Orient_1 Orient_0 1. This bit must be set to `0' for the correct operation of the device. Table 38. ORIENT_CFG_G register description DRDY_PULSED Enable pulsed data-ready mode. Default: 0 (0: Data-ready latched mode. Returns to 0 only after output data have been read; 1: Data-ready pulsed mode. The data-ready pulses are 50 s long.) SignX_G Pitch axis (X) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) SignY_G Roll axis (Y) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) SignZ_G Yaw axis (Z) angular rate sign. Default value: 0 (0: positive sign; 1: negative sign) Orient [2:0] Directional user-orientation selection. Default value: 000 For the configuration setting, refer to Table 39. Table 39. Settings for orientation of axes Orient [2:0] 54/108 000 001 010 011 100 101 Pitch X X Y Y Z Z Roll Y Z X Z X Y Yaw Z Y Z X Y X DocID028370 Rev 5 LSM6DS3H 9.9 Register description INT1_CTRL (0Dh) INT1 pad control register (r/w). Each bit in this register enables a signal to be carried through INT1. The pad's output will supply the OR combination of the selected signals. Table 40. INT1_CTRL register INT1_ INT1_SIGN INT1_FULL INT1_ STEP_ _MOT _FLAG FIFO_OVR DETECTOR INT1_ FTH INT1_ BOOT INT1_ INT1_ DRDY_G DRDY_XL Table 41. INT1_CTRL register description INT1_ STEP_ DETECTOR Pedometer step recognition interrupt enable on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_SIGN_MOT Significant motion interrupt enable on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_FULL_FLAG FIFO full flag interrupt enable on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_FIFO_OVR FIFO overrun interrupt on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_FTH FIFO threshold interrupt on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_ BOOT Boot status available on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_DRDY_G Gyroscope data-ready on INT1 pad. Default value: 0 (0: disabled; 1: enabled) INT1_DRDY_XL Accelerometer data-ready on INT1 pad. Default value: 0 (0: disabled; 1: enabled) DocID028370 Rev 5 55/108 108 Register description 9.10 LSM6DS3H INT2_CTRL (0Eh) INT2 pad control register (r/w). Each bit in this register enables a signal to be carried through INT2. The pad's output will supply the OR combination of the selected signals. Table 42. INT2_CTRL register INT2_STEP INT2_STEP_ INT2_ INT2_ _DELTA COUNT_OV FULL_FLAG FIFO_OVR INT2_ FTH INT2_ DRDY _TEMP INT2_ DRDY_G INT2_ DRDY_XL Table 43. INT2_CTRL register description INT2_STEP_DELTA Pedometer step recognition interrupt on delta time(1) enable on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_STEP_COUNT _OV Step counter overflow interrupt enable on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_ FULL_FLAG FIFO full flag interrupt enable on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_FIFO_OVR FIFO overrun interrupt on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_FTH FIFO threshold interrupt on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_DRDY_TEMP Temperature data-ready on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_DRDY_G Gyroscope data-ready on INT2 pad. Default value: 0 (0: disabled; 1: enabled) INT2_DRDY_XL Accelerometer data-ready on INT2 pad. Default value: 0 (0: disabled; 1: enabled) 1. Delta time value is defined in register STEP_COUNT_DELTA (15h). 9.11 WHO_AM_I (0Fh) Who_AM_I register (r). This register is a read-only register. Its value is fixed at 69h. Table 44. WHO_AM_I register 0 56/108 1 1 0 DocID028370 Rev 5 1 0 0 1 LSM6DS3H 9.12 Register description CTRL1_XL (10h) Linear acceleration sensor control register 1 (r/w). Table 45. CTRL1_XL register ODR_XL3 ODR_XL2 ODR_XL1 ODR_XL0 FS_XL1 FS_XL0 BW_XL1 BW_XL0 Table 46. CTRL1_XL register description ODR_XL [3:0] Output data rate and power mode selection. Default value: 0000 (see Table 47). FS_XL [1:0] Accelerometer full-scale selection. Default value: 00. (00: 2 g; 01: 16 g; 10: 4 g; 11: 8 g) BW_XL [1:0] Anti-aliasing filter bandwidth selection. Default value: 00 (00: 400 Hz; 01: 200 Hz; 10: 100 Hz; 11: 50 Hz) Table 47. Accelerometer ODR register setting ODR_ ODR_ ODR_ ODR_ XL3 XL2 XL1 XL0 ODR selection [Hz] when XL_HM_MODE = 1 ODR selection [Hz] when XL_HM_MODE = 0 0 0 0 0 Power-down Power-down 0 0 0 1 12.5 Hz (low power) 12.5 Hz (high performance) 0 0 1 0 26 Hz (low power) 26 Hz (high performance) 0 0 1 1 52 Hz (low power) 52 Hz (high performance) 0 1 0 0 104 Hz (normal mode) 104 Hz (high performance) 0 1 0 1 208 Hz (normal mode) 208 Hz (high performance) 0 1 1 0 416 Hz (high performance) 416 Hz (high performance) 0 1 1 1 833 Hz (high performance) 833 Hz (high performance) 1 0 0 0 1.66 kHz (high performance) 1.66 kHz (high performance) 1 0 0 1 3.33 kHz (high performance) 3.33 kHz (high performance) 1 0 1 0 6.66 kHz (high performance) 6.66 kHz (high performance) Table 48. BW and ODR (high-performance mode) Analog filter BW (XL_HM_MODE = 0) ODR(1) XL_BW_SCAL_ODR = 0 6.66 - 3.33 kHz Filter not used 1.66 kHz 400 Hz 833 Hz 400 Hz 416 Hz 200 Hz 208 Hz 100 Hz 104 - 12.5 Hz 50 Hz XL_BW_SCAL_ODR = 1 Bandwidth is determined by setting BW_XL[1:0] in CTRL1_XL (10h) 1. Filter not used when accelerometer is in normal and low-power modes. DocID028370 Rev 5 57/108 108 Register description 9.13 LSM6DS3H CTRL2_G (11h) Angular rate sensor control register 2 (r/w). Table 49. CTRL2_G register ODR_G3 ODR_G2 ODR_G1 ODR_G0 FS_G1 FS_G0 FS_125 0(1) 1. This bit must be set to `0' for the correct operation of the device. Table 50. CTRL2_G register description ODR_G [3:0] Gyroscope output data rate selection. Default value: 0000 (Refer to Table 51) FS_G [1:0] Gyroscope full-scale selection. Default value: 00 (00: 250 dps; 01: 500 dps; 10: 1000 dps; 11: 2000 dps) FS_125 Gyroscope full-scale at 125 dps. Default value: 0 (0: disabled; 1: enabled) Table 51. Gyroscope ODR configuration setting ODR [Hz] when G_HM_MODE = 1 ODR [Hz] when G_HM_MODE = 0 ODR_G3 ODR_G2 ODR_G1 ODR_G0 0 0 0 0 Power down Power down 0 0 0 1 12.5 Hz (low power) 12.5 Hz (high performance) 0 0 1 0 26 Hz (low power) 26 Hz (high performance) 0 0 1 1 52 Hz (low power) 52 Hz (high performance) 0 1 0 0 104 Hz (normal mode) 104 Hz (high performance) 0 1 0 1 208 Hz (normal mode) 208 Hz (high performance) 0 1 1 0 416 Hz (high performance) 416 Hz (high performance) 0 1 1 1 833 Hz (high performance) 833 Hz (high performance) 1 0 0 0 1.66 kHz (high performance) 1.66 kHz (high performance) 58/108 DocID028370 Rev 5 LSM6DS3H 9.14 Register description CTRL3_C (12h) Control register 3 (r/w). Table 52. CTRL3_C register BOOT BDU H_LACTIVE PP_OD SIM IF_INC BLE SW_RESET Table 53. CTRL3_C register description BOOT Reboot memory content. Default value: 0 (0: normal mode; 1: reboot memory content(1)) BDU Block Data Update. Default value: 0 (0: continuous update; 1: output registers not updated until MSB and LSB have been read) H_LACTIVE Interrupt activation level. Default value: 0 (0: interrupt output pads active high; 1: interrupt output pads active low) PP_OD Push-pull/open-drain selection on INT1 and INT2 pads. Default value: 0 (0: push-pull mode; 1: open-drain mode) SIM SPI Serial Interface Mode selection. Default value: 0 (0: 4-wire interface; 1: 3-wire interface). IF_INC Register address automatically incremented during a multiple byte access with a serial interface (I2C or SPI). Default value: 1 (0: disabled; 1: enabled) BLE Big/Little Endian data selection. Default value 0 (0: data LSB @ lower address; 1: data MSB @ lower address) SW_RESET Software reset. Default value: 0 (0: normal mode; 1: reset device) This bit is cleared by hardware after next flash boot. 1. Boot request is executed as soon as internal oscillator is turned on. It is possible to set bit while in powerdown mode, in this case it will be served at the next normal mode or sleep mode. DocID028370 Rev 5 59/108 108 Register description 9.15 LSM6DS3H CTRL4_C (13h) Control register 4 (r/w). Table 54. CTRL4_C register XL_BW_ INT2_on_ FIFO_ SLEEP_G SCAL_ODR INT1 TEMP_EN DRDY_ MASK I2C_disable 3.3kHz_ ODR STOP_ON _FTH Table 55. CTRL4_C register description XL_BW_ SCAL_ODR Accelerometer bandwidth selection. Default value: 0 (0(1): bandwidth determined by ODR selection, refer to Table 48; 1(2): bandwidth determined by setting BW_XL[1:0] in CTRL1_XL (10h) register.) SLEEP_G Gyroscope sleep mode enable. Default value: 0 (0: disabled; 1: enabled) INT2_on_INT1 All interrupt signals available on INT1 pad enable. Default value: 0 (0: interrupt signals divided between INT1 and INT2 pads; 1: all interrupt signals in logic or on INT1 pad) FIFO_TEMP_EN Enable temperature data as 4th FIFO data set(3). Default: 0 (0: disable temperature data as 4th FIFO data set; 1: enable temperature data as 4th FIFO data set) DRDY_MASK Data-ready mask enable. If enabled, when switching from Power-Down to an active mode, the accelerometer and gyroscope data-ready signals are masked until the settling of the sensor filters is completed. Default value: 0 (0: disabled; 1: enabled) I2C_disable Disable I2C interface. Default value: 0 (0: both I2C and SPI enabled; 1: I2C disabled, SPI only) 3.3kHz_ODR Enable 3.3 kHz in primary SPI interface. (0: disable; 1: enable 3.3 kHz ODR for gyroscope part with full scale and highpass filter coherent with control registers setting).(4) (5) STOP_ON_FTH Enable FIFO threshold level use. Default value: 0. (0: FIFO depth is not limited; 1: FIFO depth is limited to threshold level) 1. Filter used in high-performance mode only with ODR less than 3.33 kHz. 2. Filter used in high-performance mode only. 3. This bit is effective if the TIMER_PEDO_FIFO_EN bit of FIFO_CTRL2 (07h) register is set to 0. 4. FIFO and gyroscope low-power mode are not supported when this bit is set to `1'. 5. Data-ready (pulsed or latched) is available on the INT1/INT2 pins. 9.16 CTRL5_C (14h) Control register 5 (r/w). Table 56. CTRL5_C register ROUNDING2 ROUNDING1 ROUNDING0 0(1) ST1_G 1. This bit must be set to `0' for the correct operation of the device 60/108 DocID028370 Rev 5 ST0_G ST1_XL ST0_XL LSM6DS3H Register description Table 57. CTRL5_C register description ROUNDING[2:0] Circular burst-mode (rounding) read from output registers. Default: 000 (000: no rounding; Others: refer to Table 58) ST_G [1:0] Angular rate sensor self-test enable. Default value: 00 (00: Self-test disabled; Other: refer to Table 59) ST_XL [1:0] Linear acceleration sensor self-test enable. Default value: 00 (00: Self-test disabled; Other: refer to Table 60) Table 58. Output registers rounding pattern ROUNDING[2:0] Rounding pattern 000 No rounding 001 Accelerometer only 010 Gyroscope only 011 Gyroscope + accelerometer 100 Registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h) only 101 Accelerometer + registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h) 110 Gyroscope + accelerometer + registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h) and registers from SENSORHUB7_REG (34h) to SENSORHUB12_REG(39h) 111 Gyroscope + accelerometer + registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h) Table 59. Angular rate sensor self-test mode selection ST1_G ST0_G Self-test mode 0 0 Normal mode 0 1 Positive sign self-test 1 0 Not allowed 1 1 Negative sign self-test Table 60. Linear acceleration sensor self-test mode selection ST1_XL ST0_XL Self-test mode 0 0 Normal mode 0 1 Positive sign self-test 1 0 Negative sign self-test 1 1 Not allowed DocID028370 Rev 5 61/108 108 Register description 9.17 LSM6DS3H CTRL6_C (15h) Angular rate sensor control register 6 (r/w). Table 61. CTRL6_C register TRIG_EN LVLen LVL2_EN XL_HM_MODE 0(1) 0(1) 0(1) 0(1) 1. This bit must be set to `0' for the correct operation of the device. Table 62. CTRL6_C register description TRIG_EN Gyroscope data edge-sensitive trigger enable. Default value: 0 (0: external trigger disabled; 1: external trigger enabled) LVLen Gyroscope data level-sensitive trigger enable. Default value: 0 (0: level-sensitive trigger disabled; 1: level sensitive trigger enabled) LVL2_EN Gyroscope level-sensitive latched enable. Default value: 0 (0: level-sensitive latched disabled; 1: level sensitive latched enabled) XL_HM_MODE High-performance operating mode disable for accelerometer(1). Default value: 0 (0: high-performance operating mode enabled; 1: high-performance operating mode disabled) 1. Normal and low-power mode depends on the ODR setting, for details refer to Table 47. 9.18 CTRL7_G (16h) Angular rate sensor control register 7 (r/w). Table 63. CTRL7_G register G_HM_MODE HP_G_ EN HPCF_G1 HPCF_G0 HP_G_R ROUNDING_ ST STATUS 0(1) 0(1) 1. This bit must be set to `0' for the correct operation of the device. Table 64. CTRL7_G register description High-performance operating mode disable for gyroscope(1). Default: 0 G_HM_MODE (0: high-performance operating mode enabled; 1: high-performance operating mode disabled) HP_G_EN Gyroscope digital high-pass filter enable. The filter is enabled only if the gyro is in HP mode. Default value: 0 (0: HPF disabled; 1: HPF enabled) HP_G_RST Gyro digital HP filter reset. Default: 0 (0: gyro digital HP filter reset OFF; 1: gyro digital HP filter reset ON) ROUNDING_ STATUS Source register rounding function enable on STATUS_REG (1Eh), FUNC_SRC (53h) and WAKE_UP_SRC (1Bh) registers. Default value: 0 (0: disabled; 1: enabled) HPCF_G[1:0] Gyroscope high-pass filter cutoff frequency selection. Default value: 00. Refer to Table 65. 1. Normal and low-power mode depends on the ODR setting, for details refer to Table 51. 62/108 DocID028370 Rev 5 LSM6DS3H Register description Table 65. Gyroscope high-pass filter mode configuration HPCF_G1 9.19 HPCF_G0 High-pass filter cutoff frequency 0 0 0.0081 Hz 0 1 0.0324 Hz 1 0 2.07 Hz 1 1 16.32 Hz CTRL8_XL (17h) Linear acceleration sensor control register 8 (r/w). Table 66. CTRL8_XL register LPF2_XL_ EN HPCF_ XL1 HPCF_ XL0 0(1) 0(1) HP_SLOPE_X L_EN 0(1) LOW_PASS _ON_6D 1. This bit must be set to `0' for the correct operation of the device. Table 67. CTRL8_XL register description LPF2_XL_EN Accelerometer low-pass filter LPF2 selection. Refer to Figure 7. HPCF_XL[1:0] Accelerometer slope filter and high-pass filter configuration and cutoff setting. Refer to Table 68. It is also used to select the cutoff frequency of the LPF2 filter, as shown in Table 69. This low-pass filter can also be used in the 6D/4D functionality by setting the LOW_PASS_ON_6D bit of CTRL8_XL (17h) to 1. HP_SLOPE_XL_EN Accelerometer slope filter / high-pass filter selection. Refer to Figure 7. LOW_PASS_ON_6D Low-pass filter on 6D function selection. Refer to Figure 7. Table 68. Accelerometer slope and high-pass filter selection and cutoff frequency HPCF_XL[1:0] Applied filter HP filter cutoff frequency [Hz] 00 Slope 01 High-pass ODR_XL/100 10 High-pass ODR_XL/9 11 High-pass ODR_XL/400 ODR_XL/4 Table 69. Accelerometer LPF2 cutoff frequency HPCF_XL[1:0] LPF2 digital filter cutoff frequency [Hz] 00 ODR_XL/50 01 ODR_XL/100 10 ODR_XL/9 11 ODR_XL/400 DocID028370 Rev 5 63/108 108 Register description 9.20 LSM6DS3H CTRL9_XL (18h) Linear acceleration sensor control register 9 (r/w). Table 70. CTRL9_XL register (1) 0 (1 0 Zen_XL Yen_XL Xen_XL SOFT_EN 0(1) 0(1) 1. This bit must be set to `0' for the correct operation of the device. Table 71. CTRL9_XL register description Zen_XL Accelerometer Z-axis output enable. Default value: 1 (0: Z-axis output disabled; 1: Z-axis output enabled) Yen_XL Accelerometer Y-axis output enable. Default value: 1 (0: Y-axis output disabled; 1: Y-axis output enabled) Xen_XL Accelerometer X-axis output enable. Default value: 1 (0: X-axis output disabled; 1: X-axis output enabled) SOFT_EN Enable soft-iron correction algorithm for magnetometer(1). Default value: 0 (0: soft-iron correction algorithm disabled; 1: soft-iron correction algorithm disabled) 1. This bit is effective if the IRON_EN bit of MASTER_CONFIG (1Ah) is set to 1. 9.21 CTRL10_C (19h) Control register 10 (r/w). Table 72. CTRL10_C register 0(1) 0(1) Zen_G Yen_G Xen_G FUNC_EN PEDO_RST SIGN_ _STEP MOTION_EN 1. This bit must be set to `0' for the correct operation of the device. Table 73. CTRL10_C register description Zen_G Gyroscope yaw axis (Z) output enable. Default value: 1 (0: Z-axis output disabled; 1: Z-axis output enabled) Yen_G Gyroscope roll axis (Y) output enable. Default value: 1 (0: Y-axis output disabled; 1: Y axis output enabled) Xen_G Gyroscope pitch axis (X) output enable. Default value: 1 (0: X-axis output disabled; 1: X-axis output enabled) FUNC_EN Enable embedded functionalities (pedometer, tilt, significant motion, sensor hub and ironing) and accelerometer HP and LPF2 filters (refer to Figure 7). Default value: 0 (0: disable functionalities of embedded functions and accelerometer filters; 1: enable functionalities of embedded functions and accelerometer filters) PEDO_RST_ STEP Reset pedometer step counter. Default value: 0 (0: disabled; 1: enabled) SIGN_MOTION Enable significant motion function. Default value: 0 _EN (0: disabled; 1: enabled) 64/108 DocID028370 Rev 5 LSM6DS3H 9.22 Register description MASTER_CONFIG (1Ah) Master configuration register (r/w). Table 74. MASTER_CONFIG register DRDY_ON DATA_VALID _INT1 _SEL_FIFO 0(1) START_ CONFIG PULL_UP _EN PASS_ THROUGH _MODE IRON_EN MASTER_ ON 1. This bit must be set to `0' for the correct operation of the device. Table 75. MASTER_CONFIG register description DRDY_ON_ INT1 Manage the Master DRDY signal on INT1 pad. Default: 0 (0: disable Master DRDY on INT1; 1: enable Master DRDY on INT1) DATA_VALID_ SEL_FIFO Selection of FIFO data-valid signal. Default value: 0 (0: data-valid signal used to write data in FIFO is the XL/Gyro data-ready or step detection(1); 1: data-valid signal used to write data in FIFO is the sensor hub data-ready) START_ CONFIG Sensor hub trigger signal selection. Default value: 0 (0: Sensor hub signal is the XL/Gyro data-ready; 1: Sensor hub signal external from INT2 pad.) PULL_UP_EN Auxiliary I2C pull-up. Default value: 0 (0: internal pull-up on auxiliary I2C line disabled; 1: internal pull-up on auxiliary I2C line enabled) 2 PASS_THROUGH I C interface pass-through. Default value: 0 _MODE (0: through disabled; 1: through enabled) IRON_EN Enable hard-iron correction algorithm for magnetometer. Default value: 0 (0:hard-iron correction algorithm disabled; 1: hard-iron correction algorithm enabled) MASTER_ON Sensor hub I2C master enable. Default: 0 (0: master I2C of sensor hub disabled; 1: master I2C of sensor hub enabled) 1. If the TIMER_PEDO_FIFO_DRDY bit in FIFO_CTRL2 (07h) is set to 0, the trigger for writing data in FIFO is XL/Gyro data-ready, otherwise it's the step detection. DocID028370 Rev 5 65/108 108 Register description 9.23 LSM6DS3H WAKE_UP_SRC (1Bh) Wake up interrupt source register (r). Table 76. WAKE_UP_SRC register 0(1) 0(1) SLEEP_ STATE_IA FF_IA WU_IA X_WU Y_WU Z_WU 1. This bit must be set to `0' for the correct operation of the device. Table 77. WAKE_UP_SRC register description 9.24 FF_IA Free-fall event detection status. Default: 0 (0: free-fall event not detected; 1: free-fall event detected) SLEEP_ STATE_IA Sleep event status. Default value: 0 (0: sleep event not detected; 1: sleep event detected) WU_IA Wakeup event detection status. Default value: 0 (0: wakeup event not detected; 1: wakeup event detected.) X_WU Wakeup event detection status on X-axis. Default value: 0 (0: wakeup event on X-axis not detected; 1: wakeup event on X-axis detected) Y_WU Wakeup event detection status on Y-axis. Default value: 0 (0: wakeup event on Y-axis not detected; 1: wakeup event on Y-axis detected) Z_WU Wakeup event detection status on Z-axis. Default value: 0 (0: wakeup event on Z-axis not detected; 1: wakeup event on Z-axis detected) TAP_SRC (1Ch) Tap source register (r). Table 78. TAP_SRC register 0(1) TAP_IA SINGLE_ TAP DOUBLE_ TAP_SIGN TAP X_TAP Y_TAP 1. This bit must be set to `0' for the correct operation of the device. Table 79. TAP_SRC register description 66/108 TAP_IA Tap event detection status. Default: 0 (0: tap event not detected; 1: tap event detected) SINGLE_TAP Single-tap event status. Default value: 0 (0: single tap event not detected; 1: single tap event detected) DOUBLE_TAP Double-tap event detection status. Default value: 0 (0: double-tap event not detected; 1: double-tap event detected.) TAP_SIGN Sign of acceleration detected by tap event. Default: 0 (0: positive sign of acceleration detected by tap event; 1: negative sign of acceleration detected by tap event) X_TAP Tap event detection status on X-axis. Default value: 0 (0: tap event on X-axis not detected; 1: tap event on X-axis detected) Y_TAP Tap event detection status on Y-axis. Default value: 0 (0: tap event on Y-axis not detected; 1: tap event on Y-axis detected) Z_TAP Tap event detection status on Z-axis. Default value: 0 (0: tap event on Z-axis not detected; 1: tap event on Z-axis detected) DocID028370 Rev 5 Z_TAP LSM6DS3H 9.25 Register description D6D_SRC (1Dh) Portrait, landscape, face-up and face-down source register (r) Table 80. D6D_SRC register (1) 0 D6D_IA ZH ZL YH YL XH XL 1. This bit must be set to `0' for the correct operation of the device. Table 81. D6D_SRC register description D6D_ IA Interrupt active for change position portrait, landscape, face-up, face-down. Default value: 0 (0: change position not detected; 1: change position detected) ZH Z-axis high event (over threshold). Default value: 0 (0: event not detected; 1: event (over threshold) detected) ZL Z-axis low event (under threshold). Default value: 0 (0: event not detected; 1: event (under threshold) detected) YH Y-axis high event (over threshold). Default value: 0 (0: event not detected; 1: event (over-threshold) detected) YL Y-axis low event (under threshold). Default value: 0 (0: event not detected; 1: event (under threshold) detected) X_H X-axis high event (over threshold). Default value: 0 (0: event not detected; 1: event (over threshold) detected) X_L X-axis low event (under threshold). Default value: 0 (0: event not detected; 1: event (under threshold) detected) DocID028370 Rev 5 67/108 108 Register description 9.26 LSM6DS3H STATUS_REG/STATUS_SPIAux (1Eh) The STATUS_REG register is read by the primary interface SPI/I2C. Table 82. STATUS_REG register 0 0 0 0 0 TDA GDA XLDA GDA 0 Table 83. STATUS_REG register description TDA Temperature new data available. Default: 0 (0: no set of data is available at temperature sensor output; 1: a new set of data is available at temperature sensor output) GDA Gyroscope new data available. Default value: 0 (0: no set of data available at gyroscope output; 1: a new set of data is available at gyroscope output) XLDA Accelerometer new data available. Default value: 0 (0: no set of data available at accelerometer output; 1: a new set of data is available at accelerometer output) The STATUS_SPIAux register is read by the auxiliary SPI. Table 84. STATUS_SPIAux register 0 0 0 0 0 GYRO_ SETTING Table 85. STATUS_SPIAux description 9.27 GYRO_ SETTING High when the gyroscope output is in the setting phase GDA Gyroscope data available (reset when one of the high parts of output data is read) OUT_TEMP_L (20h), OUT_TEMP (21h) Temperature data output register (r). L and H registers together express a 16-bit word in two's complement. Table 86. OUT_TEMP_L register Temp7 Temp6 Temp5 Temp4 Temp3 Temp2 Temp1 Temp0 Temp9 Temp8 Table 87. OUT_TEMP_H register Temp15 Temp14 Temp13 Temp12 Temp11 Temp10 Table 88. OUT_TEMP register description Temp[15:0] 68/108 Temperature sensor output data The value is expressed as two's complement sign extended on the MSB. DocID028370 Rev 5 LSM6DS3H 9.28 Register description OUTX_L_G (22h) Angular rate sensor pitch axis (X) angular rate output register (r). The value is expressed as a 16-bit word in two's complement. If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G (11h)) of gyro user interface. If this register is read by the auxiliary interface, data are according to the full scale (250 dps) and ODR (3.33 kHz) settings of the OIS gyro. Table 89. OUTX_L_G register D7 D6 D5 D4 D3 D2 D1 D0 Table 90. OUTX_L_G register description Pitch axis (X) angular rate value (LSbyte) D[7:0] D[15:0] expressed in two's complement and its value depends on the interface used: SPI1/I2C: Gyro UI chain pitch axis output SPI2: Gyro OIS chain pitch axis output 9.29 OUTX_H_G (23h) Angular rate sensor pitch axis (X) angular rate output register (r). The value is expressed as a 16-bit word in two's complement. If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G (11h)) of gyro user interface. If this register is read by the auxiliary interface, data are according to the full scale (250 dps) and ODR (3.33 kHz) settings of the OIS gyro. Table 91. OUTX_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 92. OUTX_H_G register description D[15:8] Pitch axis (X) angular rate value (MSbyte) D[15:0] expressed in two's complement and its value depends on the interface used: SPI1/I2C: Gyro UI chain pitch axis output SPI2: Gyro OIS chain pitch axis output DocID028370 Rev 5 69/108 108 Register description 9.30 LSM6DS3H OUTY_L_G (24h) Angular rate sensor roll axis (Y) angular rate output register (r). The value is expressed as a 16-bit word in two's complement. If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G (11h)) of gyro user interface. If this register is read by the auxiliary interface, data are according to the full scale (250 dps) and ODR (3.33 kHz) settings of the OIS gyro. Table 93. OUTY_L_G register D7 D6 D5 D4 D3 D2 D1 D0 Table 94. OUTY_L_G register description D[7:0] 9.31 Roll axis (Y) angular rate value (LSbyte) D[15:0] expressed in two's complement and its value depends on the interface used: SPI1/I2C: Gyro UI chain roll axis output SPI2: Gyro OIS chain roll axis output OUTY_H_G (25h) Angular rate sensor roll axis (Y) angular rate output register (r). The value is expressed as a 16-bit word in two's complement. If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G (11h)) of gyro user interface. If this register is read by the auxiliary interface, data are according to the full scale (250 dps) and ODR (3.33 kHz) settings of the OIS gyro. Table 95. OUTY_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 96. OUTY_H_G register description D[15:8] 70/108 Roll axis (Y) angular rate value (MSbyte) D[15:0] expressed in two's complement and its value depends on the interface used: SPI1/I2C: Gyro UI chain roll axis output SPI2: Gyro OIS chain roll axis output DocID028370 Rev 5 LSM6DS3H 9.32 Register description OUTZ_L_G (26h) Angular rate sensor yaw axis (Z) angular rate output register (r). The value is expressed as a 16-bit word in two's complement. If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G (11h)) of gyro user interface. If this register is read by the auxiliary interface, data are according to the full scale (250 dps) and ODR (3.33 kHz) settings of the OIS gyro. Table 97. OUTZ_L_G register D7 D6 D5 D4 D3 D2 D1 D0 Table 98. OUTZ_L_G register description D[7:0] 9.33 Yaw axis (Z) angular rate value (LSbyte) D[15:0] expressed in two's complement and its value depends on the interface used: SPI1/I2C: Gyro UI chain yaw axis output SPI2: Gyro OIS chain yaw axis output OUTZ_H_G (27h) Angular rate sensor Yaw axis (Z) angular rate output register (r). The value is expressed as a 16-bit word in two's complement. If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G (11h)) of gyro user interface. If this register is read by the auxiliary interface, data are according to the full scale (250 dps) and ODR (3.33 kHz) settings of the OIS gyro. Table 99. OUTZ_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 100. OUTZ_H_G register description D[15:8] 9.34 Yaw axis (Z) angular rate value (MSbyte) D[15:0] expressed in two's complement and its value depends on the interface used: SPI1/I2C: Gyro UI chain yaw axis output SPI2: Gyro OIS chain yaw axis output OUTX_L_XL (28h) Linear acceleration sensor X-axis output register (r). The value is expressed as a 16-bit word in two's complement. Table 101. OUTX_L_XL register D7 D6 D5 D4 D3 D2 D1 D0 Table 102. OUTX_L_XL register description D[7:0] X-axis linear acceleration value (LSbyte) DocID028370 Rev 5 71/108 108 Register description 9.35 LSM6DS3H OUTX_H_XL (29h) Linear acceleration sensor X-axis output register (r). The value is expressed as a 16-bit word in two's complement. Table 103. OUTX_H_XL register D15 D14 D13 D12 D11 D10 D9 D8 Table 104. OUTX_H_XL register description D[15:8] 9.36 X-axis linear acceleration value (MSbyte) OUTY_L_XL (2Ah) Linear acceleration sensor Y-axis output register (r). The value is expressed as a 16-bit word in two's complement. Table 105. OUTY_L_XL register D7 D6 D5 D4 D3 D2 D1 D0 Table 106. OUTY_L_XL register description D[7:0] 9.37 Y-axis linear acceleration value (LSbyte) OUTY_H_XL (2Bh) Linear acceleration sensor Y-axis output register (r). The value is expressed as a 16-bit word in two's complement. Table 107. OUTY_H_G register D15 D14 D13 D12 D11 D10 D9 D8 Table 108. OUTY_H_G register description D[15:8] 9.38 Y-axis linear acceleration value (MSbyte) OUTZ_L_XL (2Ch) Linear acceleration sensor Z-axis output register (r). The value is expressed as a 16-bit word in two's complement. Table 109. OUTZ_L_XL register D7 D6 D5 D4 D3 D2 Table 110. OUTZ_L_XL register description D[7:0] 72/108 Z-axis linear acceleration value (LSbyte) DocID028370 Rev 5 D1 D0 LSM6DS3H 9.39 Register description OUTZ_H_XL (2Dh) Linear acceleration sensor Z-axis output register (r). The value is expressed as a 16-bit word in two's complement. Table 111. OUTZ_H_XL register D15 D14 D13 D12 D11 D10 D9 D8 Table 112. OUTZ_H_XL register description D[15:8] 9.40 Z-axis linear acceleration value (MSbyte) SENSORHUB1_REG (2Eh) First byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 113. SENSORHUB1_REG register SHub1_7 SHub1_6 SHub1_5 SHub1_4 SHub1_3 SHub1_2 SHub1_1 SHub1_0 Table 114. SENSORHUB1_REG register description SHub1_[7:0] 9.41 First byte associated to external sensors SENSORHUB2_REG (2Fh) Second byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operations configurations (for external sensors from x = 0 to x = 3). Table 115. SENSORHUB2_REG register SHub2_7 SHub2_6 SHub2_5 SHub2_4 SHub2_3 SHub2_2 SHub2_1 SHub2_0 Table 116. SENSORHUB2_REG register description SHub2_[7:0] Second byte associated to external sensors 9.42 SENSORHUB3_REG (30h) Third byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operations configurations (for external sensors from x = 0 to x = 3). Table 117. SENSORHUB3_REG register SHub3_7 SHub3_6 SHub3_5 SHub3_4 SHub3_3 SHub3_2 SHub3_1 SHub3_0 Table 118. SENSORHUB3_REG register description SHub3_[7:0] Third byte associated to external sensors DocID028370 Rev 5 73/108 108 Register description 9.43 LSM6DS3H SENSORHUB4_REG (31h) Fourth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 119. SENSORHUB4_REG register SHub4_7 SHub4_6 SHub4_5 SHub4_4 SHub4_3 SHub4_2 SHub4_1 SHub4_0 Table 120. SENSORHUB4_REG register description SHub4_[7:0] 9.44 Fourth byte associated to external sensors SENSORHUB5_REG (32h) Fifth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 121. SENSORHUB5_REG register SHub5_7 SHub5_6 SHub5_5 SHub5_4 SHub5_3 SHub5_2 SHub5_1 SHub5_0 Table 122. SENSORHUB5_REG register description SHub5_[7:0] 9.45 Fifth byte associated to external sensors SENSORHUB6_REG (33h) Sixth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 123. SENSORHUB6_REG register SHub6_7 SHub6_6 SHub6_5 SHub6_4 SHub6_3 SHub6_2 SHub6_1 SHub6_0 Table 124. SENSORHUB6_REG register description SHub6_[7:0] 9.46 Sixth byte associated to external sensors SENSORHUB7_REG (34h) Seventh byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 125. SENSORHUB7_REG register SHub7_7 SHub7_6 SHub7_5 SHub7_4 SHub7_3 SHub7_2 SHub7_1 Table 126. SENSORHUB7_REG register description SHub7_[7:0] 74/108 Seventh byte associated to external sensors DocID028370 Rev 5 SHub7_0 LSM6DS3H 9.47 Register description SENSORHUB8_REG(35h) Eighth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 127. SENSORHUB8_REG register SHub8_7 SHub8_6 SHub8_5 SHub8_4 SHub8_3 SHub8_2 SHub8_1 SHub8_0 Table 128. SENSORHUB8_REG register description SHub8_[7:0] Eighth byte associated to external sensors 9.48 SENSORHUB9_REG (36h) Ninth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 129. SENSORHUB9_REG register SHub9_7 SHub9_6 SHub9_5 SHub9_4 SHub9_3 SHub9_2 SHub9_1 SHub9_0 Table 130. SENSORHUB9_REG register description SHub9_[7:0] 9.49 Ninth byte associated to external sensors SENSORHUB10_REG (37h) Tenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 131. SENSORHUB10_REG register SHub10_7 SHub10_6 SHub10_5 SHub10_4 SHub10_3 SHub10_2 SHub10_1 SHub10_0 Table 132. SENSORHUB10_REG register description SHub10_[7:0] Tenth byte associated to external sensors 9.50 SENSORHUB11_REG (38h) Eleventh byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 133. SENSORHUB11_REG register SHub11_7 SHub11_6 SHub11_5 SHub11_4 SHub11_3 SHub11_2 SHub11_1 SHub11_0 Table 134. SENSORHUB11_REG register description SHub11_[7:0] Eleventh byte associated to external sensors DocID028370 Rev 5 75/108 108 Register description 9.51 LSM6DS3H SENSORHUB12_REG(39h) Twelfth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 135. SENSORHUB12_REG register SHub12_7 SHub12_6 SHub12_5 SHub12_4 SHub12_3 SHub12_2 SHub12_1 SHub12_0 Table 136. SENSORHUB12_REG register description SHub12[7:0] 9.52 Twelfth byte associated to external sensors FIFO_STATUS1 (3Ah) FIFO status control register (r). For a proper reading of the register it is suggested to set BDU bit in CTRL3_C (12h) to 0. Table 137. FIFO_STATUS1 register DIFF_ FIFO_7 DIFF_ FIFO_6 DIFF_ FIFO_5 DIFF_ FIFO_4 DIFF_ FIFO_3 DIFF_ FIFO_2 DIFF_ FIFO_1 DIFF_ FIFO_0 Table 138. FIFO_STATUS1 register description DIFF_FIFO_[7:0] Number of unread words (16-bit axes) stored in FIFO(1). 1. For a complete number of unread samples, consider DIFF_FIFO [11:8] in FIFO_STATUS2 (3Bh) 9.53 FIFO_STATUS2 (3Bh) FIFO status control register (r). For a proper reading of the register it is recommended to set the BDU bit in CTRL3_C (12h) to 0. Table 139. FIFO_STATUS2 register FTH FIFO_ OVER_RUN FIFO_ FULL FIFO_ EMPTY DIFF_ FIFO_11 DIFF_ FIFO_10 DIFF_ FIFO_9 Table 140. FIFO_STATUS2 register description FTH FIFO watermark status. Default value: 0 (0: FIFO filling is lower than watermark level(1); 1: FIFO filling is equal to or higher than the watermark level) FIFO_OVER_RUN FIFO overrun status. Default value: 0 (0: FIFO is not completely filled; 1: FIFO is completely filled) FIFO_FULL FIFO full status. Default value: 0 (0: FIFO is not full; 1: FIFO will be full at the next ODR) FIFO_EMPTY FIFO empty bit. Default value: 0 (0: FIFO contains data; 1: FIFO is empty) DIFF_FIFO_[7:0] Number of unread words (16-bit axes) stored in FIFO(2). 1. FIFO watermark level is set in FTH_[11:0] in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h) 2. For a complete number of unread samples, consider DIFF_FIFO [11:8] in FIFO_STATUS1 (3Ah) 76/108 DocID028370 Rev 5 DIFF_ FIFO_8 LSM6DS3H 9.54 Register description FIFO_STATUS3 (3Ch) FIFO status control register (r). For a proper reading of the register it is recommended to set the BDU bit in CTRL3_C (12h) to 0. Table 141. FIFO_STATUS3 register FIFO_ PATTERN _7 FIFO_ PATTERN _6 FIFO_ PATTERN _5 FIFO_ PATTERN _4 FIFO_ PATTERN _3 FIFO_ PATTERN _2 FIFO_ PATTERN _1 FIFO_ PATTERN _0 Table 142. FIFO_STATUS3 register description FIFO_ PATTERN_[7:0] 9.55 Word of recursive pattern read at the next reading. FIFO_STATUS4 (3Dh) FIFO status control register (r). For a proper reading of the register it is recommended to set the BDU bit in CTRL3_C (12h) to 0. Table 143. FIFO_STATUS4 register 0(1) 0(1) 0(1) 0(1) 0(1) 0(1) FIFO_ PATTERN_9 FIFO_ PATTERN_8 1. This bit must be set to `0' for the correct operation of the device. Table 144. FIFO_STATUS4 register description FIFO_ PATTERN_[9:8] 9.56 Word of recursive pattern read at the next reading. FIFO_DATA_OUT_L (3Eh) FIFO data output register (r). For a proper reading of the register it is recommended to set the BDU bit in CTRL3_C (12h) to 0. Table 145. FIFO_DATA_OUT_L register DATA_ OUT_ FIFO_L_7 DATA_ OUT_ FIFO_L_6 DATA_ OUT_ FIFO_L_5 DATA_ OUT_ FIFO_L_4 DATA_ OUT_ FIFO_L_3 DATA_ OUT_ FIFO_L_2 DATA_ OUT_ FIFO_L_1 DATA_ OUT_ FIFO_L_0 Table 146. FIFO_DATA_OUT_L register description DATA_OUT_FIFO_L_[7:0] FIFO data output (first byte) DocID028370 Rev 5 77/108 108 Register description 9.57 LSM6DS3H FIFO_DATA_OUT_H (3Fh) FIFO data output register (r). For a proper reading of the register it is suggested to set BDU bit in CTRL3_C (12h) to 0. Table 147. FIFO_DATA_OUT_H register DATA_ DATA_ DATA_ DATA_ DATA_ DATA_ DATA_ DATA_ OUT_ OUT_ OUT_ OUT_ OUT_ OUT_ OUT_ OUT_ FIFO_H_7 FIFO_H_6 FIFO_H_5 FIFO_H_4 FIFO_H_3 FIFO_H_2 FIFO_H_1 FIFO_H_0 Table 148. FIFO_DATA_OUT_H register description DATA_OUT_FIFO_H_[7:0] 9.58 FIFO data output (second byte) TIMESTAMP0_REG (40h) Timestamp first byte data output register (r). The value is expressed as a 24-bit word and the bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch). Table 149. TIMESTAMP0_REG register TIMESTA MP0_7 TIMESTA MP0_6 TIMESTA MP0_5 TIMESTA MP0_4 TIMESTA MP0_3 TIMESTA MP0_2 TIMESTA MP0_1 TIMESTA MP0_0 Table 150. TIMESTAMP0_REG register description TIMESTAMP0_[7:0] 9.59 TIMESTAMP first byte data output TIMESTAMP1_REG (41h) Timestamp second byte data output register (r). The value is expressed as a 24-bit word and the bit resolution is defined by setting value in WAKE_UP_DUR (5Ch). Table 151. TIMESTAMP1_REG register TIMESTA MP1_7 TIMESTA MP1_6 TIMESTA MP1_5 TIMESTA MP1_4 TIMESTA MP1_3 TIMESTA MP1_2 TIMESTA MP1_1 TIMESTA MP1_0 Table 152. TIMESTAMP1_REG register description TIMESTAMP1_[7:0] 9.60 TIMESTAMP second byte data output TIMESTAMP2_REG (42h) Timestamp third byte data output register (r/w). The value is expressed as a 24-bit word and the bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch). To reset the timer, the AAh value has to be stored in this register. Table 153. TIMESTAMP2_REG register TIMESTA MP2_7 TIMESTA MP2_6 TIMESTA MP2_5 TIMESTA MP2_4 TIMESTA MP2_3 TIMESTA MP2_2 TIMESTA MP2_1 Table 154. TIMESTAMP2_REG register description TIMESTAMP2_[7:0] TIMESTAMP third byte data output 78/108 DocID028370 Rev 5 TIMESTA MP2_0 LSM6DS3H 9.61 Register description STEP_TIMESTAMP_L (49h) Step counter timestamp information register (r). When a step is detected, the value of TIMESTAMP_REG1 register is copied in STEP_TIMESTAMP_L. Table 155. STEP_TIMESTAMP_L register STEP_ TIMESTA MP_L_7 STEP_ TIMESTA MP_L_6 STEP_ TIMESTA MP_L_5 STEP_ TIMESTA MP_L_4 STEP_ TIMESTA MP_L_3 STEP_ TIMESTA MP_L_2 STEP_ TIMESTA MP_L_1 STEP_ TIMESTA MP_L_0 Table 156. STEP_TIMESTAMP_L register description STEP_TIMESTAMP_L[7:0] 9.62 Timestamp of last step detected. STEP_TIMESTAMP_H (4Ah) Step counter timestamp information register (r). When a step is detected, the value of TIMESTAMP_REG2 register is copied in STEP_TIMESTAMP_H. Table 157. STEP_TIMESTAMP_H register STEP_ TIMESTA MP_H_7 STEP_ TIMESTA MP_H_6 STEP_ TIMESTA MP_H_5 STEP_ TIMESTA MP_H_4 STEP_ TIMESTA MP_H_3 STEP_ TIMESTA MP_H_2 STEP_ TIMESTA MP_H_1 STEP_ TIMESTA MP_H_0 Table 158. STEP_TIMESTAMP_H register description STEP_TIMESTAMP_H[7:0] 9.63 Timestamp of last step detected. STEP_COUNTER_L (4Bh) Step counter output register (r). Table 159. STEP_COUNTER_L register STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO UNTER_L UNTER_L UNTER_L UNTER_L UNTER_L UNTER_L UNTER_L UNTER_L _7 _6 _5 _4 _3 _2 _1 _0 Table 160. STEP_COUNTER_L register description STEP_COUNTER_L_[7:0] 9.64 Step counter output (LSbyte) STEP_COUNTER_H (4Ch) Step counter output register (r). Table 161. STEP_COUNTER_H register STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO STEP_CO UNTER_H UNTER_H UNTER_H UNTER_H UNTER_H UNTER_H UNTER_H UNTER_H _7 _6 _5 _4 _3 _2 _1 _0 Table 162. STEP_COUNTER_H register description STEP_COUNTER_H_[7:0] Step counter output (MSbyte) DocID028370 Rev 5 79/108 108 Register description 9.65 LSM6DS3H SENSORHUB13_REG (4Dh) Thirteenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 163. SENSORHUB13_REG register SHub13_7 SHub13_6 SHub13_5 SHub13_4 SHub13_3 SHub13_2 SHub13_1 SHub13_0 Table 164. SENSORHUB13_REG register description SHub13_[7:0] 9.66 Thirteenth byte associated to external sensors SENSORHUB14_REG (4Eh) Fourteenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 165. SENSORHUB14_REG register SHub14_7 SHub14_6 SHub14_5 SHub14_4 SHub14_3 SHub14_2 SHub14_1 SHub14_0 Table 166. SENSORHUB14_REG register description SHub14_[7:0] 9.67 Fourteenth byte associated to external sensors SENSORHUB15_REG (4Fh) Fifteenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 167. SENSORHUB15_REG register SHub15_7 SHub15_6 SHub15_5 SHub15_4 SHub15_3 SHub15_2 SHub15_1 SHub15_0 Table 168. SENSORHUB15_REG register description SHub15_[7:0] 9.68 Fifteenth byte associated to external sensors SENSORHUB16_REG (50h) Sixteenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 169. SENSORHUB16_REG register SHub16_7 SHub16_6 SHub16_5 SHub16_4 SHub16_3 SHub16_2 SHub16_1 SHub16_0 Table 170. SENSORHUB16_REG register description SHub16_[7:0] 80/108 Sixteenth byte associated to external sensors DocID028370 Rev 5 LSM6DS3H 9.69 Register description SENSORHUB17_REG (51h) Seventeenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 171. SENSORHUB17_REG register SHub17_7 SHub17_6 SHub17_5 SHub17_4 SHub17_3 SHub17_2 SHub17_1 SHub17_0 Table 172. SENSORHUB17_REG register description SHub17_[7:0] 9.70 Seventeenth byte associated to external sensors SENSORHUB18_REG (52h) Eighteenth byte associated to external sensors. The content of the register is consistent with the SLAVEx_CONFIG number of read operation configurations (for external sensors from x = 0 to x = 3). Table 173. SENSORHUB18_REG register SHub18_7 SHub18_6 SHub18_5 SHub18_4 SHub18_3 SHub18_2 SHub18_1 SHub18_0 Table 174. SENSORHUB18_REG register description SHub18_[7:0] Eighteenth byte associated to external sensors DocID028370 Rev 5 81/108 108 Register description 9.71 LSM6DS3H FUNC_SRC (53h) Significant motion, tilt, step detector, hard/soft-iron and sensor hub interrupt source register (r). Table 175. FUNC_SRC register STEP_COU NT_DELTA_ IA SIGN_ STEP_ STEP_ TILT_IA MOTION_IA DETECTED OVERFLOW 0(1) SI_END_ OP SENSOR HUB_ END_OP 1. This bit must be set to `0' for the correct operation of the device. Table 176. FUNC_SRC register description Pedometer step recognition on delta time status. Default value: 0 STEP_COUNT (0: no step recognized during delta time; 1: at least one step recognized during _DELTA_IA delta time) 82/108 SIGN_ MOTION_IA Significant motion event detection status. Default value: 0 (0: significant motion event not detected; 1: significant motion event detected) TILT_IA Tilt event detection status. Default value: 0 (0: tilt event not detected; 1: tilt event detected) STEP_ DETECTED Step detector event detection status. Default value: 0 (0: step detector event not detected; 1: step detector event detected) STEP_ OVERFLOW Step counter overflow status. Default value: 0 (0: step counter value < 216; 1: step counter value reached 216) SI_END_OP Hard/soft-iron calculation status. Default value: 0 (0: Hard/soft-iron calculation not concluded; 1: Hard/soft-iron calculation concluded) SENSORHUB _END_OP Sensor hub communication status. Default value: 0 (0: sensor hub communication not concluded; 1: sensor hub communication concluded) DocID028370 Rev 5 LSM6DS3H 9.72 Register description TAP_CFG (58h) Timestamp, pedometer, tilt, filtering, and tap recognition functions configuration register (r/w). Table 177. TAP_CFG register TIMER_ EN PEDO_EN TILT_EN SLOPE TAP_X_EN TAP_Y_EN _FDS TAP_Z_EN LIR Table 178. TAP_CFG register description 9.73 TIMER_EN Timestamp count enable, output data are collected in TIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h), TIMESTAMP2_REG (42h) register. Default: 0 (0: timestamp count disabled; 1: timestamp count enabled) PEDO_EN Pedometer algorithm enable. Default value: 0 (0: pedometer algorithm disabled; 1: pedometer algorithm enabled) TILT_EN Tilt calculation enable. Default value: 0 (0: tilt calculation disabled; 1: tilt calculation enabled.) SLOPE_FDS Enable accelerometer HP and LPF2 filters (refer to Figure 7). Default value: 0 (0: disable; 1: enable) TAP_X_EN Enable X direction in tap recognition. Default value: 0 (0: X direction disabled; 1:X direction enabled) TAP_Y_EN Enable Y direction in tap recognition. Default value: 0 (0: Y direction disabled; 1:Y direction enabled) TAP_Z_EN Enable Z direction in tap recognition. Default value: 0 (0: Z direction disabled; 1:Z direction enabled) LIR Latched Interrupt. Default value: 0 (0: interrupt request not latched; 1: interrupt request latched) TAP_THS_6D (59h) Portrait/landscape position and tap function threshold register (r/w). Table 179. TAP_THS_6D register D4D_EN SIXD_THS SIXD_THS TAP_THS 1 0 4 TAP_THS 3 TAP_THS 2 TAP_THS 1 TAP_THS 0 Table 180. TAP_THS_6D register description D4D_EN 4D orientation detection enable. Z-axis position detection is disabled. Default value: 0 (0: enabled; 1: disabled) SIXD_THS[1:0] Threshold for D6D function. Default value: 00 For details, refer to Table 181. TAP_THS[4:0] Threshold for tap recognition. Default value: 00000 DocID028370 Rev 5 83/108 108 Register description LSM6DS3H Table 181. Threshold for D4D/D6D function SIXD_THS[1:0] 9.74 Threshold value 00 80 degrees 01 70 degrees 10 60 degrees 11 50 degrees INT_DUR2 (5Ah) Tap recognition function setting register (r/w). Table 182. INT_DUR2 register DUR3 DUR2 DUR1 DUR0 QUIET1 QUIET0 SHOCK1 SHOCK0 Table 183. INT_DUR2 register description 84/108 DUR[3:0] Duration of maximum time gap for double tap recognition. Default: 0000 When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time. QUIET[1:0] Expected quiet time after a tap detection. Default value: 00 Quiet time is the time after the first detected tap in which there must not be any overthreshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time. SHOCK[1:0] Maximum duration of overthreshold event. Default value: 00 Maximum duration is the maximum time of an overthreshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time. DocID028370 Rev 5 LSM6DS3H 9.75 Register description WAKE_UP_THS (5Bh) Single and double-tap function threshold register (r/w). Table 184. WAKE_UP_THS register SINGLE_ DOUBLE INACTIVITY WK_THS5 WK_THS4 WK_THS3 WK_THS2 WK_THS1 WK_THS0 _TAP Table 185. WAKE_UP_THS register description 9.76 SINGLE_ DOUBLE_TAP Single/double-tap event enable. Default: 0 (0: only single-tap event enabled; 1: both single and double-tap events enabled) INACTIVITY Inactivity event enable. Default value: 0 (0: sleep disabled; 1: sleep enabled) WK_THS[5:0] Threshold for wakeup. Default value: 000000 WAKE_UP_DUR (5Ch) Free-fall, wakeup, timestamp and sleep mode functions duration setting register (r/w). Table 186. WAKE_UP_DUR register FF_DUR5 WAKE_ DUR1 WAKE_ DUR0 TIMER_ HR SLEEP_ DUR3 SLEEP_ DUR2 SLEEP_ DUR1 SLEEP_ DUR0 Table 187. WAKE_UP_DUR register description FF_DUR5 Free fall duration event. Default: 0 For the complete configuration of the free-fall duration, refer to FF_DUR[4:0] in FREE_FALL (5Dh) configuration. WAKE_DUR[1:0] Wake up duration event. Default: 00 1LSB = 1 ODR_time TIMER_HR Timestamp register resolution setting(1). Default value: 0 (0: 1LSB = 6.4 ms; 1: 1LSB = 25 s) SLEEP_DUR[3:0] Duration to go in sleep mode. Default value: 0000 1 LSB = 512 ODR 1. Configuration of this bit affects TIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h), TIMESTAMP2_REG (42h), STEP_TIMESTAMP_L (49h), STEP_TIMESTAMP_H (4Ah), and STEP_COUNT_DELTA (15h) registers. DocID028370 Rev 5 85/108 108 Register description 9.77 LSM6DS3H FREE_FALL (5Dh) Free-fall function duration setting register (r/w). Table 188. FREE_FALL register FF_DUR4 FF_DUR3 FF_DUR2 FF_DUR1 FF_DUR0 FF_THS2 FF_THS1 FF_THS0 Table 189. FREE_FALL register description FF_DUR[4:0] FF_THS[2:0] Free-fall duration event. Default: 0 For the complete configuration of the free fall duration, refer to FF_DUR5 in WAKE_UP_DUR (5Ch) configuration Free fall threshold setting. Default: 000 For details refer to Table 190. Table 190. Threshold for free-fall function FF_THS[2:0] 86/108 Threshold value 000 156 mg 001 219 mg 010 250 mg 011 312 mg 100 344 mg 101 406 mg 110 469 mg 111 500 mg DocID028370 Rev 5 LSM6DS3H 9.78 Register description MD1_CFG (5Eh) Functions routing on INT1 register (r/w). Table 191. MD1_CFG register INT1_ INACT_ STATE INT1_ SINGLE_ TAP INT1_WU INT1_FF INT1_ DOUBLE_ TAP INT1_6D INT1_TILT INT1_ TIMER Table 192. MD1_CFG register description INT1_INACT_ STATE Routing on INT1 of inactivity mode. Default: 0 (0: routing on INT1 of inactivity disabled; 1: routing on INT1 of inactivity enabled) Single-tap recognition routing on INT1. Default: 0 INT1_SINGLE_ (0: routing of single-tap event on INT1 disabled; TAP 1: routing of single-tap event on INT1 enabled) INT1_WU Routing of wakeup event on INT1. Default value: 0 (0: routing of wakeup event on INT1 disabled; 1: routing of wakeup event on INT1 enabled) INT1_FF Routing of free-fall event on INT1. Default value: 0 (0: routing of free-fall event on INT1 disabled; 1: routing of free-fall event on INT1 enabled) Routing of tap event on INT1. Default value: 0 INT1_DOUBLE (0: routing of double-tap event on INT1 disabled; _TAP 1: routing of double-tap event on INT1 enabled) INT1_6D Routing of 6D event on INT1. Default value: 0 (0: routing of 6D event on INT1 disabled; 1: routing of 6D event on INT1 enabled) INT1_TILT Routing of tilt event on INT1. Default value: 0 (0: routing of tilt event on INT1 disabled; 1: routing of tilt event on INT1 enabled) INT1_TIMER Routing of end counter event of timer on INT1. Default value: 0 (0: routing of end counter event of timer on INT1 disabled; 1: routing of end counter event of timer event on INT1 enabled) DocID028370 Rev 5 87/108 108 Register description 9.79 LSM6DS3H MD2_CFG (5Fh) Functions routing on INT2 register (r/w). Table 193. MD2_CFG register INT2_ INACT_ STATE INT2_ SINGLE_ TAP INT2_WU INT2_FF INT2_ DOUBLE_ TAP INT2_6D INT2_TILT INT2_ IRON Table 194. MD2_CFG register description INT2_INACT_ STATE Routing on INT2 of inactivity mode. Default: 0 (0: routing on INT2 of inactivity disabled; 1: routing on INT2 of inactivity enabled) Single-tap recognition routing on INT2. Default: 0 INT2_SINGLE_ (0: routing of single-tap event on INT2 disabled; TAP 1: routing of single-tap event on INT2 enabled) INT2_WU Routing of wakeup event on INT2. Default value: 0 (0: routing of wakeup event on INT2 disabled; 1: routing of wake-up event on INT2 enabled) INT2_FF Routing of free-fall event on INT2. Default value: 0 (0: routing of free-fall event on INT2 disabled; 1: routing of free-fall event on INT2 enabled) Routing of tap event on INT2. Default value: 0 INT2_DOUBLE (0: routing of double-tap event on INT2 disabled; _TAP 1: routing of double-tap event on INT2 enabled) 9.80 INT2_6D Routing of 6D event on INT2. Default value: 0 (0: routing of 6D event on INT2 disabled; 1: routing of 6D event on INT2 enabled) INT2_TILT Routing of tilt event on INT2. Default value: 0 (0: routing of tilt event on INT2 disabled; 1: routing of tilt event on INT2 enabled) INT2_IRON Routing of soft-iron/hard-iron algorithm end event on INT2. Default value: 0 (0: routing of soft-iron/hard-iron algorithm end event on INT2 disabled; 1: routing of soft-iron/hard-iron algorithm end event on INT2 enabled) OUT_MAG_RAW_X_L (66h) External magnetometer raw data (r). Table 195. OUT_MAG_RAW_X_L register D7 D6 D5 D4 D3 D2 D1 Table 196. OUT_MAG_RAW_X_L register description D[7:0] 88/108 X-axis external magnetometer value (LSbyte) DocID028370 Rev 5 D0 LSM6DS3H 9.81 Register description OUT_MAG_RAW_X_H (67h) External magnetometer raw data (r). Table 197. OUT_MAG_RAW_X_H register D15 D14 D13 D12 D11 D10 D9 D8 Table 198. OUT_MAG_RAW_X_H register description D[15:8] 9.82 X-axis external magnetometer value (MSbyte) OUT_MAG_RAW_Y_L (68h) External magnetometer raw data (r). Table 199. OUT_MAG_RAW_Y_L register D7 D6 D5 D4 D3 D2 D1 D0 Table 200. OUT_MAG_RAW_Y_L register description D[7:0] 9.83 Y-axis external magnetometer value (LSbyte) OUT_MAG_RAW_Y_H (69h) External magnetometer raw data (r). Table 201. OUT_MAG_RAW_Y_H register D15 D14 D13 D12 D11 D10 D9 D8 Table 202. OUT_MAG_RAW_Y_H register description D[15:8] 9.84 Y-axis external magnetometer value (MSbyte) OUT_MAG_RAW_Z_L (6Ah) External magnetometer raw data (r). Table 203. OUT_MAG_RAW_Z_L register D7 D6 D5 D4 D3 D2 D1 D0 Table 204. OUT_MAG_RAW_Z_L register description D[7:0] Z-axis external magnetometer value (LSbyte) DocID028370 Rev 5 89/108 108 Register description 9.85 LSM6DS3H OUT_MAG_RAW_Z_H (6Bh) External magnetometer raw data (r). Table 205. OUT_MAG_RAW_Z_H register D15 D14 D13 D12 D11 D10 D9 D8 Table 206. OUT_MAG_RAW_Z_H register description D[15:8] 9.86 Z-axis external magnetometer value (MSbyte) CTRL_SPIAux (70h) Table 207. CTRL_SPIAux register BLE_SPI2 0(1) SPI_READ _EN 0(1) 0(1) 0(1) 0(1) 3.3KHz_ SPI2_EN 1. This bit must be set to '0' for the correct operation of the device. Table 208. CTRL_SPIAux register description BLE_SPI2 Big/little endian selection (same as primary interface bit) SPI_READ_EN Enable Auxiliary SPI 3-wire interface. Default value: 0 (0: disable; 1: enable) Enable output @ 3.3 kHz and FS = 250 dps on output data registers (22h to 27h) 3.3KHz_SPI2_EN read by SPI2. Default value: 0 (0: disable; 1: enable) 90/108 DocID028370 Rev 5 LSM6DS3H 10 Embedded functions register mapping Embedded functions register mapping The table given below provides a list of the registers for the embedded functions available in the device and the corresponding addresses. Embedded functions registers are accessible when FUNC_CFG_EN is set to `1' in FUNC_CFG_ACCESS (01h). Note: All modifications of the content of the embedded functions registers have to be performed with the device in power-down mode. Table 209. Registers address map - embedded functions Register address Name Type Default Hex Binary SLV0_ADD r/w 02 00000010 00000000 SLV0_SUBADD r/w 03 00000011 00000000 SLAVE0_CONFIG r/w 04 00000100 00000000 SLV1_ADD r/w 05 00000101 00000000 SLV1_SUBADD r/w 06 00000110 00000000 SLAVE1_CONFIG r/w 07 00000111 00000000 SLV2_ADD r/w 08 00001000 00000000 SLV2_SUBADD r/w 09 00001001 00000000 SLAVE2_CONFIG r/w 0A 00001010 00000000 SLV3_ADD r/w 0B 00001011 00000000 SLV3_SUBADD r/w 0C 00001100 00000000 SLAVE3_CONFIG r/w 0D 00001101 00000000 DATAWRITE_SRC_ MODE_SUB_SLV0 r/w 0E 00001110 00000000 PEDO_THS_REG r/w 0F 00001111 00010000 - 10-12 SM_THS r/w 13 00010011 00000110 PEDO_DB_REG r/w 14 00010100 01101110 STEP_COUNT_DELTA r/w 15 00010101 00000000 MAG_SI_XX r/w 24 00100100 00001000 MAG_SI_XY r/w 25 00100101 00000000 MAG_SI_XZ r/w 26 00100110 00000000 MAG_SI_YX r/w 27 00100111 00000000 MAG_SI_YY r/w 28 00101000 00001000 MAG_SI_YZ r/w 29 00101001 00000000 MAG_SI_ZX r/w 2A 00101010 00000000 MAG_SI_ZY r/w 2B 00101011 00000000 RESERVED DocID028370 Rev 5 - Comment Reserved 91/108 108 Embedded functions register mapping LSM6DS3H Table 209. Registers address map - embedded functions (continued) Register address Name Type Default Hex Binary MAG_SI_ZZ r/w 2C 00101100 00001000 MAG_OFFX_L r/w 2D 00101101 00000000 MAG_OFFX_H r/w 2E 00101110 00000000 MAG_OFFY_L r/w 2F 00101111 00000000 MAG_OFFY_H r/w 30 00110000 00000000 MAG_OFFZ_L r/w 31 00110001 00000000 MAG_OFFZ_H r/w 32 00110010 00000000 Comment Registers marked as Reserved must not be changed. Writing to those registers may cause permanent damage to the device. The content of the registers that are loaded at boot should not be changed. They contain the factory calibration values. Their content is automatically restored when the device is powered up. 92/108 DocID028370 Rev 5 LSM6DS3H Embedded functions registers description 11 Embedded functions registers description Note: All modifications of the content of the embedded functions registers have to be performed with the device in power-down mode. 11.1 SLV0_ADD (02h) I2C slave address of the first external sensor (Sensor1) register (r/w). Table 210. SLV0_ADD register Slave0_ add6 Slave0_ add5 Slave0_ add4 Slave0_ add3 Slave0_ add2 Slave0_ add1 Slave0_ add0 rw_0 Table 211. SLV0_ADD register description 11.2 2C Slave0_add[6:0] I slave address of Sensor1 that can be read by sensor hub. Default value: 0000000 rw_0 Read/write operation on Sensor1. Default value: 0 (0: write operation; 1: read operation) SLV0_SUBADD (03h) Address of register on the first external sensor (Sensor1) register (r/w). Table 212. SLV0_SUBADD register Slave0_ reg7 Slave0_ reg6 Slave0_ reg5 Slave0_ reg4 Slave0_ reg3 Slave0_ reg2 Slave0_ reg1 Slave0_ reg0 Table 213. SLV0_SUBADD register description Slave0_reg[7:0] 11.3 Address of register on Sensor1 that has to be read/write according to the rw_0 bit value in SLV0_ADD (02h). Default value: 00000000 SLAVE0_CONFIG (04h) First external sensor (Sensor1) configuration and sensor hub settings register (r/w). Table 214. SLAVE0_CONFIG register Slave0_ rate1 Slave0_ rate0 Aux_sens _on1 Aux_sens _on0 Src_mode DocID028370 Rev 5 Slave0_ numop2 Slave0_ numop1 Slave0_ numop0 93/108 108 Embedded functions registers description LSM6DS3H Table 215. SLAVE0_CONFIG register description Slave0_rate[1:0] Decimation of read operation on Sensor1 starting from the sensor hub trigger. Default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) Aux_sens_on[1:0] Number of external sensors to be read by sensor hub. Default value: 00 (00: one sensor 01: two sensors 10: three sensors 11: four sensors) Src_mode Source mode conditioned read(1). Default value: 0 (0: source mode read disabled; 1: source mode read enabled) Slave0_numop[2:0] Number of read operations on Sensor1. 1. Read conditioned by the content of the register at address specified in DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh) register. If the content is non-zero the operation continues with the reading of the address specified in the SLV0_SUBADD (03h) register, else the operation is interrupted. 11.4 SLV1_ADD (05h) I2C slave address of the second external sensor (Sensor2) register (r/w). Table 216. SLV1_ADD register Slave1_ add6 Slave1_ add5 Slave1_ add4 Slave1_ add3 Slave1_ add2 Slave1_ add1 Slave1_ add0 r_1 Table 217. SLV1_ADD register description 11.5 2C Slave1_add[6:0] I slave address of Sensor2 that can be read by sensor hub. Default value: 0000000 r_1 Read operation on Sensor2 enable. Default value: 0 (0: read operation disabled; 1: read operation enabled) SLV1_SUBADD (06h) Address of register on the second external sensor (Sensor2) register (r/w). Table 218. SLV1_SUBADD register Slave1_ reg7 Slave1_ reg6 Slave1_ reg5 Slave1_ reg4 Slave1_ reg3 Slave1_ reg2 Slave1_ reg1 Slave1_ reg0 Table 219. SLV1_SUBADD register description Slave1_reg[7:0] 94/108 Address of register on Sensor2 that has to be read according to the r_1 bit value in SLV1_ADD (05h). Default value: 00000000 DocID028370 Rev 5 LSM6DS3H 11.6 Embedded functions registers description SLAVE1_CONFIG (07h) Second external sensor (Sensor2) configuration register (r/w). Table 220. SLAVE1_CONFIG register Slave1_ rate1 Slave1_ rate0 0(1) 0(1) 0(1) Slave1_ numop2 Slave1_ numop1 Slave1_ numop0 1. This bit must be set to `0' for the correct operation of the device. Table 221. SLAVE1_CONFIG register description 11.7 Slave1_rate[1:0] Decimation of read operation on Sensor2 starting from the sensor hub trigger. Default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) Slave1_numop[2:0] Number of read operations on Sensor2. SLV2_ADD (08h) I2C slave address of the third external sensor (Sensor3) register (r/w). Table 222. SLV2_ADD register Slave2_ add6 Slave2_ add5 Slave2_ add4 Slave2_ add3 Slave2_ add2 Slave2_ add1 Slave2_ add0 r_2 Table 223. SLV2_ADD register description 11.8 2C Slave2_add[6:0] I slave address of Sensor3 that can be read by sensor hub. Default value: 0000000 r_2 Read operation on Sensor3 enable. Default value: 0 (0: read operation disabled; 1: read operation enabled) SLV2_SUBADD (09h) Address of register on the third external sensor (Sensor3) register (r/w). Table 224. SLV2_SUBADD register Slave2_ reg7 Slave2_ reg6 Slave2_ reg5 Slave2_ reg4 Slave2_ reg3 Slave2_ reg2 Slave2_ reg1 Slave2_ reg0 Table 225. SLV2_SUBADD register description Slave2_reg[7:0] Address of register on Sensor3 that has to be read according to the r_2 bit value in SLV2_ADD (08h). Default value: 00000000 DocID028370 Rev 5 95/108 108 Embedded functions registers description 11.9 LSM6DS3H SLAVE2_CONFIG (0Ah) Third external sensor (Sensor3) configuration register (r/w). Table 226. SLAVE2_CONFIG register Slave2_ rate1 Slave2_ rate0 0(1) 0(1) 0(1) Slave2_ numop2 Slave2_ numop1 Slave2_ numop0 1. This bit must be set to `0' for the correct operation of the device. Table 227. SLAVE2_CONFIG register description Decimation of read operation on Sensor3 starting from the sensor hub trigger. Default value: 00 (00: no decimation Slave2_rate[1:0] 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) Slave2_numop[2:0] 11.10 Number of read operations on Sensor3. SLV3_ADD (0Bh) I2C slave address of the fourth external sensor (Sensor4) register (r/w). Table 228. SLV3_ADD register Slave3_ add6 Slave3_ add5 Slave3_ add4 Slave3_ add3 Slave3_ add2 Slave3_ add1 Slave3_ add0 r_3 Table 229. SLV3_ADD register description 11.11 2C Slave3_add[6:0] I slave address of Sensor4 that can be read by the sensor hub. Default value: 0000000 r_3 Read operation on Sensor4 enable. Default value: 0 (0: read operation disabled; 1: read operation enabled) SLV3_SUBADD (0Ch) Address of register on the fourth external sensor (Sensor4) register (r/w). Table 230. SLV3_SUBADD register Slave3_ reg7 Slave3_ reg6 Slave3_ reg5 Slave3_ reg4 Slave3_ reg3 Slave3_ reg2 Slave3_ reg1 Slave3_ reg0 Table 231. SLV3_SUBADD register description Slave3_reg[7:0] 96/108 Address of register on Sensor4 that has to be read according to the r_3 bit value in SLV3_ADD (0Bh). Default value: 00000000 DocID028370 Rev 5 LSM6DS3H 11.12 Embedded functions registers description SLAVE3_CONFIG (0Dh) Fourth external sensor (Sensor4) configuration register (r/w). Table 232. SLAVE3_CONFIG register Slave3_ rate1 Slave3_ rate0 0(1) 0(1) 0(1) Slave3_ numop2 Slave3_ numop1 Slave3_ numop0 1. This bit must be set to `0' for the correct operation of the device. Table 233. SLAVE3_CONFIG register description 11.13 Slave3_rate[1:0] Decimation of read operation on Sensor4 starting from the sensor hub trigger. Default value: 00 (00: no decimation 01: update every 2 samples 10: update every 4 samples 11: update every 8 samples) Slave3_numop[2:0] Number of read operations on Sensor4. DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh) Data to be written into the slave device register (r/w). Table 234. DATAWRITE_SRC_MODE_SUB_SLV0 register Slave_ dataw7 Slave_ dataw6 Slave_ dataw5 Slave_ dataw4 Slave_ dataw3 Slave_ dataw2 Slave_ dataw1 Slave_ dataw0 Table 235. DATAWRITE_SRC_MODE_SUB_SLV0 register description Data to be written into the slave device according to the rw_0 bit in SLV0_ADD Slave_dataw[7:0] (02h) register or address to be read in source mode. Default value: 00000000 DocID028370 Rev 5 97/108 108 Embedded functions registers description 11.14 LSM6DS3H PEDO_THS_REG (0Fh) Pedometer minimum threshold and internal full-scale configuration register (r/w). Table 236. PEDO_THS_REG register PEDO_4G - - THS_MIN4 THS_MIN3 THS_MIN2 THS_MIN1 THS_MIN0 Table 237. PEDO_THS_REG register description 11.15 PEDO_4G This bit sets the internal full scale used in pedometer functions. Using this bit, saturation is avoided (e.g. FAST walk). 0: internal full scale = 2 g. 1: internal full scale 4 g (device full_scale @CTRL1_XL must be 4 g, otherwise internal full scale is 2 g) THS_MIN[4:0] Configurable minimum threshold. 1LSB = 16 mg @ PEDO_4G = 0, 1LSB = 32 mg @ PEDO_4G = 1 SM_THS (13h) Significant motion configuration register (r/w). Table 238. SM_THS register SM_THS_ SM_THS_ SM_THS_ SM_THS_ SM_THS_ SM_THS_ SM_THS_ SM_THS_ 7 6 5 4 3 2 1 0 Table 239. SM_THS register description SM_THS[7:0] 11.16 Significant motion threshold. Default value: 00000110 PEDO_DEB_REG (14h) Pedometer debounce configuration register (r/w). Table 240. PEDO_DEB_REG register DEB_ TIME4 DEB_ TIME3 DEB_ TIME2 DEB_ TIME1 DEB_ TIME0 DEB_ STEP2 DEB_ STEP1 DEB_ STEP0 Table 241. PEDO_DEB_REG register description 98/108 DEB_TIME[4:0] Debounce time. If the time between two consecutive steps is greater than DEB_TIME*80ms, the debouncer is reactivated. Default value: 01101 DEB_STEP[2:0] Debounce threshold. Minimum number of steps to increment the step counter (debounce). Default value: 110 DocID028370 Rev 5 LSM6DS3H 11.17 Embedded functions registers description STEP_COUNT_DELTA (15h) Time period register for step detection on delta time (r/w). Table 242. STEP_COUNT_DELTA register SC_ DELTA_7 SC_ DELTA_6 SC_ DELTA_5 SC_ DELTA_4 SC_ DELTA_3 SC_ DELTA_2 SC_ DELTA_1 SC_ DELTA_0 Table 243. STEP_COUNT_DELTA register description SC_DELTA[7:0] Time period value(1) (1LSB = 1.6384 s) 1. This value is effective if the TIMER_EN bit of the TAP_CFG (58h) register is set to 1 and the TIMER_HR bit of the WAKE_UP_DUR (5Ch) register is set to 0. 11.18 MAG_SI_XX (24h) Soft-iron matrix correction register (r/w). Table 244. MAG_SI_XX register MAG_SI_ XX_7 MAG_SI_ XX_6 MAG_SI_ XX_5 MAG_SI_ XX_4 MAG_SI_ XX_3 MAG_SI_ XX_2 MAG_SI_ XX_1 MAG_SI_ XX_0 Table 245. MAG_SI_XX register description MAG_SI_XX_[7:0] Soft-iron correction row1 col1 coefficient(1). Default value: 00001000 1. Value is expressed in sign-module format. 11.19 MAG_SI_XY (25h) Soft-iron matrix correction register (r/w). Table 246. MAG_SI_XY register MAG_SI_ XY_7 MAG_SI_ XY_6 MAG_SI_ XY_5 MAG_SI_ XY_4 MAG_SI_ XY_3 MAG_SI_ XY_2 MAG_SI_ XY_1 MAG_SI_ XY_0 Table 247. MAG_SI_XY register description MAG_SI_XY_[7:0] Soft-iron correction row1 col2 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 11.20 MAG_SI_XZ (26h) Soft-iron matrix correction register (r/w). Table 248. MAG_SI_XZ register MAG_SI_ XZ_7 MAG_SI_ XZ_6 MAG_SI_ XZ_5 MAG_SI_ XZ_4 MAG_SI_ XZ_3 MAG_SI_ XZ_2 MAG_SI_ XZ_1 MAG_SI_ XZ_0 Table 249. MAG_SI_XZ register description MAG_SI_XZ_[7:0] Soft-iron correction row1 col3 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. DocID028370 Rev 5 99/108 108 Embedded functions registers description 11.21 LSM6DS3H MAG_SI_YX (27h) Soft-iron matrix correction register (r/w). Table 250. MAG_SI_YX register MAG_SI_ YX_7 MAG_SI_ YX_6 MAG_SI_ YX_5 MAG_SI_ YX_4 MAG_SI_ YX_3 MAG_SI_ YX_2 MAG_SI_ YX_1 MAG_SI_ YX_0 Table 251. MAG_SI_YX register description MAG_SI_YX_[7:0] Soft-iron correction row2 col1 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 11.22 MAG_SI_YY (28h) Soft-iron matrix correction register (r/w). Table 252. MAG_SI_YY register MAG_SI_ YY_7 MAG_SI_ YY_6 MAG_SI_ YY_5 MAG_SI_ YY_4 MAG_SI_ YY_3 MAG_SI_ YY_2 MAG_SI_ YY_1 MAG_SI_ YY_0 Table 253. MAG_SI_YY register description MAG_SI_YY_[7:0] Soft-iron correction row2 col2 coefficient(1). Default value: 00001000 1. Value is expressed in sign-module format. 11.23 MAG_SI_YZ (29h) Soft-iron matrix correction register (r/w). Table 254. MAG_SI_YZ register MAG_SI_ YZ_7 MAG_SI_ YZ_6 MAG_SI_ YZ_5 MAG_SI_ YZ_4 MAG_SI_ YZ_3 MAG_SI_ YZ_2 MAG_SI_ YZ_1 MAG_SI_ YZ_0 Table 255. MAG_SI_YZ register description MAG_SI_YZ_[7:0] Soft-iron correction row2 col3 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 11.24 MAG_SI_ZX (2Ah) Soft-iron matrix correction register (r/w). Table 256. MAG_SI_ZX register MAG_SI_ ZX_7 MAG_SI_ ZX_6 MAG_SI_ ZX_5 MAG_SI_ ZX_4 MAG_SI_ ZX_3 MAG_SI_ ZX_2 MAG_SI_ ZX_1 MAG_SI_ ZX_0 Table 257. MAG_SI_ZX register description MAG_SI_ZX_[7:0] Soft-iron correction row3 col1 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 100/108 DocID028370 Rev 5 LSM6DS3H 11.25 Embedded functions registers description MAG_SI_ZY (2Bh) Soft-iron matrix correction register (r/w). Table 258. MAG_SI_ZY register MAG_SI_ ZY_7 MAG_SI_ ZY_6 MAG_SI_ ZY_5 MAG_SI_ ZY_4 MAG_SI_ ZY_3 MAG_SI_ ZY_2 MAG_SI_ ZY_1 MAG_SI_ ZY_0 Table 259. MAG_SI_ZY register description MAG_SI_ZY_[7:0] Soft-iron correction row3 col2 coefficient(1). Default value: 00000000 1. Value is expressed in sign-module format. 11.26 MAG_SI_ZZ (2Ch) Soft-iron matrix correction register (r/w). Table 260. MAG_SI_ZZ register MAG_SI_ ZZ_7 MAG_SI_ ZZ_6 MAG_SI_ ZZ_5 MAG_SI_ ZZ_4 MAG_SI_ ZZ_3 MAG_SI_ ZZ_2 MAG_SI_ ZZ_1 MAG_SI_ ZZ_0 Table 261. MAG_SI_ZZ register description MAG_SI_ZZ_[7:0] Soft-iron correction row3 col3 coefficient(1). Default value: 00001000 1. Value is expressed in sign-module format. 11.27 MAG_OFFX_L (2Dh) Offset for X-axis hard-iron compensation register (r/w). The value is expressed as a 16-bit word in two's complement. Table 262. MAG_OFFX_L register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF X_L_7 X_L_6 X_L_5 X_L_4 X_L_3 X_L_2 X_L_1 X_L_0 Table 263. MAG_OFFX_L register description MAG_OFFX_L_[7:0] 11.28 Offset for X-axis hard-iron compensation. Default value: 00000000 MAG_OFFX_H (2Eh) Offset for X-axis hard-iron compensation register (r/w).The value is expressed as a 16-bit word in two's complement. Table 264. MAG_OFFX_H register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF X_H_7 X_H_6 X_H_5 X_H_4 X_H_3 X_H_2 X_H_1 X_H_0 Table 265. MAG_OFFX_L register description MAG_OFFX_H_[7:0] Offset for X-axis hard-iron compensation. Default value: 00000000 DocID028370 Rev 5 101/108 108 Embedded functions registers description 11.29 LSM6DS3H MAG_OFFY_L (2Fh) Offset for Y-axis hard-iron compensation register (r/w). The value is expressed as a 16-bit word in two's complement. Table 266. MAG_OFFY_L register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF Y_L_7 Y_L_6 Y_L_5 Y_L_4 Y_L_3 Y_L_2 Y_L_1 Y_L_0 Table 267. MAG_OFFY_L register description MAG_OFFY_L_[7:0] 11.30 Offset for Y-axis hard-iron compensation. Default value: 00000000 MAG_OFFY_H (30h) Offset for Y-axis hard-iron compensation register (r/w). The value is expressed as a 16-bit word in two's complement. Table 268. MAG_OFFY_H register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF Y_H_7 Y_H_6 Y_H_5 Y_H_4 Y_H_3 Y_H_2 Y_H_1 Y_H_0 Table 269. MAG_OFFY_L register description MAG_OFFY_H_[7:0] 11.31 Offset for Y-axis hard-iron compensation. Default value: 00000000 MAG_OFFZ_L (31h) Offset for Z-axis hard-iron compensation register (r/w). The value is expressed as a 16-bit word in two's complement. Table 270. MAG_OFFZ_L register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF Z_L_7 Z_L_6 Z_L_5 Z_L_4 Z_L_3 Z_L_2 Z_L_1 Z_L_0 Table 271. MAG_OFFZ_L register description MAG_OFFZ_L_[7:0] Offset for Z-axis hard-iron compensation. Default value: 00000000 11.32 MAG_OFFZ_H (32h) Offset for Z-axis hard-iron compensation register (r/w). The value is expressed as a 16-bit word in two's complement. Table 272. MAG_OFFZ_H register MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF MAG_OFF Z_H_7 Z_H_6 Z_H_5 Z_H_4 Z_H_3 Z_H_2 Z_H_1 Z_H_0 Table 273. MAG_OFFX_L register description MAG_OFFZ_H_[7:0] 102/108 Offset for Z-axis hard-iron compensation. Default value: 00000000 DocID028370 Rev 5 LSM6DS3H 12 Soldering information Soldering information The LGA package is compliant with the ECOPACK(R), RoHS and "Green" standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020. Land pattern and soldering recommendations are available at www.st.com/mems. DocID028370 Rev 5 103/108 108 Package information 13 LSM6DS3H Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 13.1 LGA-14 package information Figure 18. LGA-14 2.5x3x0.86 14L package outline and mechanical data 'LPHQVLRQVDUHLQPLOOLPHWHUXQOHVVRWKHUZLVHVSHFLILHG *HQHUDOWROHUDQFHLVPPXQOHVVRWKHUZLVHVSHFLILHG 287(5',0(16,216 ,7(0 /HQJWK>/@ : LGWK>: @ +HLJKW>+@ ',0(16,21>PP@ 72/(5$1&(>PP@ 0$; B 104/108 DocID028370 Rev 5 LSM6DS3H 13.2 Package information LGA-14 packing information Figure 19. Carrier tape information for LGA-14 package Figure 20. LGA-14 package orientation in carrier tape DocID028370 Rev 5 105/108 108 Package information LSM6DS3H Figure 21. Reel information for carrier tape of LGA-14 package 7 PPPLQ $FFHVVKROHDW VORWORFDWLRQ % & $ 1 ' )XOOUDGLXV *PHDVXUHGDWKXE 7DSHVORW LQFRUHIRU WDSHVWDUW PPPLQZLGWK Table 274. Reel dimensions for carrier tape of LGA-14 package Reel dimensions (mm) 106/108 A (max) 330 B (min) 1.5 C 13 0.25 D (min) 20.2 N (min) 60 G 12.4 +2/-0 T (max) 18.4 DocID028370 Rev 5 LSM6DS3H 14 Revision history Revision history Table 275. Document revision history Date Revision 14-Sep-2015 1 Initial release 15-Sep-2015 2 Updated Features 3 Updated Figure 7: Accelerometer composite filter Updated description of HPCF_XL bits in Table 67: CTRL8_XL register description Added Table 69: Accelerometer LPF2 cutoff frequency Added PEDO_THS_REG (0Fh) and PEDO_DEB_REG (14h) Added Section 13.2: LGA-14 packing information 03-Feb-2016 4 Document status promoted to "production data" Updated Table 3: Mechanical characteristics Updated Table 4: Electrical characteristics Updated Table 8: Absolute maximum ratings Updated Register description 29-Sep-2017 5 Specified SPI mode 3 in Section 4.4.1: SPI - serial peripheral interface and throughout Section 6: Digital interfaces Updated ORIENT_CFG_G (0Bh) and CTRL_SPIAux (70h) 14-Oct-2015 Changes DocID028370 Rev 5 107/108 108 LSM6DS3H IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2017 STMicroelectronics - All rights reserved 108/108 DocID028370 Rev 5