DATA SH EET
Product specification
Supersedes data of 1995 Apr 25
File under Discrete Semiconductors, SC07
1997 Sep 05
DISCRETE SEMICONDUCTORS
BF998WR
N-channel dual-gate MOS-FET
1997 Sep 05 2
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
FEATURES
High forward transfer admittance
Short channel transistor with high forward transfer
admittance to input capacitance ratio
Low noise gain controlled amplifier up to 1 GHz.
APPLICATIONS
VHF and UHF applications with 12 V supply voltage,
such as television tuners and professional
communications equipment.
DESCRIPTION
Depletion type field-effect transistor in a plastic
microminiature SOT343R package with source and
substrate interconnected. The transistor is protected
against excessive input voltage surges by integrated
back-to-back diodes between gates and source.
CAUTION
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
PINNING
PIN SYMBOL DESCRIPTION
1 s, b source
2 d drain
3g
2
gate 2
4g
1
gate 1
Fig.1 Simplified outline (SOT343R) and symbol.
Marking code: MB.
MAM198
Top view
21
34
s,b
d
g1
g2
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VDS drain-source voltage −−12 V
IDdrain current −−30 mA
Ptot total power dissipation −−300 mW
Tjoperating junction temperature −−150 °C
yfsforward transfer admittance 24 mS
Cig1-s input capacitance at gate 1 2.1 pF
Crs reverse transfer capacitance f=1MHz 25 fF
F noise figure f = 800 MHz 1dB
1997 Sep 05 3
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. Device mounted on a printed-circuit board.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS drain-source voltage 12 V
IDdrain current 30 mA
IG1 gate 1 current −±10 mA
IG2 gate 2 current −±10 mA
Ptot total power dissipation up to Tamb =45°C; see Fig.2; note 1 300 mW
Tstg storage temperature 65 +150 °C
Tjoperating junction temperature +150 °C
Fig.2 Power derating curve.
handbook, halfpage
0 50 100 200
0
MLD154
150
400
200
300
100
Ptot
(mW)
T ( C)
amb o
1997 Sep 05 4
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
THERMAL CHARACTERISTICS
Notes
1. Device mounted on a printed-circuit board.
2. Ts is the temperature at the soldering point of the source lead.
STATIC CHARACTERISTICS
Tj=25°C; unless otherwise specified.
DYNAMIC CHARACTERISTICS
Common source; Tamb =25°C; VG2-S = 4 V; ID= 10 mA; VDS = 8 V; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth j-a thermal resistance from junction to ambient note 1 350 K/W
Rth j-s thermal resistance from junction to soldering point note 2; Ts=90°C 200 K/W
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V(BR)G1-SS gate 1-source breakdown voltage VG2-S =V
DS = 0; IG1-S = 10 mA 6 20 V
V(BR)G2-SS gate 2-source breakdown voltage VG1-S =V
DS = 0; IG2-S = 10 mA 6 20 V
V(P)G1-S gate 1-source cut-off voltage VG2-S =4V; V
DS =8V; I
D=20µA−−2.5 V
V(P)G2-S gate 2-source cut-off voltage VG1-S = 0; VDS =8V; I
D=20µA−−2V
I
DSS drain-source current VG2-S =4V; V
DS =8V; V
G1-S =0 2 18 mA
I
G1-SS gate 1 cut-off current VG2-S =V
DS = 0; VG1-S =5V 50 nA
IG2-SS gate 2 cut-off current VG1-S =V
DS = 0; VG2-S =5V 50 nA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
yfsforward transfer admittance pulsed; Tj=25°C2225mS
Cig1-s input capacitance at gate 1 f = 1 MHz 2.1 2.5 pF
Cig2-s input capacitance at gate 2 f = 1 MHz 1.2 pF
Cos drain-source capacitance f = 1 MHz 1.05 pF
Crs reverse transfer capacitance f = 1 MHz 25 fF
F noise figure f = 200 MHz; GS= 2 mS; BS=B
Sopt 0.6 dB
f = 800 MHz; GS= 3.3 mS; BS=B
Sopt 1dB
1997 Sep 05 5
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
Fig.3 Transfer characteristics; typical values.
VDS =8V.
T
amb =25°C.
0
24
16
8
011
MGC471
ID
(mA)
V (V)
G1 S
V = 4 V 3 V
2 V
1 V
0 V
G2 S
Fig.4 Output characteristics; typical values.
VG2-S =4V.
T
amb =25°C.
0
24
16
8
0210
MGC470
468
I
D
(mA)
V (V)
DS
0.4 V
0.3 V
0.2 V
0.1 V
0.1 V
0 V
V =
G1 S
0.2 V
0.3 V
0.4 V
0.5 V
VDS = 8 V; VG2 = 4 V; Tamb =25°C.
Fig.5 Drain current as a function of gate 1 voltage;
typical values.
1600 400
24
0
8
16
MGC472
1200 800 400 0
max typ
min
ID
(mS)
V (mV)
G1
Fig.6 Forward transfer admittance as a function
of drain current; typical values.
VDS = 8 V; Tamb =25°C.
020
30
0
6
MGC473
12
18
24
4 8 12 16
yfs
(mS)
I (mA)
D
V = 0 V
G2 S0.5 V
4 V
3 V
2 V
1 V
1997 Sep 05 6
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
Fig.7 Forward transfer admittance as a function
of gate 1 voltage; typical values.
VDS = 8 V; Tamb =25°C.
11
30
0
6
MGC474
12
18
24
0V (V)
G1-S
yfs
(mS)
3 V
2 V
1 V
0 V
V = 4 V
G2 S
Fig.8 Output capacitance as a function of
drain-source voltage; typical values.
VG2-S = 4 V; f = 1 MHz; Tamb =25°C.
414
1.5
1.0
1.1
MGC475
1.2
1.3
1.4
6 8 10 12VDS(V)
Cos
(pF)
12 mA
10 mA
8 mA
ID =
Fig.9 Gate 1 input capacitance as a function of
gate 1-source voltage; typical values.
VDS = 8 V; VG2-S = 4 V; f = 1 MHz; Tamb =25°C.
2.4 1.6 0.8 0.8
2.4
1.4
2.2
MGC476
0
2.0
1.8
1.6
Cis
(pF)
V (mV)
G1-S
Fig.10 Gate 1 input capacitance as a function of
gate 2-source voltage; typical values.
VDS = 8 V; VG1-S = 0 V; f = 1 MHz; Tamb =25°C.
642 2
2.4
2.3
2.1
2.0
2.2
MGC477
0
Cis
(pF)
V (V)
G2-S
1997 Sep 05 7
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
Fig.11 Input admittance as a function of the
frequency; typical values.
VDS = 8 V; VG2-S =4V.
I
D= 10 mA; Tamb =25°C.
103
MGC466
102
10
10 2
1
10
10 1
yis
(mS)
f (MHz)
bis
gis
VDS = 8 V; VG2-S =4V.
I
D= 10 mA; Tamb =25°C.
Fig.12 Reverse transfer admittance and phase as
a function of frequency; typical values.
103
MGC467
102
10
103
102
10
1
yrs
103
10
10
1
2
(µS)
f (MHz)
rs
yrs
(deg)
rs
ϕ
ϕ
Fig.13 Forward transfer admittance and phase as
a function of frequency; typical values.
VDS = 8 V; VG2-S =4V.
I
D= 10 mA; Tamb =25°C.
103
MGC468
102
10
1
102
10
1
10
10
2
yfs
(mS) yfs
f (MHz)
(deg)
fs
fs
ϕ
ϕ
Fig.14 Output admittance as a function of the
frequency; typical values.
VDS = 8 V; VG2-S =4V.
I
D= 10 mA; Tamb =25°C.
103
MGC469
102
10
10 1
10
1
10 2
yos
(mS)
f (MHz)
bos
gos
1997 Sep 05 8
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
Fig.15 Gain control testcircuit at f = 200 MHz.
VDD = 12 V; GS= 2 mS; GL= 0.5 mS.
L1 = 45 nH; 4 turns 0.8 mm copper wire, internal diameter 4 mm.
L2 = 160 nH; 3 turns 0.8 mm copper wire, internal diameter 8 mm.
Tapped at approximately half a turn from the cold side, to adjust GL= 0.5 mS. C1 adjusted for GS= 2 mS.
VAGC
1 nF1 nF
50
input
50
input
1 nF
1 nF
L1
L2
20 µH
47 µF
1 nF 1 nF
1 nF
1 nF
47
k
1.8
k
360
140 k
1 nF
VDD
VDD
15 pF 10 pF
100
k
330
k
Vtun
D1
BB405
C1
5.5 pF
330
k
D2
BB405
input Vtun
output
MGC481
1997 Sep 05 9
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
VDD = 12 V; GS= 3.3 mS; GL= 1 mS.
L1 = L4 = 200 nH; 11 turns 0.5 mm copper wire, without spacing, internal diameter 3 mm.
L2 = 2 cm, silvered 0.8 mm copper wire, 4 mm above ground plane.
L3 = 2 cm, silvered 0.5 mm copper wire, 4 mm above ground plane.
Fig.16 Gain control test circuit at f = 800 MHz.
VAGC
1 nF
1 nF
1 nF
50
input
50
input
1 nF
270
k
360
1.8
k
140
k
100 k
VDD
VDD
1 nF
MGC480
VDD
1 nF
1 nF
L1
L2
C1
2-18 pF C2
0.5-3.5 pF
C3
0.5-3.5 pF
,,
,,
L3
L4
C4
4-40 pF
,,
Fig.17 Automatic gain control characteristics
measured in circuit of Fig.15.
VDD = 12 V; f = 200 MHz; Tamb =25°C.
010
0
50
40
MGC479
30
20
10
2468
I
DSS=
max
typ
min
Gtr
(dB)
VAGC(V)
VDD = 12 V; f = 800 MHz; Tamb =25°C.
Fig.18 Automatic gain control characteristics
measured in circuit of Fig.16.
010
0
50
40
MGC478
30
20
10
2468
I
DSS=
max
typ
min
Gtr
(dB)
VAGC(V)
1997 Sep 05 10
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
PACKAGE OUTLINE
Fig.19 SOT343R.
Dimensions in mm.
handbook, full pagewidth
0.3
0.1
0.25
0.10
0.2
0.1
max
1.00
max
MSB367
1.4
1.2
2.2
1.8 B
A
1.35
1.15
0.4
0.2
B
M
0.2
A
M
0.2
2.2
2.0
0.7
0.5
34
21
1997 Sep 05 11
Philips Semiconductors Product specification
N-channel dual-gate MOS-FET BF998WR
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data Sheet Status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
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© Philips Electronics N.V. 1997 SCA55
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Printed in The Netherlands 117067/00/02/pp12 Date of release: 1997 Sep 05 Document order number: 9397 750 02671