1
LTC1451
LTC1452/LTC1453
sn145123 145123fas
12-Bit Rail-to-Rail
Micropower DACs in SO-8
Daisy-Chained Control Outputs
D
IN
CLK
CS/LD
D
OUT
D
IN
CLK
CS/LD
D
OUT
µP
0.1µF
CONTROL
OUTPUT 1
CONTROL
OUTPUT 2
V
CC
V
CC
V
OUT
V
OUT
GND
GND
LTC1451
LTC1451
V
REF
V
REF
TO NEXT DAC
0.1µF
5V
1451/2/3 TA01
Differential Nonlinearity
vs Input Code
CODE
0
DNL ERROR (LSB)
0.5
0.0
–0.5 1024 2048 2560
1451/2/3 TA02
512 1536 3072 3584 4095
■
Digital Calibration
■
Industrial Process Control
■
Automatic Test Equipment
■
Cellular Telephones
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
12-Bit Resolution
■
Buffered True Rail-to-Rail Voltage Output
■
3V Operation (LTC1453), I
CC
: 250µA Typ
■
5V Operation (LTC1451), I
CC
: 400µA Typ
■
3V to 5V Operation (LTC1452), I
CC
: 225µA Typ
■
Built-In Reference: 2.048V (LTC1451)
1.220V (LTC1453)
■
Multiplying Version (LTC1452)
■
Power-On Reset
■
SO-8 Package
■
3-Wire Cascadable Serial Interface
■
Maximum DNL Error: 0.5LSB
■
Schmitt Trigger on Clock Input Allows Direct
Optocoupler Interface
The LTC
®
1451/LTC1452/LTC1453 are complete single
supply, rail-to-rail voltage output 12-bit digital-to-analog
converters (DACs) in an SO-8 package. They include an
output buffer amplifier and an easy-to-use 3-wire
cascadable serial interface.
The LTC1451 has an onboard reference of 2.048V and a
full-scale output of 4.095V. It operates from a single 4.5V
to 5.5V supply.
The LTC1452 is a multiplying DAC with a full-scale output
of twice the reference input voltage. It operates from a
single supply of 2.7V to 5.5V.
The LTC1453 has an onboard 1.22V reference and a full-
scale output of 2.5V. It operates from a single supply of
2.7V to 5.5V.
The low power supply current makes the LTC1451 family
ideal for battery-powered applications. The space saving
8-pin SO package and operation with no external compo-
nents provide the smallest 12-bit DAC system available.
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
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2
LTC1451
LTC1452/LTC1453
sn145123 145123fas
ELECTRICAL CHARACTERISTICS
ORDER PART NUMBER S8 PART MARKING
LTC1451CS8
LTC1452CS8
LTC1453CS8
LTC1451IS8
LTC1452IS8
LTC1453IS8
1451
1452
1453
1451I
1452I
1453I
LTC1451CN8
LTC1452CN8
LTC1453CN8
LTC1451IN8
LTC1452IN8
LTC1453IN8
Consult factory for Military grade parts.
V
CC
to GND .............................................. –0.5V to 7.5V
TTL Input Voltage .................................... –0.5V to 7.5V
V
OUT
, D
OUT
.................................... –0.5V to V
CC
+ 0.5V
REF ................................................ –0.5V to V
CC
+ 0.5V
Maximum Junction Temperature ......... –65°C to 125°C
Operating Temperature Range
Commercial ........................................... 0°C to 70°C
Industrial ......................................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1451), 2.7V to 5.5V (LTC1452/LTC1453),
internal or external reference (VREF ≤ VCC/2), VOUT and REF unloaded, unless otherwise noted.
TJMAX = 125°C, θJA = 100°C/W (N8)
TJMAX = 125°C, θJA = 150°C/W (S8)
1
2
3
4
8
7
6
5
TOP VIEW
CLK
DIN
CS/LD
DOUT
VCC
VOUT
REF
GND
N8 PACKAGE
8-LEAD PDIP S8 PACKAGE
8-LEAD PLASTIC SO
(Note 1)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
DAC
Resolution ●12 Bits
DNL Differential Nonlinearity Guaranteed Monotonic (Note 2) ●±0.5 LSB
INL Integral Nonlinearity T
A
= 25°C±3.5 LSB
(Note 2) ●±4LSB
V
OS
Offset Error T
A
= 25°C±12 mV
●±18 mV
V
OS
TC Offset Error Temperature ±15 µV/°C
Coefficient
V
FS
Full-Scale Voltage When Using Internal Reference, LTC1451, T
A
= 25°C 4.065 4.095 4.125 V
LTC1451 ●4.045 4.095 4.145 V
External 2.048V Reference, V
CC
= 5V, LTC1452 ●4.075 4.095 4.115 V
When Using Internal Reference, LTC1453, T
A
= 25°C 2.470 2.500 2.530 V
LTC1453 ●2.460 2.500 2.540 V
V
FS
TC Full-Scale Voltage When Using Internal Reference, LTC1451 ±0.10 LSB/°C
Temperature Coefficient When Using External 2.048V Reference, LTC1452 ±0.02 LSB/°C
When Using Internal Reference, LTC1453 ±0.10 LSB/°C
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
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3
LTC1451
LTC1452/LTC1453
sn145123 145123fas
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1451), 2.7V to 5.5V (LTC1452/LTC1453),
internal or external reference (VREF ≤ VCC/2), VOUT and REF unloaded, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference (LTC1451/LTC1453)
Reference Output Voltage LTC1451 ●2.008 2.048 2.088 V
LTC1453 ●1.195 1.220 1.245 V
Reference Output ±0.08 LSB/°C
Temperature Coefficient
Reference Line Regulation ●0.7 ±2LSB/V
Reference Load Regulation 0 ≤ I
OUT
≤ 100µA, LTC1451 ●0.2 ±1.5 LSB
LTC1453 ●0.6 ±3 LSB
Reference Input Range V
REF
≤ V
CC
– 1.5V ●V
CC
/2 V
Reference Input Resistance ●81430 kΩ
Reference Input Capacitance 15 pF
Short-Circuit Current REF Shorted to GND ●80 mA
Power Supply
V
CC
Positive Supply Voltage For Specified Performance, LTC1451 ●4.5 5.5 V
LTC1452 ●2.7 5.5 V
LTC1453 ●2.7 5.5 V
I
CC
Supply Current 4.5V ≤ V
CC
≤ 5.5V (Note 4), LTC1451 ●400 620 µA
2.7V ≤ V
CC
≤ 5.5V (Note 4), LTC1452 ●225 350 µA
2.7V ≤ V
CC
≤ 5.5V (Note 4), LTC1453 ●250 500 µA
Op Amp DC Performance
Short-Circuit Current Low V
OUT
Shorted to GND ●100 mA
Short-Circuit Current High V
OUT
Shorted to V
CC
●120 mA
Output Impedance to GND Input Code = 0 ●40 120 Ω
AC Performance
Voltage Output Slew Rate (Note 3) ●0.4 1.0 V/µs
Voltage Output Settling Time (Notes 3, 4) to ±0.5LSB 14 µs
Digital Feedthrough 0.3 nV• s
AC Feedthrough REF = 1kHz, 2V
P-P
, LTC1452 –95 dB
SINAD Signal-to-Noise + Distortion REF = 1kHz, 2V
P-P
, (Code: All 1s) LTC1452 85 dB
ELECTRICAL CHARACTERISTICS
4
LTC1451
LTC1452/LTC1453
sn145123 145123fas
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (LTC1451LTC1452), VCC = 3V (LTC1453).
LOAD CURRENT (mA)
0.0001
MINIMUM SUPPLY VOLTAGE (V)
110
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
1451/2/3 G01
0.010.001 0.1 100
∆V
OUT
< 1LSB
TEMPERATURE (°C)
–55
SUPPLY CURRENT (µA)
–25 535 65
1451/2/3 G03
95
450
440
430
420
410
400
390
380
370
360
350 125
VCC = 5.5V
VCC = 4.5V VCC = 5V
LOAD CURRENT (mA)
0.0001
MINIMUM SUPPLY VOLTAGE (V)
110
4.50
4.25
4.00
3.75
3.50
3.25
3.00
2.75
2.50
2.25
1451/2/3 G02
0.010.001 0.1 100
∆V
OUT
< 1LSB
LTC1451
Supply Current vs Temperature
LTC1451 Minimum Supply
Voltage vs Load Current LTC1453 Minimum Supply
Voltage vs Load Current
Note 3: Load is 5kΩ in parallel with 100pF.
Note 4: DAC switched between all 1s and the code corresponding to V
OS
for the part, i.e., LTC1451: code 18; LTC1453: code 30.
Note 5: Digital inputs at 0V or V
CC
.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to code 4095 (full scale).
LTC1451/LTC1452 LTC1453
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Digital I/O
V
IH
Digital Input High Voltage ●2.4 2.0 V
V
IL
Digital Input Low Voltage ●0.8 0.6 V
V
OH
Digital Output High Voltage I
OUT
= –1mA ●V
CC
– 1.0 V
CC
– 0.7 V
V
OL
Digital Output Low Voltage I
OUT
= 1mA ●0.4 0.4 V
I
LEAK
Digital Input Leakage V
IN
= GND to V
CC
●±10 ±10 µA
C
IN
Digital Input Capacitance Guaranteed by Design ●10 10 pF
Not Subject to Test
Switching
t
1
D
IN
Valid to CLK Setup ●40 60 ns
t
2
D
IN
Valid to CLK Hold ●00 ns
t
3
CLK High Time ●40 60 ns
t
4
CLK Low Time ●40 60 ns
t
5
CS/LD Pulse Width ●50 80 ns
t
6
LSB CLK to CS/LD ●40 60 ns
t
7
CS/LD Low to CLK ●20 30 ns
t
8
D
OUT
Output Delay C
LOAD
= 15pF ●150 220 ns
t
9
CLK Low to CS/LD Low ●20 30 ns
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
5
LTC1451
LTC1452/LTC1453
sn145123 145123fas
LOAD RESISTANCE (Ω)
10
OUTPUT SWING (V)
100 1k 10k
1451/2/3 G05
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
FULL SCALE
R
L
TIED TO GND
ZERO SCALE
R
L
TIED TO V
CC
V
CC
= 5V
OUTPUT SINK CURRENT (mA)
OUTPUT PULL-DOWN VOLTAGE (mV)
1000
100
10
1
0.1
0.0001 0.1 1 10 100
1451/2/3 G06
0.001 0.01
125°C
–55°C
25°C
LOGIC INPUT VOLTAGE (V)
0
SUPPLY CURRENT (mA)
1.15
1.05
0.95
0.85
0.75
0.65
0.55
0.45
0.35 4.0
1451/2/3 G04
1.0 1.5 2.5 3.5 4.50.5 2.0 3.0 5.0
ALL DIGITAL INPUTS
TIED TOGETHER
LTC1451
Supply Current vs Logic Input
Voltage LTC1451
Output Swing vs Load Resistance
LTC1451
Pull-Down Voltage vs Output Sink
Current Capability
TEMPERATURE (°C)
–55
OFFSET VOLTAGE (µV)
–25 535 65
1451/2/3 G07
95
900
800
700
600
500
400
300 125
CODE
0
DNL ERROR (LSB)
0.5
0.0
–0.5 1024 2048 2560
1451/2/3 TA02
512 1536 3072 3584 4095
LTC1451
Differential Nonlinearity (DNL)
CODE
0
ERROR (LSB)
2.0
1.6
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
–2.0 1024 2048 2560
1451/2/3 G09
512 1536 3072 3584 4095
VCC = 5V
INTERNAL REFERENCE
TA = 25°C
LTC1451
Integral Nonlinearity (INL)
0.2LSB/DIV
LTC1452
Total Harmonic Distortion + Noise
vs Frequency LTC1451
Broadband Output Noise
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION + NOISE (dB)
–40
–50
–60
–70
–80
–90
–100 10050 10k 100k
1451/2/3 G08
1k
V
CC
= 5V
V
IN
= 2V
P-P
V
OUT
= 4V
P-P
LTC1451
Offset Voltage vs Temperature
5ms/DIV
CODE = FFFH
BW = 3Hz TO 1.4MHz
GAIN = 1000
1451/2/3 G10
TYPICAL PERFOR A CE CHARACTERISTICS
UW
6
LTC1451
LTC1452/LTC1453
sn145123 145123fas
GND: Ground.
REF: The Output of the Internal Reference and the Input
to the DAC Resistor Ladder. An external reference with
voltage up to V
CC
/2 may be used for the LTC1452.
V
OUT
: The Buffered DAC Output.
V
CC
: The Positive Supply Input. 4.5V ≤ V
CC
≤ 5.5V
(LTC1451), 2.7 ≤ V
CC
≤ 5.5V (LTC1452/LTC1453). Re-
quires a bypass capacitor to ground.
CLK: The TTL Level Input for the Serial Interface Clock.
D
IN
: The TTL Level Input for the Serial Interface Data. Data
on the D
IN
pin is latched into the shift register on the rising
edge of the serial clock.
CS/LD: The TTL Level Input for the Serial Interface Enable
and Load Control. When CS/LD is low the CLK signal is
enabled, so the data can be clocked in. When CS/LD is
pulled high, data is loaded from the shift register into the
DAC register, updating the DAC output.
D
OUT
: The Output of the Shift Register which Becomes
Valid on the Rising Edge of the Serial Clock.
B11
MSB B10
t
1
t
9
B1
t
6
B0
LSB
B11
CURRENT WORD
t
7
t
2
t
4
t
3
t
8
CLK
D
IN
D
OUT
CS/LD t
5
1451/2/3 TD
B0
PREVIOUS WORD
B11
PREVIOUS WORD B10 B1 B0
DAC
REGISTER
LD
+
–
REFERENCE
LTC1451: 2.048V
LTC1453: 1.22V
12-BIT
SHIFT
REGISTER
POWER-ON
RESET
11451/2/3 BD
CLK 1
D
IN
2
D
OUT
4
V
OUT
7
REF
6
GND
5
V
CC
8
3
CS/LD
12-BIT DAC
UU
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BLOCK DIAGRA
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7
LTC1451
LTC1452/LTC1453
sn145123 145123fas
Resolution (n): Resolution is defined as the number of
digital input bits, n. It defines the number of DAC output
states (2
n
) that divide the full-scale range. The resolution
does not imply linearity.
Full-Scale Voltage (V
FS
): This is the output of the DAC
when all bits are set to 1.
Voltage Offset Error (V
OS
): Normally, DAC offset is the
voltage at the output when the DAC is loaded with all zeros.
The DAC can have a true negative offset, but because the
part is operated from a single supply, the output cannot go
below zero. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
The offset of the part is measured at the code that corre-
sponds to the maximum offset specification:
V
OS
= V
OUT
– [(Code × V
FS
)/(2
n
– 1)]
Least Significant Bit (LSB): One LSB is the ideal voltage
difference between two successive codes.
LSB = (V
FS
– V
OS
)/(2
n
– 1) = (V
FS
– V
OS
)/4095
Nominal LSBs:
LTC1451 LSB = 4.095V/4095 = 1mV
LTC1452 LSB = V(REF)/4095
LTC1453 LSB = 2.5V/4095 = 0.610mV
Integral Nonlinearity (INL): End-point INL is the maxi-
mum deviation from a straight line passing through the
end-points of the DAC transfer curve. Because the part
operates from a single supply and the output cannot go
below zero, the linearity is measured between full scale
and the code corresponding to the maximum offset speci-
fication. The INL error at a given input code is calculated
as follows:
INL = [V
OUT
– V
OS
– (V
FS
– V
OS
)(code/4095)]/LSB
V
OUT
= The output voltage of the DAC measured at
the given input code
Differential Nonlinearity (DNL): DNL is the difference
between the measured change and the ideal 1LSB change
between any two adjacent codes. The DNL error between
any two codes is calculated as follows:
DNL = (∆V
OUT
– LSB)/LSB
∆V
OUT
= The measured voltage difference between
two adjacent codes
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
nV × sec.
DAC CODE
1451/2/3 F01
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
Figure 1. Effect of Negative Offset
DEFI ITIO S
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8
LTC1451
LTC1452/LTC1453
sn145123 145123fas
Reference
The LTC1451 includes an internal 2.048V reference, mak-
ing 1LSB equal to 1mV (gain of 2). The LTC1453 has an
internal reference of 1.22V with a full scale of 2.5V (gain of
2.05). The internal reference output is turned off when the
pin is forced above the reference voltage, allowing an
external reference to be connected to the reference pin.
The LTC1452 has no internal reference and the REF pin
must be driven externally. The buffer gain is 2, so the
external reference must be less than V
CC
/2 and be capable
of driving the 8k minimum DAC resistor ladder.
Voltage Output
The LTC1451 family’s rail-to-rail buffered output can
source or sink 5mA over the entire operating temperature
range while pulling to within 300mV of the positive supply
voltage or ground. The output swings to within a few
millivolts of either supply rail when unloaded and has an
equivalent output resistance of 40Ω when driving a load to
the rails. The output can drive 1000pF without going into
oscillation.
Serial Interface
The data on the D
IN
input is loaded into the shift register
on the rising edge of the clock. The MSB is loaded first. The
DAC register loads the data from the shift register when
CS/LD is pulled high. The CLK is disabled internally when
CS/LD is high. Note: CLK must be low before CS/LD is
pulled low to avoid an extra internal clock pulse.
The buffered output of the 12-bit shift register is available
on the D
OUT
pin which swings from GND to V
CC
.
Multiple LTC1451/LTC1452/LTC1453s may be daisy-
chained together by connecting the D
OUT
pin to the D
IN
pin of the next chip, while the CLK and CS/LD signals
remain common to all chips in the daisy chain. The serial
data is clocked to all of the chips, then the CS/LD signal is
pulled high to update all of them simultaneously.
OPERATIO
U
9
LTC1451
LTC1452/LTC1453
sn145123 145123fas
An Isolated 4mA to 20mA Process Controller
Has 3.3V Minimum Loop Voltage
11451/2/3 TA04
3k
10k
1k
45k 5k
90k 5k
Q1
2N3440
R
S
10Ω
V
LOOP
3.3V TO 30V
I
OUT
OUTIN
CLK
D
IN
CS/LD
CLK
D
IN
CS/LD
CLK
D
IN
CS/LD
V
CC
V
OUT
1µF
LTC1453
4N28
OPTO-ISOLATORS
3.3V
500Ω
LT
®
1121-3.3
FROM
OPTO-
ISOLATED
INPUTS
V
REF
+
–
LT1077
This circuit shows how to use an LTC1453 to make an
opto-isolated digitally controlled 4mA to 20mA process
controller. The controller circuitry, including the opto-
isolation, is powered by the loop voltage that can have a
wide range of 3.3V to 30V. The 1.22V reference output of
the LTC1453 is used for the 4mA offset current and V
OUT
is used for the digitally controlled 0mA to 16mA current.
R
S
is a sense resistor and the op amp modulates the
transistor Q1 to provide the 4mA to 20mA current through
this resistor. The potentiometers allow for offset and full-
scale adjustment. The control circuitry dissipates well
under the 4mA budget at zero-scale.
Note that although these DACs have internal Schmitt
triggers and are suitable for use with slow rising edges
such as produced by the above optoisolator, the use of
optoisolators in a daisy-chained topology requires the
addition of a gate or the use of a fast isolator on the clock
signal. Setup and hold times between D
OUT
and D
IN
are not
guaranteed unless a clock edge with a rise time of less than
100ns is provided.
TYPICAL APPLICATIO S
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10
LTC1451
LTC1452/LTC1453
sn145123 145123fas
12-Bit 3V to 5V Voltage Output DAC
D
IN
CLK
CS/LD
D
OUT
µP
0.1µF
OUTPUT
LTC1451: 0V TO 4.095V
LTC1452: 0V TO 2 • REF
LTC1453: 0V TO 2.5V
LTC1451: 2.048V
LTC1452: EXTERNAL
LTC1453: 1.22V
V
CC
V
OUT
GND
LTC145X
V
REF
TO NEXT DAC FOR
DAISY-CHAINING
LTC1451: 4.5V TO 5.5V
LTC1452: 2.7V TO 5.5V
LTC1453: 2.7V TO 5.5V
1451/2/3 TA03
Digitally Programmable Current Source
CLK
D
IN
CS/LD
µP
0.1µF
V
CC
V
OUT
GND
5V
LTC1451
1451/2/3 TA05
–
+
LT1077
V
S
+ 5V TO 100V
FOR R
L
≤ 50Ω
Q1
2N3440
R
A
410Ω
R
L
I
OUT
=≈ 0mA TO 10mA
D
IN
• 4.095
4096 • R
A
This circuit shows a digitally programmable current source
from an external voltage source using an external op amp,
an LT1077 and an NPN transistor (2N3440). Any digital
word from 0 to 4095 is loaded into the LTC1451 and its
output correspondingly swings from 0V to 4.095V. In the
configuration shown, this voltage will be forced across the
resistor R
A
. If R
A
is chosen to be 410Ω the output current
will range from 0mA at zero-scale to 10mA at full-scale.
The minimum voltage for V
S
is determined by the load
resistor R
L
and Q1's V
CESAT
voltage. With a load resistor
of 50Ω, the voltage source can be as low as 5V.
TYPICAL APPLICATIO S
U
11
LTC1451
LTC1452/LTC1453
sn145123 145123fas
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
N8 1098
0.100
(2.54)
BSC
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.125
(3.175)
MIN
12 34
8765
0.255 ± 0.015*
(6.477 ± 0.381)
0.400*
(10.160)
MAX
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.016 – 0.050
(0.406 – 1.270)
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 1298
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
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PACKAGE DESCRIPTIO
12
LTC1451
LTC1452/LTC1453
sn145123 145123fas
LINEAR TECHNOLOGY CORPORATION 1995
LT/TP 0100 2K REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900
●
FAX
: (408) 434-0507
●
TELEX
: 499-3977
PART NUMBER DESCRIPTION COMMENTS
LTC1257 5V to 15V Single Supply, Complete 12-Bit V
OUT
Reference Can Be Overdriven Up to 12V, i.e., FS MAX = 12V
DAC in SO-8 Package
LTC1446/LTC1446L Dual 12-Bit V
OUT
DACs in SO-8 5V with 4.096V Full-Scale Output/3V with 2.5V Full Scale
LTC1448 Dual 12-Bit V
OUT
DAC in SO-8 V
CC
from 2.7V to 5.5V, Output Swings to V
REF
LTC1655/LTC1655L 5V/3V 16-Bit V
OUT
DAC in SO-8 Pin Conpatible with LTC1451/LTC1453
LTC1659 Single 12-Bit V
OUT
DAC in MSOP V
CC
from 2.7V to 5.5V, Output Swings to V
REF
LTC7541 12-Bit Multiplying Parallel I
OUT
DAC 5V to 16V Supply, 12-Bit Wide Interface
LTC7543/LTC8143 12-Bit Multiplying Serial I
OUT
DAC 5V Supply, Clear Pin and Serial Data Output (LTC8143)
LTC8043 12-Bit Multiplying Serial I
OUT
DAC 5V Supply, SO-8 Package
RELATED PARTS
A Wide Swing, Bipolar Output 12-Bit DAC
CLK
D
IN
CS/LD
µP
0.1µF
V
CC
V
OUT
GND V
REF
R1
5k
5V
LTC1451
1451/2/3 TA06
–
+
LT1077
5V
–5V
R2
10k
R3
10k
R5
20k
R4
20k
2 • D
IN
• 4.095
4096
V
OUT
:
D
IN
V
OUT
4.094
–4.096
2048 4095
– 4.096V
This circuit shows how to make a bipolar output 12-bit
DAC with a wide output swing using an LTC1451 and an
LT1077. R1 and R2 resistively divide down the LTC1451
output and an offset is summed in using the LTC1451
onboard 2.048V reference and R3 and R4. R5 ensures that
the onboard reference is always sourcing current and
never has to sink any current even when V
OUT
is at full-
scale. The LT1077 output will have a wide bipolar output
swing of –4.096V to 4.094V as shown in the figure above.
With this output swing 1LSB = 2mV.
TYPICAL APPLICATION
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