© Semiconductor Components Industries, LLC, 2009
December, 2009 − Rev. 9
1Publication Order Number:
MC74LCX245/D
MC74LCX245
Low-Voltage CMOS Octal
Transceiver
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The MC74LCX245 is a high performance, non−inverting octal
transceiver operating from a 2.0 to 5.5 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX245 inputs
to be safely driven from 5 V devices if VCC is less than 5.0 V. The
MC74LCX245 is suitable for memory address driving and all TTL
level bus oriented transceiver applications.
Current drive capability is 24 mA at both A and B ports. The
Transmit/Receive (T/R) input determines the direction of data flow
through the bi−directional transceiver. Transmit (active−HIGH)
enables data from A ports to B ports; Receive (active−LOW) enables
data from B to A ports. The Output Enable input, when HIGH,
disables both A and B ports by placing them in a HIGH Z condition.
Features
•Designed for 2.0 to 5.5 V VCC Operation
•5 V Tolerant − Interface Capability With 5 V TTL Logic
•Supports Live Insertion and Withdrawal
•IOFF Specification Guarantees High Impedance When VCC = 0 V
•LVTTL Compatible
•LVCMOS Compatible
•24 mA Balanced Output Sink and Source Capability
•Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
•Latchup Performance Exceeds 500 mA
•ESD Performance: Human Body Model >2000 V
Machine Model >200 V
•Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
20
1
1
20
MARKING
DIAGRAMS
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G= Pb−Free Package
SOIC−20
DW SUFFIX
CASE 751D
LCX245
AWLYYWWG
LCX
245
ALYWG
G
TSSOP−20
DT SUFFIX
CASE 948E
SOEIAJ−20
M SUFFIX
CASE 967
74LCX245
AWLYWWG
1
1
1
20
1
20
20
20
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
(Note: Microdot may be in either location)
QFN20
MN SUFFIX
CASE 485AA
1
LCX
245
ALYWG
G
MC74LCX245
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2
B0
OE 19
T/R 1
A0
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
B6
A6
B7
A7
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
Figure 1. Pinout (Top View)
1920 18 17 16 15 14
21 34567
VCC
13
8
12
9
11
10
OE B0 B1 B2 B3 B4 B5 B6 B7
T/R A0 A1 A2 A3 A4 A5 A6 A7 GND
PIN NAMES
FUNCTION
Output Enable Input
Transmit/Receive Input
Side A 3−State Inputs or 3−State Outputs
Side B 3−State Inputs or 3−StateOutputs
PINS
OE
T/R
A0−A7
B0−B7
TRUTH TABLE
OPERATING MODE
Non−Inverting
INPUTS
L
L
H
OE T/R
L
H
X
B Data to A Bus
A Data to B Bus
Z
H = High Voltage Level
L = Low Voltage Level
Z = High Impedance State
X = High or Low Voltage Level and Transitions are Acceptable
For ICC reasons, Do Not Float Inputs
Figure 2. Logic Diagram
PIN #1
29
19 12
20
10
11
QFN
MC74LCX245
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3
MAXIMUM RATINGS
Symbol Parameter Value Condition Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIDC Input Voltage −0.5 ≤ VI ≤ +7.0 V
VODC Output Voltage −0.5 ≤ VO ≤ +7.0 Output in 3−State V
−0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State (Note 1) V
IIK DC Input Diode Current −50 VI< GND mA
IOK DC Output Diode Current −50 VO < GND mA
+50 VO > VCC mA
IODC Output Source/Sink Current ±50 mA
ICC DC Supply Current Per Supply Pin ±100 mA
IGND DC Ground Current Per Ground Pin ±100 mA
TSTG Storage Temperature Range −65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage Operating
Data Retention Only
2.0
1.5
2.5, 3.3
2.5, 3.3
5.5
5.5
V
VIInput Voltage 0 5.5 V
VOOutput Voltage (HIGH or LOW State)
(3−State)
0
0
VCC
5.5
V
IOH HIGH Level Output Current VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
− 24
− 12
− 8
mA
IOL LOW Level Output Current VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
+ 24
+ 12
+ 8
mA
TAOperating Free−Air Temperature −55 +125 °C
Dt/DVInput Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V
MC74LCX245
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4
DC ELECTRICAL CHARACTERISTICS
TA = −55°C to +125°C
Symbol Characteristic Condition Min Max Unit
VIH HIGH Level Input Voltage (Note 2) 2.3 V ≤ VCC ≤ 2.7 V 1.7 V
2.7 V ≤ VCC ≤ 3.6 V 2.0
VIL LOW Level Input Voltage (Note 2) 2.3 V ≤ VCC ≤ 2.7 V 0.7 V
2.7 V ≤ VCC ≤ 3.6 V 0.8
VOH HIGH Level Output Voltage 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mAVCC −0.2 V
VCC = 2.3 V; IOH = −8 mA 1.8
VCC = 2.7 V; IOH = −12 mA 2.2
VCC = 3.0 V; IOH = −18 mA 2.4
VCC = 3.0 V; IOH = −24 mA 2.2
VOL LOW Level Output Voltage 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA0.2 V
VCC = 2.3 V; IOL= 8 mA 0.6
VCC = 2.7 V; IOL= 12 mA 0.4
VCC = 3.0 V; IOL = 16 mA 0.4
VCC = 3.0 V; IOL = 24 mA 0.55
IIInput Leakage Current 2.3 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 5.5 V ±5mA
IOZ 3−State Output Current 2.3 ≤ VCC ≤ 3.6 V; 0V ≤ VO ≤ 5.5 V;
VI = VIH or V IL
±5mA
IOFF Power−Off Leakage Current VCC = 0 V; VI or VO = 5.5 V 10 mA
ICC Quiescent Supply Current 2.3 ≤ VCC ≤ 3.6 V; VI = GND or VCC 10 mA
2.3 ≤ VCC ≤ 3.6 V; 3.6 ≤ VI or VO ≤ 5.5 V ±10
DICC Increase in ICC per Input 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V 500 mA
2. These values of VI are used to test DC electrical characteristics only.
AC CHARACTERISTICS tR = tF = 2.5 ns; RL = 500 W
Symbol Parameter Waveform
Limits
Unit
TA = −55°C to +125°C
VCC = 3.3 V ± 0.3V VCC = 2.7 V VCC = 2.5 V ± 0.2V VCC = 5.0 V
CL = 50 pF CL = 50 pF CL = 30 pF CL = 50 pF
Min Max Min Max Min Max Min Max
tPLH
tPHL
Propagation Delay
Input to Output
1 1.5
1.5
7.0
7.0
1.5
1.5
8.0
8.0
1.5
1.5
8.4
8.4
1.5
1.5
5.0
5.0
ns
tPZH
tPZL
Output Enable Time
to High and Low Level
2 1.5
1.5
8.5
8.5
1.5
1.5
9.5
9.5
1.5
1.5
10.5
10.5
1.5
1.5
7.0
7.0
ns
tPHZ
tPLZ
Output Disable Time From
High and Low Level
2 1.5
1.5
7.5
7.5
1.5
1.5
8.5
8.5
1.5
1.5
9.0
9.0
1.5
1.5
6.0
6.0
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 3)
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
MC74LCX245
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5
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol Characteristic Condition Min Typ Max Unit
VOLP Dynamic LOW Peak Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.8
0.6
V
V
VOLV Dynamic LOW Valley Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol Parameter Condition Typical Unit
CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF
CI/O Input/Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF
CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VCC
0 V
VOH
VOL
An, Bn
tPHL
tPLH
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
0 V
OE, T/R
tPZH tPHZ
tPZL tPLZ
Vmo
Vmo
VmiVmi
Vmo Vmo
Figure 3. AC Waveforms
Vmi
VOH
VHZ
VOL
VCC
VLZ
Bn, An
An, Bn
An, Bn
Vmi
Symbol
VCC
3.3 V + 0.3 V 2.7 V 2.5 V + 0.2 V 5.0 V
Vmi 1.5 V 1.5 V VCC/2 VCC/2
Vmo 1.5 V 1.5 V VCC/2 VCC/2
VHZ VOL + 0.3 V VOL + 0.3 V VOL + 0.15 V VOL + 0.15 V
VLZ VOH − 0.3 V VOH − 0.3 V VOH − 0.15 V VOH − 0.15 V
MC74LCX245
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6
OPEN
PULSE
GENERATOR
RT
DUT
VCC
RL
R1
CL
6 V
GND
TEST SWITCH
tPLH, tPHL Open
tPZL, tPLZ 6 V at VCC = 3.3 0.3 V
6 V at VCC = 2.5 0.2 V
Open Collector/Drain tPLH and tPHL 6 V
tPZH, tPHZ GND
CL= 50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance)
CL= 30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance)
RL= R1 = 500 W or equivalent
RT= ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
ORDERING INFORMATION
Device Package Shipping†
MC74LCX245DW SOIC−20 38 Units / Rail
MC74LCX245DWG SOIC−20
(Pb−Free)
38 Units / Rail
MC74LCX245DWR2 SOIC−20 1000 Tape & Reel
MC74LCX245DWR2G SOIC−20
(Pb−Free)
1000 Tape & Reel
MC74LCX245DT TSSOP−20* 75 Units / Rail
MC74LCX245DTG TSSOP−20*
(Pb−Free)
75 Units / Rail
MC74LCX245DTR2 TSSOP−20* 2000 Tape & Reel
MC74LCX245DTR2G TSSOP−20*
(Pb−Free)
2000 Tape & Reel
MC74LCX245M SOEIAJ−20 40 Units / Rail
MC74LCX245MG SOEIAJ−20
(Pb−Free)
40 Units / Rail
MC74LCX245MEL SOEIAJ−20 2000 Tape & Reel
MC74LCX245MELG SOEIAJ−20
(Pb−Free)
2000 Tape & Reel
MC74LCX245MNTWG QFN20
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MC74LCX245
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7
PACKAGE DIMENSIONS
SOIC−20
DW SUFFIX
CASE 751D−05
ISSUE G
20
1
11
10
B20X
H10X
C
L
18X A1
A
SEATING
PLANE
q
hX 45_
E
D
M
0.25 M
B
M
0.25 S
AS
B
T
eT
B
A
DIM MIN MAX
MILLIMETERS
A2.35 2.65
A1 0.10 0.25
B0.35 0.49
C0.23 0.32
D12.65 12.95
E7.40 7.60
e1.27 BSC
H10.05 10.55
h0.25 0.75
L0.50 0.90
q0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
__
MC74LCX245
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8
PACKAGE DIMENSIONS
TSSOP−20
DT SUFFIX
CASE 948E−02
ISSUE B
DIM
A
MIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B4.30 4.50 0.169 0.177
C1.20 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.27 0.37 0.011 0.015
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER
SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN
FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
110
1120
PIN 1
IDENT
A
B
−T−
0.100 (0.004)
C
DGH
SECTION N−N
K
K1
JJ1
N
N
M
F
−W−
SEATING
PLANE
−V−
−U−
S
U
M
0.10 (0.004) V S
T
20X REFK
L
L/2
2X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
--- ---
S
U0.15 (0.006) T
MC74LCX245
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9
PACKAGE DIMENSIONS
SOEIAJ−20
M SUFFIX
CASE 967−01
ISSUE A
DIM MIN MAX MIN MAX
INCHES
--- 2.05 --- 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
12.35 12.80 0.486 0.504
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059
0
0.70 0.90 0.028 0.035
--- 0.81 --- 0.032
A1
HE
Q1
LE
_10 _0
_10 _
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR
PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD
WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS
OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS
AND ADJACENT LEAD TO BE 0.46 ( 0.018).
HE
A1
LE
Q1
_
c
A
Z
D
E
20
110
11
b
M
0.13 (0.005)
e
0.10 (0.004)
VIEW P
DETAIL P
M
L
A
b
c
D
E
e
L
M
Z
MC74LCX245
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10
PACKAGE DIMENSIONS
QFN20
CASE 485AA−01
ISSUE A
DIM MIN MAX
MILLIMETERS
A
A1 0.00 0.05
A2 0.65 0.75
A3
b0.20 0.30
D2.50 BSC
D2 0.85 1.15
E4.50 BSC
E2
e0.50 BSC
K0.20 ---
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
0.20 REF
b
D2
L
PIN ONE REFERENCE
E2
1
9
19
12
11
D
E
B
A
C0.15
C0.15
2X
2X
e
2
e
20X
20X
0.10 C
0.05 C
A B
NOTE 3
A
20X
C
K
20X
A1
A2
(A3) SEATING
PLANE
C0.08
C0.10
0.80 1.00
L0.35 0.45
2.85 3.15
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
MC74LCX245/D
PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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