General Description
The MAX7490/MAX7491 consist of two identical low-
power, low-voltage, wide dynamic range, rail-to-rail,
2nd-order switched-capacitor building blocks. Each of
the two filter sections, together with two to four external
resistors, can generate all standard 2nd-order func-
tions: bandpass, lowpass, highpass, and notch (band
reject). Three of these functions are simultaneously
available. Fourth-order filters can be obtained by cas-
cading the two 2nd-order filter sections. Similarly, high-
er order filters can easily be created by cascading
multiple MAX7490/MAX7491s.
Two clocking options are available: self-clocking
(through the use of an external capacitor) or external
clocking for tighter cutoff frequency control. The clock-
to-center frequency ratio is 100:1. Sampling is done at
twice the clock frequency, further separating the cutoff
frequency and Nyquist frequency.
The MAX7490/MAX7491 have an internal rail splitter
that establishes a precise common voltage needed for
single-supply operation. The MAX7490 operates from a
single +5V supply and the MAX7491 operates from a
single +3V supply. Both devices feature a low-power
shutdown mode and come in a 16-pin QSOP package.
________________________Applications
Tunable Active Filters
Multipole Filters
ADC Anti-Aliasing
Post-DAC Filtering
Adaptive Filtering
Phase-Locked Loops (PLLs)
Set-Top Boxes
Features
oDual 2nd-Order Filter in a 16-Pin QSOP Package
oHigh Accuracy
Q Accuracy: ±0.2%
Clock-to-Center Frequency Error: ±0.2%
oRail-to-Rail Input and Output Operation
oSingle-Supply Operation: +5V (MAX7490)
or +3V (MAX7491)
oInternal or External Clock
oHighpass, Lowpass, Bandpass, and Notch Filters
oClock-to-Center Frequency Ratio of 100:1
oInternal Sampling-to-Center Frequency Ratio
of 200:1
oCenter Frequency up to 40kHz
oEasily Cascaded for Multipole Filters
oLow-Power Shutdown: < 1µA Supply Current
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
________________________________________________________________
Maxim Integrated Products
1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LPA LPB
BPB
NB/HPB
INVB
SB
COM
EXTCLK
CLK
TOP VIEW
MAX7490
MAX7491
QSOP
+
BPA
NA/HPA
SHDN
INVA
SA
GND
VDD
Pin Configuration
19-1768; Rev 1; 4/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
PART TEMP RANGE PIN-
PACKAGE
SUPPLY
VOLTAGE
(+V)
MAX7490CEE+ 0°C to +70°C 16 QSOP 5
MAX7490EEE+ -40°C to +85°C 16 QSOP 5
MAX7491CEE+ 0°C to +70°C 16 QSOP 3
MAX7491EEE+ -40°C to +85°C 16 QSOP 3
Typical Application Circuit appears at end of data sheet.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—MAX7490
(VDD = VEXTCLK = +5V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMIN to TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND..............................................................-0.3V to +6V
EXTCLK, SHDN to GND ...........................................-0.3V to +6V
INV_, LP_, BP_, N_/HP_, S_, COM,
CLK to GND............................................-0.3V to (VDD + 0.3V)
Maximum Current into Any Pin ...........................................50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.30mW/°C above +70°C).........667mW
Operating Temperature Range
MAX749_CEE .....................................................0°C to +70°C
MAX749_EEE...................................................-40°C to +85°C
Die Temperature ..............................................................+150°C
Storage Temperature.........................................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FILTER
Center Frequency Range fOMode 1 0.001 to
40 kHz
Clock-to-Center Frequency
Accuracy fCLK/fOMode 1, R1 = R3 = 50kΩ , R2 = 10kΩ,
Q = 5, deviation from 100:1 ±0.2 ±0.7 %
Q Accuracy M od e 1, R1 = R3 = 50kΩ, R2 = 10kΩ, Q = 5 ±0.2 ±2%
fO Temperature Coefficient ±1 ppm/°C
Q Temperature Coefficient ±5 ppm/°C
DC Lowpass Gain Accuracy Mode 1, R1 = R2 = 10kΩ±0.1 ±0.5 %
VOS1 DC offset of input inverter ±3±12.5
VOS2 DC offset of 1st integrator ±4±15DC Offset Voltage (Figure 8)
VOS3 DC offset of 2nd integrator ±4±30
mV
Crosstalk (Note 2) fIN = 10kHz -60 dB
Input: COM externally driven VDD/2
- 0.5 VDD/2 VDD/2
+ 0.5
COM Voltage Range VCOM
Output: COM internally driven VDD/2
- 0.2 VDD/2 VDD/2
+ 0.2
V
Input Resistance at COM RCOM 140 250 325 kΩ
Clock Feedthrough Up to 5th harmonic of fCLK 200 μVRMS
Noise (Note 3) Mode 1, R1 = R2 = R3 =10kΩ, LP output,
Q = 1 60 μVRMS
Output Voltage Swing 0.2 V
D D
- 0.2 V
Input Leakage Current at COM SHDN = GND, VCOM = 0 to VDD ±0.1 ±10 μA
CLOCK
Maximum Clock Frequency fCLK 4 MHz
EXTCLK = GND, COSC = 1000pF 95 135 175 kHz
Internal Oscillator Frequency
(Note 4) fOSC EXTCLK = GND, COSC = 100pF 1.35 MHz
Clock Input High VDD - 0.5 V
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________________________________________________________________________________ 3
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Clock Input Low 0.5 V
Clock Duty Cycle 50 ± 5%
SHDN AND EXTCLK
Input High VIH VDD - 0.5 V
Input Low VIL 0.5 V
Input Leakage Current VINPUT = 0 to VDD ±0.4 ±10 μA
POWER REQUIREMENTS
Supply Voltage VDD 4.5 5.5 V
Power-Supply Current IDD No external load, mode 1, R1 = R3 = 50kΩ,
R2 = 10kΩ, Q = 5 3.5 4.0 mA
Shutdown Current ISHDN SHDN = GND 1 μA
INTERNAL OP AMPS CHARACTERISTICS
Output Short-Circuit Current ±18 mA
DC Open-Loop Gain RL ≥ 10kΩ, CL ≤ 50pF 130 dB
Gain Bandwidth Product GBW RL ≥ 10kΩ, CL ≤ 50pF 7 MHz
Slew Rate SR RL ≥ 10kΩ, CL ≤ 50pF 6.4 V/μs
ELECTRICAL CHARACTERISTICS—MAX7490 (continued)
(VDD = VEXTCLK = +5V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMIN to TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
4 _______________________________________________________________________________________
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FILTER
Center Frequency Range fOMode 1 0.001 to
40 kHz
Clock-to-Center Frequency
Accuracy fCLK/fOMode 1, R1 = R3 = 50kΩ , R2 = 10kΩ,
Q = 5, deviation from 100:1 ±0.2 ±0.7 %
Q Accuracy Mode 1, R1 = R3 = 50kΩ, R2 = 10kΩ,
Q = 5 ±0.2 ±2%
fO Temperature Coefficient ±1 ppm/°C
Q Temperature Coefficient ±5 ppm/°C
DC Lowpass Gain Accuracy Mode 1, R1 = R2 = 10kΩ±0.1 ±0.5 %
VOS1 DC offset of input inverter ±3±12.5
VOS2 DC offset of 1st integrator ±4±15
DC Offset Voltage
(Figure 8)
VOS3 DC offset of 2nd integrator ±4±25
mV
Crosstalk (Note 2) fIN = 10kHz -60 dB
Input: COM externally driven VDD/2
- 0.1 VDD/2 VDD/2
+ 0.1
COM Voltage Range VCOM
Output: COM internally driven VDD/2
- 0.1 VDD/2 VDD/2
+ 0.1
V
Input Resistance at COM RCOM 60 80 120 kΩ
Clock Feedthrough Up to 5th harmonic of fCLK 200 μVRMS
Noise (Note 3) Mode 1, R1= R2 = R3 = 10kΩ,
LP output, Q = 1 60 μVRMS
Output Voltage Swing 0.2 V
D D
- 0.2 V
Input Leakage Current at COM SHDN = GND, VCOM = 0 to VDD ±0.1 ±10 μA
CLOCK
Maximum Clock Frequency fCLK 4 MHz
EXTCLK = GND, COSC = 1000pF 95 135 175 kHz
Internal Oscillator Frequency
(Note 4) fOSC EXTCLK = GND, COSC = 100pF 1.35 MHz
Clock Input High VDD - 0.5 V
Clock Input Low 0.5 V
Clock Duty Cycle 50 ±5%
SHDN AND EXTCLK
Input High VIH VDD - 0.5 V
Input Low VIL 0.5 V
Input Leakage Current VINPUT = 0 to VDD ±0.4 ±10 μA
ELECTRICAL CHARACTERISTICS—MAX7491
(VDD = VEXTCLK = +3V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMIN to TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________________________________________________________________________________ 5
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER REQUIREMENTS
Supply Voltage VDD 2.7 3.6 V
Power-Supply Current IDD No load, mode 1, R1 = R3 = 50kΩ,
R2 = 10kΩ, Q = 5 3.5 4.0 mA
Shutdown Current ISHDN SHDN = GND 1 μA
INTERNAL OP AMPS CHARACTERISTICS
Output Short-Circuit Current ±11 mA
DC Open-Loop Gain RL ≥ 10kΩ, CL ≤ 50pF 130 dB
Gain Bandwidth Product GBW RL ≥ 10kΩ, CL ≤ 50pF 7 MHz
Slew Rate SR RL ≥ 10kΩ, CL ≤ 50pF 6 V/μs
Note 1: Resistive loading of the N_/HP_, LP_, BP_ outputs includes the resistors used for the filter implementation.
Note 2: Crosstalk between internal filter sections is measured by applying a 1VRMS 10kHz signal to one bandpass filter section input
and grounding the input of the other bandpass filter section. The crosstalk is the ratio between the output of the grounded
filter section and the 1VRMS input signal of the other section.
Note 3: Bandwidth of noise measurement is 80kHz.
Note 4: fOSC (kHz) = 135 x 103/ COSC (COSC in pF)
ELECTRICAL CHARACTERISTICS—MAX7491 (continued)
(VDD = VEXTCLK = +3V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN = VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMIN to TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
Typical Operating Characteristics
(VDD = +5V for MAX7490, VDD = +3V for MAX7491, fCLK = 625kHz, VSHDN = VEXTCLK = VDD, COM = VDD/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, TA= +25°C, unless otherwise noted.)
10
-60
1 10 100
2ND-ORDER BANDPASS FILTER
FREQUENCY RESPONSE
-50
MAX7490-01
FREQUENCY (kHz)
GAIN (dB)
-30
-40
-10
-20
0
300
0
110100
2ND-ORDER BANDPASS FILTER
PHASE RESPONSE
50
MAX7490-02
FREQUENCY (kHz)
PHASE (%)
100
200
150
250
VDD = +5V
fCLK = 625kHz
Q = 5
0
-0.8
100 1000 10,000
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. CLOCK FREQUENCY
-0.7
MAX7490-03
fCLK (kHz)
fCLK/fO DEVIATION (%)
-0.6
-0.2
-0.3
-0.4
-0.5
-0.1
VDD = 5V
VDD = 3V
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
6 _______________________________________________________________________________________
-0.6
-0.4
-0.5
-0.3
-0.2
-0.1
0
0.1
0.2
04020 60 80 100
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. Q
MAX7490-04
Q
fCLK/fO DEVIATION (%)
VDD = 5V
VDD = 3V
-0.7
-0.3
-0.4
-0.6
-0.2
-0.5
-0.1
0
0.1
0.3
0.2
0.4
0.5
0.6
0.7
-40 10-15 35 60 85
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. TEMPERATURE
MAX7490-05
TEMPERATURE (°C)
fCLK/fO DEVIATION (%)
1
-6
100 1000 10,000
Q DEVIATION vs. CLOCK FREQUENCY
-5
MAX7490-06
fCLK (kHz)
Q DEVIATION (%)
-4
-1
-2
-3
0
VDD = 3V
VDD = 5V
-2.0
-1.0
-1.5
-0.5
0
0.5
1.0
1.5
2.0
-40 10-15 35 60 85
Q DEVIATION vs. TEMPERATURE
MAX7490-07
TEMPERATURE (°C)
Q DEVIATION (%)
0
150
100
50
200
250
300
350
400
450
500
04020 60 80 100
NOISE vs. Q
MAX7490-08
Q
NOISE (µVRMS)
3.0
3.2
3.1
3.4
3.3
3.6
3.5
3.7
-40 10-15 356085
SUPPLY CURRENT vs. TEMPERATURE
MAX7490-09
TEMPERATURE (°C)
IDD (mA)
VDD = 5V
VDD = 3V
3.0
3.3
3.2
3.1
3.4
3.5
3.6
3.7
3.8
3.9
4.0
3.0 4.03.5 4.5 5.0 5.5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX7490-10
VDD (V)
IDD (mA)
fCLK = 3MHz
fCLK = 625kHz
fCLK = 2kHz
3.32
3.34
3.33
3.37
3.36
3.35
3.40
3.39
3.38
3.41
3.0 4.03.5 4.5 5.0 5.5
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX7490-11
VDD (V)
IDD (mA)
-40°C
+25°C
+85°C
-20
-120
1k 10k
MAX7491
THD + NOISE vs. FREQUENCY
MAX7490-12
INPUT FREQUENCY (Hz)
THD + NOISE (dB)
-30
-40
-50
-60
-70
-80
-90
-100
-110
A
B
A = MODE 1
B = MODE 3
Typical Operating Characteristics (continued)
(VDD = +5V for MAX7490, VDD = +3V for MAX7491, fCLK = 625kHz, VSHDN = VEXTCLK = VDD, COM = VDD/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, TA= +25°C, unless otherwise noted.)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________________________________________________________________________________
7
-20
-120
1k 10k
MAX7490
THD + NOISE vs. FREQUENCY
MAX7490-13
INPUT FREQUENCY (Hz)
THD + NOISE (dB)
-30
-40
-50
-60
-70
-80
-90
-100
-110
B
A
A = MODE 1
B = MODE 3
-90
-80
-70
-60
-50
-40
-30
-20
-10
01.00.5 1.5 2.0 2.5 3.0
MAX7491
THD + NOISE vs. INPUT VOLTAGE
MAX7490-14
INPUT VOLTAGE (Vp-p)
THD + NOISE (dB)
B
A
A = MODE 1
B = MODE 3
-90
-80
-70
-60
-50
-40
-30
-20
-10
012345
MAX7490
THD + NOISE vs. INPUT VOLTAGE
MAX7490-15
INPUT VOLTAGE (Vp-p)
THD + NOISE (dB)
B
A
A = MODE 1
B = MODE 3
2.0
3.0
2.5
3.5
4.0
4.5
5.0
084121620
OUTPUT VOLTAGE SWING
vs. LOAD RESISTANCE
MAX7490-16
RLOAD (kΩ) TO COM
OUTPUT SWING (Vp-p)
VDD = 5V
VDD = 3V
0
500
1500
1000
2000
2500
0400200 600 800 1000
INTERNAL OSCILLATOR PERIOD
vs. SMALL CAPACITANCE
MAX7490-17
CAPACITANCE (pF)
INTERNAL OSCILLATOR FREQUENCY (kHz)
VDD = 3V
VDD = 5V
0
20
40
60
80
100
120
140
160
132 4567
INTERNAL OSCILLATOR PERIOD
vs. LARGE CAPACITANCE
MAX7490-18
CAPACITANCE (nF)
INTERNAL OSCILLATOR FREQUENCY (kHz)
VDD = 5V
VDD = 3V
126
128
127
130
129
132
131
133
3.0 4.03.5 4.5 5.0 5.5
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX7490-19
VDD (V)
INTERNAL OSCILLATOR FREQUENCY (kHz)
COSC = 1000pF
124
130
128
126
132
134
136
138
140
142
144
-40 10-15 35 60 85
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
MAX7490-20
TEMPERATURE (°C)
INTERNAL OSCILLATOR FREQUENCY (kHz)
VDD = 3V
VDD = 5V
COSC = 1000pF
Typical Operating Characteristics (continued)
(VDD = +5V for MAX7490, VDD = +3V for MAX7491, fCLK = 625kHz, VSHDN = VEXTCLK = VDD, COM = VDD/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, TA= +25°C, unless otherwise noted.)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
8 _______________________________________________________________________________________
_______________Detailed Description
The MAX7490/MAX7491 are universal switched-capaci-
tor filters designed with a fixed internal fCLK/fOratio of
100:1. Operating modes use external resistors connect-
ed in different arrangements to realize different filter
functions (highpass, lowpass, bandpass, notch) in all of
the classical filter topologies (Butterworth, Bessel, ellip-
tic, Chebyshev). Figure 1 shows a block diagram.
Clock Signal
External Clock
The MAX7490/MAX7491 switched-capacitor filters are
designed for use with external clocks that have a 50%
±5% duty cycle. When using an external clock, drive
the EXTCLK pin high or connect to VDD. Drive CLK with
CMOS logic levels (GND and VDD). Varying the rate of
the external clock adjusts the center frequency of the
filter:
fO= fCLK /100
Internal Clock
When using the internal oscillator, drive the EXTCLK pin
low or connect to GND and connect a capacitor (COSC)
between CLK and GND. The value of the capacitor
(COSC) determines the oscillator frequency as follows:
fOSC (kHz) = 135 x 103/ COSC (pF)
Since COSC is in the low picofarads, minimize the stray
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the frequency of the
internal oscillator adjusts the filter’s center frequency by
a 100:1 clock-to-center frequency ratio. For example,
an internal oscillator frequency of 135kHz produces a
nominal center frequency of 1.35kHz.
NAME
PIN
FILTER A FILTER B
FUNCTION
LP_ 1 16 2nd-Order Lowpass Filter Output
BP_ 2 15 2nd-Order Bandpass Filter Output
N_/HP_ 3 14 2nd-Order Notch/Highpass Filter Output
INV_ 4 13 Inverting Input of Filter Summing Op Amp
S_ 5 12
Summing Input. The connection of the summing input, along with the other
resistor connections, determine the circuit topology (mode) of each 2nd-
order section. S_ must never be left unconnected.
SHDN 6Shutdown Input. Drive SHDN low to enable shutdown mode; drive SHDN
high or connect to VDD for normal operation.
GND 7 Ground Pin
VDD 8Positive Supply. Bypass VDD with a 0.1µF capacitor to GND. A low-noise
supply is recommended. Input +5V for MAX7490 or +3V for MAX7491.
CLK 9
Clock Input. Connect CLK to an external capacitor (COSC) between CLK and
ground to set the internal oscillator frequency. For external clock operation,
drive CLK with a CMOS-level clock. The duty cycle of the external clock
should be between 45% and 55% for best performance.
EXTCLK 10 External/Internal Clock Select Input. Connect EXTCLK to VDD when driving
CLK externally. Connect EXTCLK to GND when using the internal oscillator.
COM 11
Common Pin. Biased internally at VDD/2. Bypass externally to GND with
0.1µF capacitor. To override the internal biasing, drive COM with an external
low-impedance source.
Pin Description
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________________________________________________________________________________ 9
2nd-Order Filter Stage
The MAX7490/MAX7491 are dual biquad filters. The
biquad topology allows the use of standard filter tables
and equations to implement simultaneous lowpass,
bandpass, and notch or highpass filters. Topologies
such as Butterworth, Chebyshev, Bessel, elliptic, as
well as custom algorithms are possible.
Internal Common Voltage
The COM pin sets the common-mode input voltage and
is internally biased to VDD/2 with a resistor-divider. The
resistors used are typically 250kΩfor the MAX7490,
and typically 80kΩfor the MAX7491. The common-
mode voltage is easily overdriven by an external volt-
age supply if desired. Bypass COM to the analog
ground with at least a 0.1µF capacitor.
Inverting Inputs
Locate resistors that are connected to INV_ as close as
possible to INV_ to reduce stray capacitance and noise
pickup. INV_ are inverting inputs to continuous-time op
amps, and behave like a virtual ground. There is no
sampling energy present on these inputs.
Outputs
Each switched-capacitor section, together with two to
four external resistors, can generate all standard 2nd-
order functions: bandpass, lowpass, highpass, and
notch (band-reject) functions. Three of these functions
are simultaneously available. The maximum signal
swing is limited by the power-supply voltages used.
The amplifiers’ outputs in the MAX7490/MAX7491 are
able to swing to within approximately 0.2V of either
supply.
Driving coaxial cable, large capacitive loads, or total
resistive loads less than 10kΩwill degrade the total
harmonic distortion (THD) performance. Note that the
effective resistive load at the output must include both
the feedback resistors and any external load resistors.
Low-Power Shutdown Mode
The MAX7490/MAX7491 have a shutdown mode that is
activated by driving SHDN low. In shutdown mode, the
filter supply current reduces to < 1µA (max), and the fil-
ter outputs become high impedance. The COM input
also becomes high impedance during shutdown. For
normal operation, drive SHDN high or connect to VDD.
__________Applications Information
Designing with the MAX7490/MAX7491 begins by
selecting the mode that best fits the desired circuit
requirements. Table 1 lists the available modes and
their relative advantages and disadvantages. Table 2
lists the different nomenclature used in the explanations
that follow.
Σ∫ ∫
NA/HPA (3)
SHDN
VDD (8)
GND (7)
CLK (9)
EXTCLK (10)
INVB (13)
COM (11)
R
R
INVA (4)
(6)
SA (5)
BPA (2) LPA (1)
+
-
Σ∫ ∫
NB/HPB (14)
SB (12)
BPB (15) LPB (16)
+
-
Figure 1. Block Diagram
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
10 ______________________________________________________________________________________
Table 1. Filter Operating Modes
MODE LP HP BP N L P- N
*
H P- N
*
COMMENTS
1•••
fCLK/fO ratio is the nominal value. Good for bandpass filters
with identical sections cascaded, higher order Butterworth filters,
high-Q bandpass, low-Q notches.
1B ••• Same as Mode 1 with fCLK/fO ratios greater than the nominal
value.
2•••
Combination of Mode 1 and Mode 3; fCLK/fO ratios always
less than the nominal value. Less sensitivity to resistor tolerances
than Mode 3.
2N •
Extension of Mode 2 that allows higher frequencies. Highpass
and lowpass outputs are summed with external op amp and
two resistors. Good for lowpass elliptic filters.
3•••
Adjustable fO above and below the nominal frequency.
Commonly used for multiple-pole Chebyshev filters, all-pole
higher order bandpass, lowpass, and highpass filters.
3A ••• ••
Extension of Mode 3 that needs an external op amp and
two additional resistors. Commonly used for lowpass or higher
elliptic or Cauer filters.
*
LP-N = lowpass notch, HP-N = highpass notch. Both require an external op amp. See Definition of Terms (Table 2).
Table 2. Definition of Terms
TERM DEFINITION
fCLK The clock frequency applied to the switched-capacitor filter.
fOThe center frequency of the 2nd-order complex pole pair, fO, is determined by measuring the peak response
frequency at the bandpass output.
fNOTCH The frequency of minimum amplitude response at the notch output.
QQuality factor, or Q, is the ratio of fO to the -3dB bandwidth of the 2nd-order bandpass filter. Q also determines
the amount of amplitude peaking at the lowpass and highpass outputs, but is not measured at these outputs.
HOBP The gain in V/V of the bandpass output at f = fO.
HOLP The gain in V/V of the lowpass output at f→0Hz.
HOHP The gain in V/V of the highpass output at f→fCLK/2.
HON1 The notch output gain as f→0Hz.
HON2 The notch output gain at f = fCLK/2.
LP-N A notch output with HON1 > HON2.
HP-N A notch output with HON1 < HON2.
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
______________________________________________________________________________________ 11
Mode 1
Figure 2 shows the MAX7490/MAX7491s’ configuration
of Mode 1. This mode provides 2nd-order notch, low-
pass, and bandpass filter functions. The gain at all
three outputs is inversely proportional to the value of
R1. The center frequency, fO, is fixed at fCLK/100. High-
Q bandpass filters can be built without exceeding the
bandpass amplifier’s output swing (i.e., HOBP does not
have to track Q). The notch and bandpass center fre-
quencies are identical. The notch output gain is the
same above and below the notch center frequency.
Mode 1 can also be used to make high-order Butter-
worth lowpass filters, low Q notches, and multiple-order
bandpass filters obtained by cascading identical
switched-capacitor sections.
Mode 1 Design Equations
Mode 1B
Figure 3 shows the configuration of Mode 1B. R5 and
R6 are added to lower the feedback voltage from the
lowpass output to the summing input. This allows the
clock-to-center frequency to be adjusted beyond the
nominal value. This mode essentially has the same
functions and speed as Mode 1 while providing a high-
Q with fCLK/fOratios greater than the nominal value.
Mode 1B Design Equations
Mode 2
Figure 4 shows the configuration of Mode 2. Mode 2 is
a combination of Mode 1 and Mode 3. In this mode,
fCLK/fOis always less than the part’s nominal ratio.
However, it provides less sensitivity to resistor toler-
ances than does Mode 3. It has a highpass notch out-
put where the notch frequency depends solely on the
clock frequency.
ffR
RR
ff
QR
R
R
RR
HR
R
RR
R
HR
R
HasfHzR
R
Hatff R
R
OCLK
nO
OLP
OBP
ON
ON CLK
=+
=
=+
=+
=
→=
==
−
−
−
−
100
6
65
3
2
6
65
2
1
65
6
3
1
02
1
22
1
1
2
()
(/)
ff
ff
QR
R
HR
R
HR
R
HasfHzR
R
Hatff R
R
OCLK
notch O
OLP
OBP
ON
ON CLK
=
=
=
=
=
→=
==
−
−
−
−
100
3
2
2
1
3
1
02
1
22
1
1
2
()
(/)
Σ∫ ∫
LPBPSN
R3
R2
R1
VIN
CC
COM
+-
Figure 2. Mode 1, 2nd-Order Filter Providing Notch, Bandpass,
and Lowpass Outputs
Σ∫ ∫
LPBPSN
R3
R6 R5
R2
R1
VIN
CC
COM
COM
+-
Figure 3. Mode 1B, 2nd-Order Filter Providing Notch, Bandpass,
and Lowpass Outputs
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
12 ______________________________________________________________________________________
Mode 2 Design Equations
Mode 2N
Figure 5 shows the configuration of Mode 2N. This
mode extends the topology of Mode 3A to Mode 2,
where the highpass and lowpass outputs are summed
through two external resistors, RHand RL, to create a
lowpass notch filter that has higher frequency than the
one in Mode 2. Mode 2 is most useful in lowpass elliptic
designs. When cascading the sections of the
MAX7490/MAX7491, the highpass and lowpass outputs
can be summed directly into the inverting input of the
next section. Only one external op amp is needed.
Mode 2N Design Equations
ffR
R
ffR
R
QR
R
R
R
HfHzR
R
R
R
R
R
R
RR
OCLK
nCLK H
L
ON G
H
G
L
=+
=+
=+
→= +
⎛
⎝
⎜
⎞
⎠
⎟
⎛
⎝
⎜
⎞
⎠
⎟+
⎛
⎝
⎜
⎞
⎠
⎟
100
12
4
100
1
3
2
12
4
02
1
4
42
1()
ffR
R
ff
QR
R
R
R
HR
R
R
RR
HR
R
HfHz
R
R
R
RR
Hatff R
R
OCLK
nCLK
OLP
OBP
ON
ON CLK
=+
=
=+
=+
⎛
⎝
⎜
⎞
⎠
⎟
=
→= +
⎛
⎝
⎜
⎞
⎠
⎟
==
−
−
−
−
100
12
4
100
3
2
12
4
2
1
4
42
3
1
02
1
4
42
22
1
1
2
()
(/)
Σ∫ ∫
LPBPSHP/N
R3
R4
R2
R1
VIN
CC
COM
COM
LOWPASS
NOTCH
OUTPUT
+-
RH
RL
RG
Figure 5. Mode 2N, 2nd-Order Filter Providing a Lowpass Notch Output
Σ∫ ∫
LP
BPSHP/N
R3
R4
R2
R1
VIN
CC
COM
+-
Figure 4. Mode 2, 2nd-Order Filter Providing a Highpass
Notch, Bandpass, and Lowpass Outputs
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
______________________________________________________________________________________ 13
Mode 3
Figure 6 shows the configuration of Mode 3. This mode
is a sampled time (Z transform) equivalent of the classi-
cal 2nd-order state variable filter. In this versatile mode,
the ratio of resistors R2 and R4 can move the center
frequency both above and below the nominal ratio.
Mode 3 is commonly used to make multiple-pole
Chebyshev filters with a single clock frequency. This
mode can also be used to make high-order all-pole
bandpass, lowpass, and highpass filters.
Mode 3 Design Equations
Mode 3A
Figure 7 shows the configuration of Mode 3A. Similar to
Mode 2, this mode adds an external op amp. See
Table 3 for op amp selection ideas. This op amp cre-
ates a highpass notch and lowpass notch by summing
the highpass and lowpass outputs through two external
resistors, RHand RL. The ratio of resistors RHand RL
adjusts the notch frequency, while R2 and R4 adjust
the bandpass center frequency, since the notch (zero
pair) frequency can be adjusted to both above and
below fO. Mode 3A is suitable for both lowpass and
highpass elliptic or Cauer filters. In multipole elliptic fil-
ters, only one external op amp is needed. Use the
inverting input of the internal op amp as the summing
node for all but the final section of the filter.
f
Of
CLK R
R
QR
R
R
R
HOHP R
R
HOLP R
R
HOBP R
R
=
=
=
=
=
−
−
−
100
2
4
3
2
2
4
2
1
4
1
3
1
Σ∫ ∫
LP
BPHP
R3
R4
R2
R1
VIN
CC
COM
+-
S
COM
Figure 6. Mode 3, 2nd-Order Section Providing Highpass,
Bandpass, and Lowpass Outputs
Σ
LPBPN/HP
R3
R4
R2
R1
VIN
CC
COM
COM
LOWPASS
NOTCH
OUTPUT
+-
RH
RL
RG
S
COM
Figure 7. Mode 3A, 2nd-Order Filter Providing Highpass Notch or Lowpass Notch Outputs
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
14 ______________________________________________________________________________________
Mode 3A Design Equations
Note: When the passband gain error exceeds 1dB, the
use of capacitor CCbetween the lowpass output and
the inverting input will reduce the gain error. The value
can best be determined experimentally. Typically, it
should be about 5pF/dB (CC-MAX = 15pF).
Offset Voltage
Switched-capacitor integrators generally exhibit higher
input offsets than discrete RC integrators. The larger
offset is mainly due to the charge injection of the CMOS
switches into the integrating capacitors. The internal op
amp offset also adds to the overall offset value. Figure
8 shows the input offsets from a single 2nd-order sec-
tion. Table 4 lists the formula for the output offset volt-
age for various modes and output pins.
Power Supplies
The MAX7490 operates from a single +5V supply, and
the MAX7491 operates from a single +3V supply.
Bypass VDD to GND with at least a 0.1µF capacitor.
VDD should be isolated from other digital or high-volt-
age analog supplies. If dual supplies are required, con-
nect the COM pin to the system ground and the GND
pin to the negative supply. Figure 9 shows an example
of dual-supply operation. Single-supply and dual-sup-
ply performances are equivalent. For dual-supply oper-
ation, drive CLK, SHDN, and EXTCLK from GND (which
is now V-) to VDD. If using the internal oscillator in dual-
supply mode, COSC can be returned to either GND or
the actual ground voltage. Use the MAX7490 for ±2.5V
and use the MAX7491 for ±1.5V.
For most applications, a 0.1µF bypass capacitor from
COM to GND is sufficient. If the VDD supply has signifi-
cant 60Hz energy, increase this capacitor to 1µF or
greater to provide better power-supply rejection.
ffR
R
ffR
R
QR
R
R
R
HR
R
HR
R
HR
R
HfHz
R
R
R
R
Hatff R
R
R
R
OCLK
nCLK H
L
OHP
OLP
OBP
ON G
L
ON CLK G
H
=
=
=
=
=
=
→=
⎛
⎝
⎜
⎞
⎠
⎟
==
⎛
⎝
⎜
⎞
⎠
⎟
−
−
−
100
2
4
100
3
2
2
4
2
1
4
1
3
1
04
1
22
1
1
2
()
(/)
Figure 8. Block Diagram of a 2nd-Order Section Showing the Input Offsets
Σ∫ ∫
N/HP
S
INV BP LP
COM
VOS1
VOS2 VOS3
+
-
PART GBW (MHz) SLEW RATE (V/μs) ISUPPLY/AMP (mA) PIN-PACKAGE
MAX4281 2 0.7 0.5 5 SOT23
MAX4322 5 2.0 1.1 5 SOT23
MAX4130 10 4.0 1.15 5 SOT23
MAX4490 10 10.0 2.0 5 SOT23
Table 3. Suggested External Op Amps
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
______________________________________________________________________________________ 15
Input Signal Amplitude Range
The optimal input signal range is determined by
observing the voltage level at which the signal-to-noise
plus distortion (SINAD) ratio is maximized for a given
corner frequency. The
Typical Operating Character-
istics
show the THD + Noise response as the input sig-
nal’s peak-to-peak amplitude is varied. In most
systems, the input signal should be kept as large as
possible to maximize the signal-to-noise ratio (SNR).
Allow sufficient headroom to ensure no signal clipping
under expected operating conditions.
Anti-Aliasing and Post-DAC Filtering
When using the MAX7490/MAX7491 for anti-aliasing or
post-DAC filtering, synchronize the DAC (or ADC) and
the filter clocks. If the clocks are not synchronized,
beat frequencies may alias into the desired passband.
Aliasing
Aliasing is an inherent phenomenon of most switched-
capacitor filters. As with all sampled systems, frequen-
cy components of the input signal above one half the
sampling rate will be aliased. The MAX7490/MAX7491
sample at twice the clock frequency, yielding a 200:1
sampling to cutoff frequency ratio.
In particular, input signal components (fIN) near the
sampling rate generate a difference frequency
(fSAMPLING - fIN) that often falls within the passband of
the filter. Such aliased signals, when they appear at the
output, are indistinguishable from real input informa-
tion. For example, the aliased output signal generated
when a 99kHz waveform is applied to a filter sampling
at 100kHz, (fCLK = 50kHz) is 1kHz. This waveform is an
attenuated version of the output that would result from
a true 1kHz input. Since sampling is done at twice the
clock frequency, the Nyquist frequency is the same as
the clock frequency.
A simple passive RC lowpass input filter is usually suffi-
cient to remove input frequencies that can be aliased.
In many cases, the input signal itself may be band limit-
ed and require no special anti-alias filtering. Selecting
a passive filter cutoff frequency equal to fC/2 gives
12dB rejection at the Nyquist frequency.
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the
clock frequency and its harmonics that are present at
the filter’s output pins, even without input signal. The
clock feedthrough can be greatly reduced by adding a
simple RC lowpass network at the final filter output.
Choose a cutoff frequency as low as possible to pro-
vide maximum noise attenuation. The attenuation and
phase shift of the external filter will limit the actual fre-
quency selected.
VDD
V+
V-
CLK
GND
0.1μF
CLOCK
*DRIVE SHDN TO V- FOR LOW-POWER
SHUTDOWN MODE.
SHDN
COM
0.1μF
MAX7490
MAX7491
*
V+
V-
Figure 9. Dual-Supply Operation
MODE VOSN/HP VOSBP VOSLP
1VOS1[1 + (R2 / R3) + (R2 / R1)] - (VOS3)
(R2 / R3) VOS3 VOSN/HP - VOS2
1b VOS1[1 + (R2 / R3) + (R2 / R1)] - (VOS3)
(R2 / R3) VOS3 (VOSN/HP - VOS2)[1 + R5 / R6)]
2
VOS1[1 + (R2 / R3) + (R2 / R1) + (R2 / R4) -
(VOS3)(R2 / R3)][R4 / R2 + R4] +
(VOS2)[R2 / R2 + R4]
VOS3 VOSN/HP - VOS2
3V
OS2 VOS3 VOS1[1 + (R4 / R1) + (R4 / R2) + (R4 / R3)] - (VOS2)
(R4 / R2) - (VOS3)(R4 / R3)
Table 4. Output DC Offsets for a 2nd-Order Section
Wideband Noise
The wideband noise of the filter is the total RMS value
of the device’s noise spectral density and is used to
determine the operating SNR. Most of its frequency
contents lie within the filter’s passband and cannot be
reduced with postfiltering. The total noise depends
mainly on the Q of each filter section and the cascade
sequence. Therefore, in multistage filters, place the
section with the highest Q first for lower output noise.
Multiple Filter Stages
In some designs, such as very narrow band filters, or in
modes where fOcannot be tuned with resistors, several
2nd-order sections with identical fOmay be cascaded
without multiple feedback. The total Q of the resultant
filter (QT) is:
Q is the Q of each individual filter section, and N is the
number of 2nd-order sections. In Table 5, the total Q and
total bandwidth (BW) are listed for up to five identical
2nd-order sections. B is the bandwidth of each section.
Chip Information
PROCESS: BiCMOS
Total Q Q
TN
/
//
=−
()
21
112
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
16 ______________________________________________________________________________________
TOTAL SECTIONS TOTAL BW TOTAL Q
1 1.000 B 1.00 Q
2 0.644 B 1.55 Q
3 0.510 B 1.96 Q
4 0.435 B 2.30 Q
5 0.386 B 2.60 Q
Table 5. Cascading Identical Bandpass
Filter Sections
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
______________________________________________________________________________________ 17
NB/HPB
INVB
INVA
VIN
VDD fCLK = 1MHz
NA/HPA
OUT
R1B
200k
R3B
200k
R2B
10k
R3A
200k
R2A
10k
R1
200k
LPA
BPA
LPB
BPB
C1
0.1μF
C2
0.1μF
SHDN
VDD
GND
SA SB
COM
EXTCLK
CLK
MAX7490
MAX7491
4TH-ORDER 10kHz
BANDPASS FILTER
-40
-30
-25
-20
-15
-10
-5
0
5
8 9 10 11 12
4TH-ORDER 10kHz BANDPASS FILTER
FREQUENCY RESPONSE
FREQUENCY (kHz)
GAIN (dB)
-35
Typical Application Circuit
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 QSOP E16+4 21-0055
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 7/00 Initial release —
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