Xicor X24C04 + X24C02 Conversion Assistant Replace X24C04/24C02 with X4043/X4045 - As little as ZERO hardware changes and only ONE software change- one additional serial write during initialization. (Application dependent) - NEW functionality reduces Bill-of-materials (BOM), improves system reliability (requires one hardware signal change to incorporate new functionality) Functional Comparison X24C04 4 kbit EEPROM 2-wire interface 8 pin SOIC - X24C02 2 kbit EEPROM 2-wire interface 8 pin SOIC - X4043/X4045 4 kbit EEPROM 2-wire interface 8 pin SOIC and MSOP Watch dog timer (WDT) 3 timeouts or disabled Low Voltage Sense (LVS is optimized for Vcc = 5V, 3.3V or user programmable) BlockLockTM - allows write protection of sections of memory. Power on RESET (POR) (4043 active low, 4045 active high) X4043 is more reliable with LVS, WEL, and BlockLockTM. Pinout 8 Pin SOIC X24C04/X24C02 A0 A1 A2 Vss 1 2 3 4 8 7 6 5 8 Pin SOIC X4043/X4045 (or MSOP) NC NC Reset/ Vss Vcc Test SCL SDA Pin X24C04/X24C02 Function 1 2 3 NC/A0(Slave address select) A1 (slave address select) A2 (slave address select) X4043/X4045 Function NC NC Reset/ Reset (X4043 Reset/ is open drain output) 4 5 6 7 8 Ground (Vss) Serial Data (SDA) Serial Clock (SCL) Test (GND) Vcc Vss SDA SCL Write Protect (WP) Vcc Rev 1.0 Page 1 of 2 1 2 3 4 8 7 6 5 Vcc WP SCL SDA Designers Notes (NC or Vcc or Vss) (NC or Vcc or Vss) Reset/ open drain--can be pulled up, tied low or NC. Single layout change here can enable WDT and POR Ground WP=1 for write protection Software Considerations Parameter 2-Wire Slave Byte Address Control Register write protect X24C02 1010 S2,S1,S0,R/W hardware signals determine two 2k bit page EEPROM address. No control register None (WP pin only) X24C04 1010 S2,S1,A8,R/W hardware signals determine two 2k bit page EEPROM address. No control register None (WP pin only) X4043 1010 X,X,A8 R/Wresponds to eight 2k bit page EEPROM addresses. Responds to additional 0xBXh addresses Adds WEL status bit - needs one serial write afterPOR: SET WEL=1 Take additional caution if there are multiple IIC devices on the bus. The X4043 has a fixed I2C slave byte (1010 XXX R/W) and no external Select/Address Pins. Note - X4043 does not respond to Serial Communications while RESET is active, during POR for example. DC Operating Characteristics Parameter Vcc Isb (stand-by) Icc2 (during EEPROM write) Vil Tbuf Tlow X24C04 2.7-5.5 V 1 uA 1.5 mA -1.0 V min 1.2 usec 1.2 usec X4043 2.7-5.5 V 1 uA 3 mA -0.5 Vmin 1.3 usec 1.3 usec X4043 Ordering Guide V CC Range V TRIP Range Package 4.5-5.5V 4.5-4.75 8L SOIC 8L MSOP 4.5-5.5V 4.25-4.5 8L SOIC 8L MSOP 2.7-5.5V 2.85-3.0 8L SOIC 8L MSOP 2.7-5.5V 2.55-2.7 8L SOIC 8L MSOP Rev 1.0 Operating Temp Range 0-70o C -40-85o C 0-70o C -40-85o C 0-70o C -40-85o C 0-70o C -40-85o C 0-70o C -40-85o C 0-70o C -40-85o C 0-70o C -40-85o C 0-70o C -40-85o C Page 2 of 2 Part Number (RESET Active LOW) Part Number (RESET Active HIGH) X4043S8-4.5A X4043S8I-4.5A X4043M8-4.5A X4043M8I-4.5A X4043S8 X4043S8I X4043M8 X4043M8I X4043S8-2.7A X4043S8I-2.7A X4043M8-2.7A X4043M8I-2.7A X4043S8-2.7 X4043S8I-2.7 X4043M8-2.7 X4043M8I-2.7 X4045S8-4.5A X4045S8I-4.5A X4045M8-4.5A X4045M8I-4.5A X4045S8 X4045S8I X4045M8 X4045M8I X4045S8-2.7A X4045S8I-2.7A X4045M8-2.7A X4045M8I-2.7A X4045S8-2.7 X4045S8I-2.7 X4045M8-2.7 X4045M8I-2.7