Rev 1.0 Page 1 of 2
Xicor X24C04 + X24C02 Conversion Assistant
Replace X24C04/24C02 with X4043/X4045
− As little as ZERO hardware changes and only ONE software change- one
additional serial write during initialization. (Application dependent)
− NEW functionality reduces Bill-of-materials (BOM), improves system reliability
(requires one hardware signal change to incorporate new functionality)
Functional Comparison
X24C04 X24C02 X4043/X4045
4 kbit EEPROM 2 kbit EEPROM 4 kbit EEPROM
2-wire interface 2-wire interface 2-wire interface
8 pin SOIC 8 pin SOIC 8 pin SOIC and MSOP
- - Watch dog timer (WDT) 3 timeouts or disabled
- - Low Voltage Sense (LVS is optimized for Vcc
= 5V, 3.3V or user programmable)
- - BlockLock™ – allows write protection of
sections of memory.
- - Power on RESET (POR)
(4043 active low, 4045 active high)
X4043 is more reliable with LVS, WEL, and BlockLock™.
Pinout
8 Pin SOIC X24C04/X24C02 8 Pin SOIC X4043/X4045 (or MSOP)
Pin X24C04/X24C02 Function X4043/X4045
Function Designers Notes
1NC/A0(Slave address select) NC (NC or Vcc or Vss)
2A1 (slave address select) NC (NC or Vcc or Vss)
3A2 (slave address select) Reset/ Reset
(X4043 Reset/ is
open drain output)
Reset/ open drain--can be
pulled up, tied low or NC.
Single layout change here
can enable WDT and POR
4Ground (Vss)Vss Ground
5Serial Data (SDA) SDA
6Serial Clock (SCL) SCL
7Test (GND) Write Protect (WP) WP=1 for write protection
8Vcc Vcc
A0 Vcc
A1 Test
A2 SCL
Vss SDA
1 8
2 7
3 6
4 5
NC Vcc
NC WP
Reset/ SCL
Vss SDA
1 8
2 7
3 6
4 5
Rev 1.0 Page 2 of 2
Software Considerations
Parameter X24C02 X24C04 X4043
2-Wire Slave
Byte Address 1010 S2,S1,S0,R/W
hardware signals
determine two 2k bit
page EEPROM
address. No control
register
1010 S2,S1,A8,R/W
hardware signals
determine two 2k bit
page EEPROM
address. No control
register
1010 X,X,A8 R/W-
responds to eight 2k bit
page EEPROM
addresses.
Responds to additional
0xBXh addresses
Control
Register write
protect
None (WP pin only) None (WP pin only) Adds WEL status bit –
needs one serial write
afterPOR: SET WEL=1
Take additional caution if there are multiple IIC devices on the bus. The X4043 has
a fixed I2C slave byte (1010 XXX R/W) and no external Select/Address Pins.
Note – X4043 does not respond to Serial Communications while RESET is active,
during POR for example.
DC Operating Characteristics
Parameter X24C04 X4043
Vcc 2.7-5.5 V 2.7-5.5 V
Isb (stand-by) 1 uA 1 uA
Icc2 (during EEPROM write) 1.5 mA 3 mA
Vil -1.0 V min -0.5 Vmin
Tbuf 1.2 usec 1.3 usec
Tlow 1.2 usec 1.3 usec
X4043 Ordering Guide
V CC
Range V TRIP
Range Package Operating
Temp Range
Part Number (RESET
Active LOW) Part Number
(RESET Active
HIGH)
0–70o CX4043S8–4.5A X4045S8–4.5A8L SOIC -40–85o CX4043S8I–4.5A X4045S8I–4.5A
0–70o CX4043M8–4.5A X4045M8–4.5A
4.5-5.5V 4.5-4.75
8L MSOP -40–85o CX4043M8I–4.5A X4045M8I–4.5A
0–70o CX4043S8 X4045S88L SOIC -40–85o CX4043S8I X4045S8I
0–70o CX4043M8 X4045M8
4.5-5.5V 4.25-4.5
8L MSOP -40–85o CX4043M8I X4045M8I
0–70o CX4043S8–2.7A X4045S8–2.7A8L SOIC -40–85o CX4043S8I–2.7A X4045S8I–2.7A
0–70o CX4043M8–2.7A X4045M8–2.7A
2.7-5.5V 2.85-3.0
8L MSOP -40–85o CX4043M8I–2.7A X4045M8I–2.7A
0–70o CX4043S8–2.7 X4045S8–2.78L SOIC -40–85o CX4043S8I–2.7 X4045S8I–2.7
0–70o CX4043M8–2.7 X4045M8–2.7
2.7-5.5V 2.55-2.7
8L MSOP -40–85o CX4043M8I–2.7 X4045M8I–2.7
