NC7WZ08 TinyLogic(R) UHS Dual 2-Input AND Gate Features General Description Space saving US8 surface mount package The NC7WZ08 is a dual 2-Input AND Gate from Fairchild's Ultra High Speed Series of TinyLogic. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. MicroPakTM leadless package Ultra High Speed; tPD 2.5ns Typ. into 50pF at 5V VCC High Output Drive; 24mA at 3V V CC Broad VCC Operating Range; 1.65V to 5.5V Matches the performance of LCX when operated at 3.3V VCC Power down high impedance inputs/output Overvoltage tolerant inputs facilitate 5V to 3V translation Patented noise/EMI reduction circuitry implemented Ordering Information Order Number Package Number Product Code Top Mark NC7WZ08K8X MAB08A WZ08 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7WZ08L8X MAC08A X4 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Package Description Supplied As Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate October 2008 Logic Symbol IEEE/IEC Function Table (Top View) Y = AB Pin One Orientation Diagram Inputs Output A B Y L L L L H L H L L H H H H = HIGH Logic Level AAA represents Product Code Top Mark - see ordering code L = LOW Logic Level Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Pad Assignments for MicroPak (Top Thru View) Pin Description Pin Names Description An, Bn Inputs Yn Output (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 2 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate Connection Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating VCC Supply Voltage -0.5V to +7V VIN DC Input Voltage -0.5V to +7V DC Output Voltage -0.5V to +7V VOUT IIK DC Input Diode Current @ VIN < -0.5V -50mA IOK DC Output Diode Current @ VOUT < -0.5V -50mA IOUT DC Output Current 50mA ICC / IGND DC VCC /GND Current TSTG Storage Temperature 100mA -65C to +150C TJ Junction Temperature Under Bias 150C TL Junction Lead Temperature (Soldering, 10 seconds) 260C PD Power Dissipation @ +85C US8 Micropak-8 245mW 165mW Recommended Operating Conditions(1) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Parameter Supply Voltage Operating 1.65V to 5.5V Supply Voltage Data Retention VIN VOUT TA tr , tf JA Rating 1.5V to 5.5V Input Voltage 0V to 5.5V Output Voltage 0V to VCC Operating Temperature -40C to +85C Input Rise and Fall Time VCC = 1.8V 0.15V, 2.5V 0.2V 0ns/V to 20ns/V VCC = 3.3V 0.3V 0ns/V to 10ns/V VCC = 5.0V 0.5V 0ns/V to 5ns/V Thermal Resistance US8 Micropak-8 265C/W 395C/W Note: 1. Unused inputs must be held HIGH or LOW. They may not float. (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 3 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate Absolute Maximum Ratings TA = -40C to +85C TA = 25C Symbol VIH VIL VOH VOL Parameter VCC (V) Conditions Min. Max. Min. 1.65-1.95 0.75 x VCC 0.75 x VCC 2.3-5.5 0.7 x VCC 0.7 x VCC LOW Level Input Voltage 1.65-1.95 0.25 x VCC 2.3-5.5 0.3 x VCC HIGH Level Output Voltage LOW Level Output Voltage 1.65 VIN = VIH IOH = -100A 1.55 2.3 2.2 2.3 2.2 3.0 2.9 3.0 2.9 4.5 4.4 4.5 4.4 1.65 IOH = -4mA 1.29 1.52 1.29 2.3 IOH = -8mA 1.9 2.15 1.9 3.0 IOH = -16mA 2.5 2.80 2.4 3.0 IOH = -24mA 2.4 2.68 2.3 4.5 IOH = -32mA 3.9 4.20 3.8 VIN = VIL IOL = 100A Input Leakage Current IOFF Power Off Leakage Current ICC Quiescent Supply Current Units V V 0.3 x VCC 1.65 1.65 Max. 0.25 x VCC 1.55 V 0.0 0.1 0.1 2.3 0.0 0.1 0.1 3.0 0.0 0.1 0.1 4.5 IIN Typ. HIGH Level Input Voltage V 0.0 0.1 0.1 1.65 IOL = 4mA 0.08 0.24 0.24 2.3 IOL = 8mA 0.10 0.3 0.3 3.0 IOL = 16mA 0.15 0.4 0.4 3.0 IOL = 24mA 0.22 0.55 0.55 4.5 IOL = 32mA 0.22 0.55 0.55 0.1 1 A VIN or VOUT = 5.5V 1 10 A VIN = 5.5V, GND 1 10 A 0-5.5 0.0 1.65-5.5 (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 VIN = 5.5V, GND www.fairchildsemi.com 4 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate DC Electrical Characteristics TA = -40C to +85C TA = +25C Symbol Parameter tPLH, tPHL Propagation Delay tPLH, tPHL Propagation Delay Typ Max Min Max Units 1.8 0.15 CL = 15pF, 2.5 0.2 RL = 1M 2.0 5.7 10.5 2.0 11.0 ns 1.0 3.5 5.8 1.0 6.2 Figure 1 Figure 3 3.3 0.3 0.8 2.6 3.9 0.8 4.3 5.0 0.5 0.5 1.9 3.1 0.5 3.3 1.2 3.2 4.8 1.2 5.2 ns 2.5 3.7 0.8 4.0 Figure 1 Figure 3 3.3 0.3 5.0 0.5 CIN CPD Figure Number Min VCC (V) Input Capacitance Power Dissipation Capacitance Conditions CL = 50pF, RL = 500 0.8 0 3.3 (2) 5.0 2.5 pF 14.5 pF Figure 2 19.5 Note: 2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICC static) AC Loading and Waveforms CL includes load and stray capacitance Input PRR = 1.0MHz, tw = 500ns Figure 1. AC Test Circuit Figure 3. AC Waveforms Input = Ac Waveform; tr = tf = 1.8ns; PRR = 10 MHz; Duty Cycle = 50% Figure 2. ICCD Test Circuit (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 5 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate AC Electrical Characteristics Tape Format for US8 Package Designator Tape Section Number of Cavities Cavity Status Cover Tape Status K8X Leader (Start End) 125 (typ.) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ.) Empty Sealed Tape Dimensions inches (millimeters) Tape Format for MicroPak Package Designator Tape Section Number of Cavities Cavity Status Cover Tape Status L8X Leader (Start End) 125 (typ.) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ.) Empty Sealed Tape Dimensions inches (millimeters) (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 6 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate Tape and Reel Specifications NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate Tape and Reel Specifications (Continued) Reel Dimensions inches (millimeters) Tape Size 8mm A B 7.0 (177.8) 0.059 (1.50) (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 C D N 0.512 0.795 2.165 (13.00) (20.20) (55.00) W1 W2 W3 0.331 +0.059/-0.000 (8.40 +1.50/-0.00) 0.567 (14.40) W1 +0.078/-0.039 (W1 +2.00/-1.00) www.fairchildsemi.com 7 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate Physical Dimensions 8 5 0.70 -B- 2.30.1 3.1.1 2.70 0.15 3.40 -A- 1.80 1.00 1.55 0.30 TYP 1 0.2 C B A ALL LEAD TIPS 4 PIN #1 IDENT. ALL LEAD TIPS 0.1 C 0.90 MAX 0.5 TYP DETAIL A 0.700.10 0.10-0.18 -C0.10 0.00 0.17-0.27 0.13 0.50TYP A B C 0.4 TYP GAGE PLANE 0.12 0-8 A. CONFORMS TO JEDEC REGISTRATION MO-187 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. SEATING PLANE DETAIL A D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982. MAB08AREVC Figure 4. 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 8 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate Physical Dimensions (Continued) Figure 5. 8-Lead MicroPak, 1.6 mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 9 Build it NowTM CorePLUSTM CorePOWERTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EfficentMaxTM EZSWITCHTM * TM (R) Fairchild(R) Fairchild Semiconductor(R) FACT Quiet SeriesTM (R) FACT FAST(R) FastvCoreTM FlashWriter(R) * FPSTM F-PFSTM FRFET(R) SM Global Power Resource Green FPSTM Green FPSTMe-SeriesTM GTOTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM MotionMaxTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R) (R) PDP SPMTM Power-SPMTM PowerTrench(R) PowerXSTM Programmable Active DroopTM QFET(R) QSTM Quiet SeriesTM RapidConfigureTM TM Saving our world, 1mW/W/kW at a timeTM SmartMaxTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SupreMOSTM SyncFETTM (R) TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM (R) UHC Ultra FRFETTM UniFETTM VCXTM VisualMaxTM XSTM The Power Franchise(R) * EZSWITCHTM and FlashWriter(R) are trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I37 (c)2000 Fairchild Semiconductor Corporation NC7WZ08 Rev. 1.11.0 www.fairchildsemi.com 10 NC7WZ08 -- TinyLogic(R) UHS Dual 2-Input AND Gate TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.