MX881R - IXYS Integrated Circuits Division

IXYS

MX881 1 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881

Xenon Flash Controller & LED Torch Driver

Features:

• Highly Integrated Solution that includes:

Optimized Flyback Boost Converter

Controller, IGBT Driver, 100mA LED Torch

Driver, and Transformer Drive Transistor

• Small Size (3mm x 5mm DFN-16)

• High Efficiency

• 3.0 to 5.5 Volt Battery Operation

• 1.65 to 5.5 Volt Digital Interface Operation

• Low Shut Down Current: 0.1µA

• SPI and I2C Bus Compatibility

• Programmable Average Battery Current:

(50mA – 220mA)

• Programmable Output Voltage: (300V - 330V)

Applications:

• Camera Cell Phones, Digital Still Cameras, and

Optical Film Cameras

Ordering Information

Part No. Description Qty

MX881R 3mm X 5mm DFN-16 73

MX881RTR DFN-16 Tape & Reel 2000

General Description

The MX881 offers a highly integrated Xenon Flash

controller, providing an ideal solution for small form

factor flash and torch lighting applications. The

MX881 integrates a user programmable Controller,

IGBT Driver, 100mA LED Torch Driver, and

Transformer Drive Transistor to significantly reduce

component count, solution size, and design

complexity.

The Boost Control Logic manages the peak primary

current and off time to optimize charge time and

control average battery current.

The Charge Cycle Control starts the charge cycle on

a low to high transition of the CHARGE input. Then

detects when the output voltage has reached the

desired voltage and stops the Boost Control Logic,

while asserting the DONE output signal.

The SPI/I2C serial interface adds the flexibility of 6

programmable average battery currents and 4

programmable high voltage output levels for the

flash function.

Typical Application

1:10 min.

CHARGE

VOUT

IPEAK

DONE

FLASH

VCC

22 uF

TRIGGER

CAPACITOR

FLASH

TUBE

MX881

CONTRO LLER / DRIVER

VHV

Boost Control

Logic

Charge

Cycle Logic

500V Total

Sw it ching

Diodes

VCC

VFB

SPI / I2C

X 4

SPI / I2C

Interfa ce to

set VOUT

& IAVE

IGBTGATE

IGBT

DRIVER

GND

LED_EN

LED

Bandgap REF

ISET

VBATT

DVCC

IXYS

IGBT

LSEC

MX881 IXYS

Boost Switch: When turned on, current flows in the primary of the flyback transformer. The energy

stored in the transformer is transferred to the secondary as high voltage when the boost switch is turned

off.

IGBT Driver: Switches the VCC supply to the IGBT gate when the FLASH signal is brought high. If

FLASH is low, the IGBT gate is driven to ground.

LED Driver: When LED_EN is high, the LED pin will sink 100mA to GND. If LED_EN is low, the LED

pin is high impedance.

Pin Description

Pin No. Pin Name Description

11 VCC Supply voltage from battery, (3.0V – 5.5V). Must be connected to VDVCC.

7 DVCC Digital supply voltage for I/O logic (1.65V-5.5V)

15 CHARGE

Low level stops the charging cycle and puts the device into power down mode.

Charge remains on the high voltage capacitor. A high level starts a charging cycle.

Charging continues until either the correct voltage is reached or CHARGE is brought

low.

6 DONE Open drain output that transitions high when the capacitor reaches the desired

voltage. This output is normally high except when charging so that standby current is

minimized. (Pull-up resistor not sourcing current).

12 VFB Feedback voltage input from voltage divider that determines when the output has

reached the desired voltage.

14 FLASH A high level will cause the IGBT to turn on firing the flash. A low level will turn the

IGBT off. FLASH can be brought low to shorten the flash pulse for red-eye reduction.

16 ISEL High level enables the I2C interface, low level enables SPI interface.

1 SCEn

Serial port chip enable. A low on this pin enables the SPI interface to receive data. If

SCEn is asserted low while in the I2C mode, the serial interface and control register

are reset.

4 SCLK Clock input for SPI and I2C interface.

2 SDATA Data input and output for SPI interface. Data input and acknowledge/data output for

I2C interface. This output is open drain for I2C output data.

3 SW Connection to internal power transistor that drives the negative terminal of the

transformer primary coil.

13 LSEC Connection to negative terminal of the transformer secondary. This input is grounded

internally through a low impedance used to sense the secondary transformer current.

9 IGBTGATE IGBT Gate driver output.

5 LED_EN A high level will cause the 100mA LED current regulator to turn on.

VF = VBATT

10 LED 100mA LED current regulator. Connect the cathode of the torch LED to this pin.

VF = VBATT

Exposed

Pad GND Ground Terminal.

8 N/C No Connect. Do not connect to any signal, ground or power source.

MX881 2 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

Absolute Maximum Ratings

Symbol Parameter Rating Unit

VCC, DVCC DC Supply Voltage 0.3 to 7.0 V

VIN DC Input Voltage -0.3 to VCC+0.3 V

VSW Voltage On SW pad -0.3 to 55 V

TSTG Storage Temperature -40 to +150 oC

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.

These are stress ratings only and functional operation of the device at these or any other conditions beyond

those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-

rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

Symbol Parameter Rating Unit

VCC Analog and Digital Supply Voltage 3 to 5.5 V

DVCC Digital I/O Supply Voltage 1.65 to 5.5 V

VIN DC Input Voltage 0 to DVCC V

VSW Voltage On SW pad 0 to 40 V

TJJunction Temperature -20 to +115 oC

MX881 3 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

DC Characteristics

Junction temperature range -20 to +1 15 °C

Symbol Parameter Condition Min Typ Max Unit

AVCC Supply Voltage – Analog and

voltage doubler 3 3.6 5.5 V

DVCC Supply Voltage – Digital I/O 1.65 3.3 5.5 V

ICC Supply Current (When Charging) 4 mA

ISTANDBY Supply Current (Not Charging) @ 25° C 0.1

µA

ISW_LEAK SW pin Leakage Current @ 25° C Vsw = 40V 30 nA

VT+ Schmitt trigger, positive-going

threshold (All digital inputs) 1.65V < DVCC < 2.4V

1.3

VT- Schmitt trigger, negative-going

threshold (All digital inputs) 1.65V < DVCC < 2.4V

0.4

Vhys Hysteresis, Schmitt trigger 1.65V < DVCC < 2.4V 0.15 V

VT+ Schmitt trigger, positive-going

threshold (All digital inputs) 2.4V < DVCC < 3.6V

1.6

VT- Schmitt trigger, negative-going

threshold (All digital inputs) 2.4V < DVCC < 3.6V

0.65

Vhys Hysteresis, Schmitt trigger 2.4V < DVCC < 3.6V 0.16 V

VT+ Schmitt trigger, positive-going

threshold (All digital inputs) 3.6 < DVCC <5.5V

2.1

VT- Schmitt trigger, negative-going

threshold (All digital inputs) 3.6V < DVCC <5.5V

0.9

Vhys Hysteresis, Schmitt trigger 3.6V < DVCC <5.5V 0.17 V

IIN Input Current VIN = DVCC or GND -10 10

µA

VOL Output Low Voltage 2K to DVCC 0.15 V

VOH Output High Voltage 2K to Ground DVCC-0.3 V

RSW SW Switch on resistance DVCC = 3.0V .15 .25 .50 Ω

RSW SW Switch on resistance DVCC=3.0V, @ 25°C .19 .25 .32

ILED LED drive current VLED > 0.5V 85 100 115 mA

IPEAK Primary Peak Current .7 A

OVS = 11 1.20 1.23 1.26 V

OVS = 10 1.16 1.19 1.22 V

OVS = 01 1.12 1.15 1.18 V

VTRIP Output Voltage Trip Point

OVS = 00 1.10 1.12 1.14 V

MX881 4 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

AC Characteristics

Junction temperature range 0 to + 115°C

Symbol Parameter Condition Min Typ Max Unit

TSTART

CHARGE High to Beginning of

Charge Cycle 110

µS

TEND

CHARGE Low to End of Charge

Cycle 100 nS

TIGBT-ON FLASH High to IGBTGATE High CL = 6.8nF, 10% to

90% 100

TIGBT-OFF FLASH Low to IGBTGATE Low CL = 6.8nF, 90% to

10% 100 nS

TLED-ON LED_EN High to Iout > 90mA TBD µS

TLED-OFF LED_EN Low to Iout < 1mA TBD µS

Control Register

The MX881 control register is a 5 bit register that allows the user to program the maximum output

voltage and the maximum average battery current during the charge cycle. Table1 shows how the bits in

the control register are assigned. ABC(2:0) are used to set the average battery current and OVS(1:0) are

used to set the output voltage selection reference.

Table 1 – Control Register

BIT: D4 D3 D2 D1 D0

Control: OVS1 OVS0 ABC2 ABC1 ABC0

Output Voltage Selection

The MX881 limits the high voltage placed on the external capacitor by comparing a divided down version

of the secondary flyback voltage to an internal voltage. This internal voltage is programmable to 4

discrete values to allow the user to change the flash energy. The external voltage divider ratio needed to

obtain 330V maximum output voltage should be 269 to 1. This external resistor divider network is also

used to form a low pass filter with an internal capacitor so it is important that the equivalent resistance of

the voltage divider network be 3K ohms. Table 2 shows the internal reference values used for possible

values of the capacitor charge voltage. The default value is 11.

Table 2 - Output Voltage Selection

OVS Value (Binary) Referen ce Voltage (VTRIP) Capacitor Voltage

11 1.23 330

10 1.19 320

01 1.15 310

00 1.12 300

MX881 5 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 6 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

Average Battery Current

The 3 bits (ABC2 – ABC0) of the control register are used to program the maximum average battery

current during a charge cycle. The MX881 does this by limiting the minimum off time during a switching

cycle. The off time compensates for variation of the battery voltage so that the average current is

independent of battery voltage. The default value of ABC is 101. With the default value of ABC, the

average battery current control circuits are disabled for maximum efficiency, and the maximum battery

current is approximately 220mA. The average current versus the output voltage is shown in Figure1.

The battery current peak value is preset internally to 0.7A. This current must be averaged by placing an

external bypass capacitor from VCC to ground. A 10uF capacitor is recommended for good current

smoothing and averaging.

Figure 1 - Average Battery Current

Average Battery Current Setting of 50mA (ABC = 000)

0 100 200 300 400

VCC = 3.0V

VCC = 5.5V

MX881 7 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

Average Battery Current Setting of 100mA (ABC = 001)

100

120

140

0 100 200 300 400

VCC = 3.0V

VCC = 5.5V

Average Battery Current Setting of 150mA (ABC = 010)

100

150

200

0 100 200 300 400

VCC = 3.0V

VCC = 5.5V

MX881 8 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

Serial Interface

The MX881 has a 4 wire serial interface that is capable of operating in two modes: I2C or SPI. Both

modes transfer 8 bits of information but only 5 bits are actually used to set the internal control register.

Table 3 - Interface Modes

ISEL Active Interface

1 Standard I2C slave only serial interface

0 Standard 3-wire SPI

I2C Bus Interface

The I2C interface (follows the standard bus protocol and timing as defined by Philips). For complete

information on this bus, refer to

www.semiconductors.philips.com

The MX881 acts as a slave device on the I2C bus and is compatible with both the HS (High Speed)

Mode and Fast Mode formats. Its primary function is as a receiver, receiving data from a master device

that is used to set a single 5 bit register that determines the average battery current and the output

voltage. It will act as a transmitter after receiving a read command. During a read, the register data will

be output onto the I2C bus. When receiving a non-broadcast message, the MX881 will respond with an

acknowledge bit, in which it pulls the data bus low at the appropriate time. Data packets begin with the

Master issuing a START command (S) and end with the Master issuing a STOP command (P). A Restart

command is simply another START command that is issued before a STOP command. Note that with

START and STOP commands that SDATA transitions while SCLK is high. Conversely, for all other bits,

SDATA is only allowed to transition while SCLK is low.

Figure 2 - I2C Sequences

SCLK

SDA TA

STA RT STOP

DA TA is stable during high period

of SCLK

TI2C -DS TI2C-DH

TI2C-CS TI2C-SC TI2C-CP TI2C-PC

S 0 1 1111 1 0

START

Slave Address

R/Wn

ACK

Data Byte - Written to control

The slave address is internally

fixed to 0111111 b.

0Unshaded boxes represent bits

sourced by the master . 0Shaded boxes represent bits

sourced by the MX889.

Write Sequence

Overview

STOP

S 0 1 1111 1 1

START

Slave Address

R/Wn

1 0111101

ACK

Data Byte - Register contents

placed on bus by MX889

Slave address is 0111111b.

Status

Read

Sequence

STOP

MX881 IXYS

To write to the MX881 register, the master device will first issue a Start Bit. It will then transmit a 7-bit

address. In the MX881, the address is internally set to 0111111b. If the address in the message

corresponds to the address of the MX881, the device will issue an acknowledge. The master will send 8

bits of data. These 8 bits will be written into the control register. Another Acknowledge will follow. The

write sequence is illustrated in Figure 2.

To read the control register the master issues a read command by setting the R/Wn bit. The master will

then tri-state the data bus while the MX881 outputs data. See the example in Figure 2.

3-Wire SPI (Serial Peripheral Interface)

A standard 3-wire bi-directional serial interface is available (Figure 3). The interface signals are the serial

clock: SCLK, the serial data line: SDATA, and the serial chip enable: SCEn. SDATA is bidirectional.

In write mode, the microcontroller is writing to the MX881 control register. Each packet sent contains an

8-bit command followed by 8 bits of data to be written into the register.

When SCEn goes low, the rising edge of SCLK clocks in 8 bits, MSB first. At the end of the first

transmission byte, the MX881 determines whether the first byte is a recognized command. The MX881

only recognizes one write command “00011110”. If the command is recognized, the next byte clocked

into the MX881 will be written into the control register. This sequence is illustrated in Figure 3.

In read mode, a command is received which tells the MX881 to output the control register contents. The

MX881 only recognizes one read command: “01011110”. If the correct command is recognized, the

MX881 will output 8 bits of data beginning on the first falling edge of SCLK after the rising edge of SCLK

in which the last transmission bit was clocked in. In this manner, the first control register bit will be

available to the microcontroller on the next rising edge of SCLK. SCEn must remain low while the

MX881 is outputting data, going high after the MX881 has output the last bit. While the device is

outputting data, the microcontroller must stop driving the SDATA line so that the MX881 can drive the

data onto this bus. This sequence is also illustrated in Figure 3.

Table 4 - Serial Interface Timing

Symbol Parameter Condition Min Max Units

TCYCS Cycle Time 250 nS

THI, TLO Pulse Width 50 nS

TDS Data Setup Time 50 nS

TDH Data Hold Time 30 nS

TSS SCEn Setup Time, Write 30 nS

TSH SCEn Hold Time, Write 30 nS

TACCS Read Access Time CL = 100pF 30 nS

TOHS Read Output Disable Time CL = 100pF 30 nS

TI2C_CS I2C Clock High to Start Bit 50 nS

TI2C_SC I2C Start Bit to Clock Low 50 nS

TI2C_DS I2C Data Valid to Clock High 50 nS

TI2C_DH I2C Clock Low to Data Change 30 nS

TI2C_CP I2C Clock High to Stop Bit 50 nS

TI2C_PC I2C Stop Bit to Clock Low 50 nS

MX881 9 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 10 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

Write Cy cle Timing

Read Cy cle

101 1110

Figure 3 – 3-WIRE SPI

SDATA

From

MX881

Control

SCEn

SCLK

D7 D6 D5 D4 D3 D2 D1 D0

SDATA

RTF

SCEn

SCLK

SDATA To

MX881

Read Cy cle Timing - Detailed

THI

TLO

TCYCS

TSS

TDS

TDH

TACCS TOHS

SCLK

SDATA

D7 D0

SCEn

0 0111 10

SCEn

SCLK

SDATA To

MX881

D4 D3 D2 D1 D0

D6 D5 D4 D3 D2 D1 D0

Write Cy cle

MX881 11 7/30/07

Drawing No. 088109 www.claremicronix.com

MX881 IXYS

Layout Notes

LDT565620ST-201

1.0uF

10uF

137K, 1%

133K, 1%

1K, 1%

22uF/350V

.1uF

BAV23S

VHVVCC

SCEn

SDATA

SCLK

LED_EN

DONE

DVCC

ISEL

CHARGE

FLASH

VCC

LED

IGBTGATE

SDATA

SCEn

SCLK

LED_EN

DONE

DVCC

PROG

8IGBTGATE 9

LED 10

VCC 11

VFB 12

LSEC 13

FLASH 14

CHARGE 15

ISEL 16

MX881 16 PIN DFN

VSEC

VFB

VPRI

VCC

MX881 12 7/30/07

MX881 IXYS

Layout Notes:

• Parasitic capacitance on node VSEC or VPRI will cause loss of efficiency. Keep wires on this

node as short as possible.

• Parasitic inductance on the transformer connections can cause overshoot during switching that

could damage the part. Keep connections from the capacitors and MX881 to the transformer

short.

• Also keep the connection from pin 2 of D1 to C3 as short as possible.

• The VFB node is sensitive to coupling from T1 and the VSEC node. The VSEC node ramps to

over 300 volts in just a few nano-seconds. Keep R1, R2, and R3 as far from T1 as possible. If

possible, shield resistors by placing on the other side of the board from T1.

• VCC should be well bypassed to average charge current to the battery and reduce noise to

analog circuits within MX881.

• VFB is a very fast and short pulse. Keep VFB connection to R7 short to minimize capacitance on

this node. If VFB has too much capacitance, the feedback voltage may be filtered so that the

output voltage does not stop at 330V but continues to a much higher voltage.

• A good ground plane is extremely important. Large pulse currents of 0.7 amps will be flowing in

the ground. The large bottom pad of the MX881 is the only ground pad and requires a low

impedance return to C1, C2, and R7.

• The ground plane must have adequate clearance from high voltage nodes VHV and VSEC to

avoid arcing. Also, the node connecting R1 to R2 will be at approximately 170V.

• R1 and R2 must be at least 1206 size surface mount to withstand 200V each.

Transformer

For 330V charger, the transformer should have a turns ratio of approximately 10 to insure that the fly-

back voltage on the primary side of the transformer does not damage the power switch internal to the

MX881. The fly-back voltage should be equal to the output voltage divided by the turns ratio plus the

VCC supply voltage. The fly-back voltage will be greater than this due to the energy stored in the

transformer leakage inductance. The actual voltage will depend on the transformer leakage inductance

and the parasitic capacitance of the circuits and layout.

The MX881 is designed to work with a transformer having a primary inductance of approximately 10µH.

Larger values are acceptable as long as leakage inductance is small. Smaller primary inductance values

may cause feedback pulses that are too short and lead to higher than expected output voltage.

IXYS Corporation makes no representations or warranties with respect to the accuracy or completeness of the contents of this

publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither

circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS’ Standard Terms and Conditions of Sale,

IXYS Corporation assumes no liability whatsoever, and disclaims any expressed or implied warranty, relating to its products

including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any

intellectual property right

Drawing No. 088109 www.claremicronix.com

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MX881 13 7/30/07

IXYS

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entirely embodied in this IXYS product. No circuit patent licenses nor indemnity

are expressed or implied. IXYS reserves the right to change the specification and

circuitry, without notice at any time. The products described in this document are

not intended for use in medical implantation or other direct life support

applications where malfunction may result in direct physical harm, injury or death

to a person.

Specification: MX881

Drawing No. 088109 www.claremicronix.com