APL5525BKC-TRL - Anpec Electronics Corp.

Dual Channel 500mA Regulator + Reset IC

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw1

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise

customers to obtain the latest version of relevant information to verify before placing orders.

APL5525/5526

••

• Low Quiescent Current : 130µA (No load)

••

• Low Dropout Voltage :

VDROP1=550mV@500mA

VDROP2=630mV@500mA

••

• Fixed Output Voltage :

VOUT1=3.3V/500mA

VOUT2=2.5V/500mA

••

• Stable with 4.7µF Output Capacitor

••

• Stable with Aluminum, Tantalum or Ceramic

Capacitors

••

• Reverse Current Protection

••

• No Protection Diodes Needed

••

• Built in Thermal Protection

••

• Fast Transient Response

••

• Short Setting Time

••

• SOP-8, SOP-8-P with Thermal Pad Packages

••

• Adjustment-free Reset Detection Voltage :

3.9V or 4.2V typ

• •

• Easy to Set Delay Time from Voltage

Detection to Reset Release

Features General Description

The APL5525/6 is a dual-channel regulator with reset

function (specific voltage monitoring), and internal

delay circuit, set to detect 3.9V or 4.2V. Maximum

input voltage is 6V, output1 and output2 deliver up to

500mA. VOUT1 typical dropout voltage is 550mV at

500mA loading and VOUT2 typical dropout voltage is

630mV at 500mA loading. Design with an internal P-

channel MOSFET pass transistor, the APL5525/6

maintains a low supply current. Other features include,

thermal-shutdown protection, current limit protection

to ensure specified output current. The APL5525/6

come in miniature SOP-8 and SOP-8-P packages.

Applications

• CD-ROM drive.

Pinouts

RESET GND

1

2

3

8

6

4

7

5

CONT

VIN

VDET

Cd

VOUT1

VOUT2

RESET GND

1

2

3

8

6

4

7

5

CONT

VIN

VDET

Cd

VOUT1

VOUT2

SOP-8 Top View

RESET GND

1

2

3

8

6

4

7

5

CONT

VIN

VDET

Cd

VOUT1

VOUT2

SOP-8-P Top View

APL5525 APL5526

= Thermal Pad

(connected to GND plane for better heat

dissipation)

RESET GND

1

2

3

8

6

4

7

5

CONT

VIN

VDET

Cd

VOUT1

VOUT2

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw2

APL5525/5526

Pin Description

No. Name I/O Description

1 Cd

Delay time capacitor pin, RESET pin output delay time can be set by

the capacitor connected to the Cd pin. tPLH = 130000∗C, tPLH :

transmission delay time (s), C:capacitor value (F)

RESET O Input voltage detection output pin , low = VDET<VS , high = VDET>VS

2 RESET O Input voltage detection output pin , high = VDET<VS , low = VDET>VS

3 VDET I Input pin of voltage detection.

4 VIN I Voltage supply input pin.

5 VOUT1 O Regulator output pin.

6 VOUT2 O Regulator output pin.

7 GND GND pin

8 CONT I VOUT1 on/off-control pin, VOUT1 will be turn off when CONT pull to low.

Symbol Parameter Rating Unit

VIN, V OUT Input Voltage or O ut Voltage 6.5 V

CONT VOUT1 Shutdown Control Pin 6.5 V

VDET RESET Pin Supply Voltage 6.5 V

RTH,JA T hermal R esistance – Junction to A m bient

SOP-8

SOP-8-P

160

80 °C/W

PD Pow er D issipation Internally Lim ited W

TJ O perating Junction Temperature

Control Section 0 to 125 °C

Power Transistor 0 to 150

TSTG Storage Tem perature Range -65 to +150 °C

TL Lead Temperature (Soldering, 10 second) 260 °C

Absolute Maximum Ratings

Package Code

K : SOP-8 KA : SOP-8-P

Temp. Range

C : 0 to 70 C

Ha ndling Co de

TR : Tape & R eel

D e te c tio n V o lta g e :

A : 3. 9V B : 4.2 V

Lead Free C ode

L : Lead Free Device

B la nk : O rigin a l De v ice

APL5525/6 -

APL5525/6X

XXXXX

APL5525/6 K / KA : X - Detec tion V o ltage

XXXXX - Date Code

Ha ndling Co de

Lead Free C ode

Temp. Range

Package Code

D e te c tio n V o lta g e

Ordering and Marking Information

°

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw3

APL5525/5526

APL5525/6

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VIN Input Voltage 6 V

Quiescent Current IOUT1 =0mA, IOUT2 =0mA 130 µA

IQ Shutdown Supply

Current CONT = low

IOUT2=0mA, VIN =6.0V 100 µA

ICONT Shutdown Input Bias

current VCONT =VIN 0.1 µA

High Threshold Voltage 1.6 VIN+0.3

VCONT Low Threshold Voltage -0.3 0.4 V

ICCQ VDET Input Current VDET =5V 20 40 µA

Regulator1

VOUT1 Output Voltage VIN=5V 3.234 3.3 3.366 V

ILIMIT Circuit Current Limit VIN=5V

950 mA

IOUT Load Current 500 mA

REGLINE Line Regulation VOUT+0.5V< VIN<6.0V, IOUT=10mA 4 6 mV

REGLOAD Load Regulation VIN =5V, 0mA< IOUT < IMAX 25 60 mV

VDROP Dropout Voltage(Note)

(VOUT(Nominal)=3.3V

Version) IOUT =500mA 550 650 mV

PSRR Ripple Rejection F≤1kHz, 1Vpp at IOUT=50mA 45 50 dB

Over Temperature

Shutdown 150 °C

OTS Over Temperature

Shutdown Hysteresis Hysteresis 10 °C

TC Output Voltage

Temperature

Coefficient Ta= -20 ~ 80°c 100 ppm/°C

Output Capacitor 4.7 µF

COUT ESR 0.01 1 Ohm

Regulator2

VOUT2 Output Voltage VIN=5V 2.45 2.5 2.55 V

ILIMIT Circuit Current Limit VIN=5V

950 mA

IOUT Load Current 500 mA

Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=4.7µF,

COUT2=4.7µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .

Electrical Characteristics

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw4

APL5525/5526

Electrical Characteristics (Cont.)

APL5525/6

Symbol Parameter Test Conditions Min. Typ. Max. Unit

REGLINE Line Regulation VOUT+0.5V< VIN<6.0V, IOUT=10mA 4 6 mV

REGLOAD Load Regulation VIN =5V, 0mA< IOUT < IMAX 30 50 mV

VDROP Dropout Voltage(Note)

(VOUT(Nominal)=2.5V

Version) IOUT =500mA 630 750 mV

PSRR Ripple Rejection F≤1kHz, 1Vpp at IOUT=50mA 45 52 dB

Over Temperature

Shutdown 150 °C

OTS Over Temperature

Shutdown Hysteresis Hysteresis 10 °C

TC Output Voltage

Temperature

Coefficient Ta= -20 ~ 80°c 100 ppm/°C

Output Capacitor 4.7 µF

COUT ESR 0.01 1 Ohm

RESET / RESET VDET=H!L (APL5525/6A) 3.9

VS Detection Voltage VDET=H!L (APL5525/6B) 4.2 V

△VS/△T Vs Temperature

Coefficient Ta = -20~+80°C 100 ppm/°C

△VS Hysteresis Voltage VDET = H!L 130 180 230 mV

VOL Low-level Output

Voltage VDET = 3.9V, RL = 4.7kΩ 12 60 mV

IOH Output Leakage

Current VDET = 5V 0.5 1 µA

IOL1 Output Current1 VDET =3.9V, VRESET = 0.4V 25 30 mA

IOL2 Output Current2 VDET = 3.9V, VRESET = 0.4V

Ta = -20~+80°C 20 25 mA

tPLH “H” Transmission Delay

Time Cd = 0µF 42 90 µs

tPLH1 Reset Delay Time VDET = 3.7V!5V, Cd = 0.1µF 8 13 18 ms

tPHL “L” Transmission Delay

Time Cd = 0µF 4 90 µs

VOPL Threshold Operating

Voltage VRESET = 0.4V 0.95 1.25 V

Note : Dropout voltage definition : VIN- VOUT when VOUT is 2% below the value of VOUT for VIN=5V

Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=4.7µF,

COUT2=4.7µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw5

APL5525/5526

VOUT1

VIN

GND

RESET

APL5525/6

Cd CONT

4.7kΩ

VDET

COUT1

4.7µF

(ceramic)

VOUT2 COUT2

4.7µF

(ceramic)

0.1µF

1µFRL

3.3V

2.5V

Application Circuit

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw6

APL5525/5526

Timing Chart

APL5525 APL5526

RESET

VIN. V DET

CONT

VOUT1

VOUT2

5V

Vs

5V

0V

H

L

5V

0V

5V

Vs

tPLH + tPLH1 RESET

VIN. V DET

CONT

VOUT1

VOUT2

5V

Vs

5V

0V

H

L

5V

0V

5V

Vs

tPLH + tPLH1

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw7

APL5525/5526

0

20

40

60

80

100

120

140

160

0123456

IOUT1=IOUT2=0mA

0

0.5

1

1.5

2

2.5

3

3.5

012345

3.280

3.285

3.290

3.295

3.300

3.305

3.310

-25 0 25 50 75 100 125

2.492

2.494

2.496

2.498

2.500

2.502

2.504

2.506

2.508

0

100

200

300

400

500

600

0100 200 300 400 500

Quiescent Current vs. Output Current

Output Current (mA)

VIN = 5V

Quiescent Current vs. Input V oltage

Quiescent Current (µA)

Input Voltage (V)

Quiescent Current (µA)

VOUT1

VOUT2

Input Voltage (V)

Output V oltage vs. Input V oltage

Output V oltage (V)

Output V oltage vs. Temperature

Temperature (°C)

VOUT1 (V)

IOUT1 = IOUT2 = 0mA

Typical Characteristics

VOUT1

VOUT2

VOUT1

VOUT2 (V)

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw8

APL5525/5526

-80

+0

-70

-60

-50

-40

-30

-20

-10

10 100k

100 1k 10k

0

100

200

300

400

500

600

700

0100 200 300 400 500

Dropout Voltage vs. Output Current PSRR vs. Frequency

Load-Transient Response

Output Current (mA) Frequency (Hz)

Time(0.1m/div)

Time (0.1m/div)

Dropout V oltage (mV)

PSRR (dB)

VIN = 5V

IOUT1 = IOUT2 = 50mA

VOUT1(200mV/div)

VOUT1

VOUT2

VOUT1

IOUT1=1mA ~ 500mA

COUT1=4.7uF

Typical Characteristics

VOUT2(200mV/div)

IOUT2=1mA ~ 500mA

COUT2=4.7uF

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw9

APL5525/5526

Shutdown Response

T ime (1ms/div)

VOUT1 (2v/div)

VOUT2

CONT(2v/div)

Typical Characteristics

RLOAD = 100 Ω

Line-T ransient Response

VIN = 4.5 ~ 5.5V

VOUT1(20mV/div)

IOUT1=10mA

COUT1=4.7uF

VOUT2(20mV/div)

IOUT2=10mA

COUT2=4.7uF

Time(20µs/div)

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw10

APL5525/5526

Application Information

Capacitor Selection and Regulator Stabil-

ity

The APL5538 uses at least a 1uF capacitor on the

input. This capacitor can use Aluminum, Tantalum or

Ceramic capacitors. Input capacitor with large value

and low ESR provides better PSRR and line-transient

response. The output capacitor also can use

Aluminum, Tantalum or Ceramic capacitors, and it’s

minimum values is recommended 4.7uF, ESR muse

be above 0.01Ω. Large output capacitor values can

reduce noise and improve load-transient response,

stability, and PSRR. Note that some ceramic dielec-

trics exhibit large capacitance and ESR variation with

Temperature. If use this capacitor, it may be neces-

sary to use 4.7uF or more to ensure stability at tem-

perature below -10°C.

Load-T ransient Considerations

The APL5538 load-transient response graphs in T ypi-

cal Characteristics show the transient response. A

step change in the load current from 1mA to 500mA

at 1u second will cause less than 300mV transient

spike. Large output capacitor’s value and low ESR

can reduce transient spike.

Shutdown/Enable

The APL5538 has an active high enable function. Force

CONT high (>1.6V) enables the VOUT1 , CONT low (<0.

4V) disables the VOUT1 and VOUT2 can not be affected

by CONT. Enter the shutdown mode, it also causes

the output voltage to discharge through a 500 Ω resis-

tance to ground. In shutdown mode, the quiescent

current can reduce to 100uA. The CONT pin cannot

be floating, a floating CONT pin may cause an inde-

terminate state on the output. If it is no use, connect

to VIN for normal operation.

RESET

The RESET pin is asserted whenever VDET falls below

the reset threshold voltage or if CONT is forced low at

some special IC(refer timing chart and pin description).

The reset function ensures the microprocessor is prop-

erly reset and powers up into a known condition after

a power failure. RESET will remain valid with VIN as

low as 0.95V. The RESET output is a simple open-

drain N channel MOSET structure. A pull-up resistor

must be used to pull this output up to some voltage.

For most application, this voltage will be the same

power supply that supplies VIN to the APL5538. The

APL5538 is relatively immune to negative-going

glitches below the reset threshold. Typically reset delay

time is 13ms while using o.1uF at Cd pin. If more

transient immunity is needed, a Cd capacitor can be

placed as larger as possible.

Input-Output (Dropout)V oltage

The minimun input-output voltage differential (dropout)

determines the lowest usable supply voltage. The drop-

out voltage is a function of drain-to-source on resis-

tance multiplied by the load current.

Current Limit

APL5538 includes two separate current-limit circuitry

for each linear regulator. The current limit protection,

which sense the current flows the P-channel MOSFET,

and controls the output voltage. The point where limit-

ing occurs is IOUT=950mA. The output can be shorted

to ground for an indefinite amount of time without dam-

aging to the part.

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw11

APL5525/5526

Application Information

Thermal Protection

Thermal protection limits total power dissipation in the

APL5538. When the junction temperature exceeds

TJ=+150°C, the thermal sensor generate a logic sig-

nal to turn off the pass transistor and let IC to cool.

When the IC’s junction temperature cools by 10°C,

the thermal sensor will turn the pass transistor on again,

resulting in a pulsed output during continuous thermal

protection. Thermal protection is designed to protect

the IC in the event of fault conditions. For continual

operation, do not exceed the absolute maximum junc-

tion temperature rating of TJ=+150°C.

Operating Region and Power Dissipation

The thermal resistance of the case and circuit board,

ambient and junction air temperature, and the rate of

air flow all control the APL5538 maximum power

dissipation. The power dissipation across the device

is P = IOUT (VIN-VOUT). The maximum power dissipation

is:

PMAX = (TJ-TA) / (θJB +θBA )

where TJ-TA is the temperature difference between the

junction and ambient air.

θJB is the thermal resistance of the package, θBA is the

thermal resistance through the printed circuit board,

copper traces, and other materials to the surrounding

air. The GND pin provides an electrical connection to

ground and channeling heat away. Connect the GND

pin to ground using a large pad or ground plane as a

heat sink, it can improve maximize thermal dissipation.

See figure 1. The SOP-8-P utilizes a bottom thermal

pad to minimize the thermal resistance of the package,

making the package suitable for high current

applications. The thermal pad is soldered to the top

ground pad and is connected to the internal or bottom

ground plane by several vias. The printed circuit board

(PCB) forms a heat sink and dissipates most of the

heat into ambient air. The vias are recommended to

have proper size to retain solder, helping heat

conduction.

Thermal

pad

Die Top

ground

pad

Printed

circuit

board

Internal

ground

plane

Vias

Ambient

Air

118 mil

102 mil

SOP-8-P

Figure 1

Figure 2 shows a board layout using the SOP-8-P

package. The demo board is made of FR-4 material

and is a two-layer PCB.

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw12

APL5525/5526

Application Information

Top layer

Bottom layer

Figure 2

The data in Table1 was taken using 1/16” FR-4 board

with 2OZ. Copper foil.

COPPER AREA

TOPSIDE BACKSIDE BOARD

AREA

HEA T

SINK

AREA PD(max)

JUNCTION

RESISTANCE

(JUNCTION-TO-

AMBIENT)

825

Sq. mm

4125

Sq. mm

5200

Sq. mm

24

Sq. mm 2.2W 57 ℃/w

0 3750

Sq. mm

5600

Sq. mm 0 1.3W 96 ℃/w

Table-1

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw13

APL5525/5526

Packaging Information

SOP-8 pin ( Reference JEDEC Registration MS-012)

HE

e1 e2

0.015X45

D

A

A1

0.004max.

1

L

Millimeters Inches

Dim Min. Max. Min. Max.

A 1.35 1.75 0.053 0.069

A1 0.10 0.25 0.004 0.010

D 4.80 5.00 0.189 0.197

E 3.80 4.00 0.150 0.157

H 5.80 6.20 0.228 0.244

L 0.40 1.27 0.016 0.050

e1 0.33 0.51 0.013 0.020

e2 1.27BSC 0.50BSC

φ 1 8° 8°

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw14

APL5525/5526

SOP-8-P pin ( Reference JEDEC Registration MS-012)

Packaging Information

HE

e1 e2

0.015X45

D

A

A1

0.004max.

1

L

E1

D1

Millimeters Inches

Dim Min. Max. Min. Max.

A 1.35 1.75 0.053 0.069

A1 0.10 0.25 0.004 0.010

D 4.80 5.00 0.189 0.197

D1 3.00REF 0.118REF

E 3.80 4.00 0.150 0.157

E1 2.60REF 0.102REF

H 5.80 6.20 0.228 0.244

L 0.40 1.27 0.016 0.050

e1 0.33 0.51 0.013 0.020

e2 1.27BSC 0.50BSC

φ 18°8°

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw15

APL5525/5526

Physical Specifications

Terminal Material Solder-P lated Cop per (S o lder Ma terial : 90/10 or 63/37 SnP b), 100%S n

Le a d S o lde r ab ility M e e ts EI A S p ec if ic a tion R S I8 6- 9 1 , AN S I/J - S T D- 00 2 C a teg o ry 3.

Reflow Condition (IR/Convection or VPR Reflow)

t 2 5 C to Pe a k

tp

Ramp-up

tL

Ramp-down

ts

Preheat

Tsmax

Tsmin

TL

TP

25

Temperature

Time

Critical Z one

TL to TP

°

Classificatin Reflow Profiles

Sn-Pb Eutectic Assembly Pb-Free Assembly

Profile Feature Large Body Small Body Large Body Small Body

Average ramp-up rate

(TL to TP) 3°C/second max. 3°C/second max.

Preheat

- Temperature Min (Tsmin)

- Temperature Mix (Tsmax)

- Time (min to max)(ts)

100°C

150°C

60-120 seconds

150°C

200°C

60-180 seconds

Tsmax to TL

- Ramp-up Rate 3°C/second max

Tsmax to TL

- Temperature(TL)

- Time (tL)

183°C

60-150 seconds

217°C

60-150 seconds

Peak Temperature(Tp) 225 +0/-5°C 240 +0/-5°C 245 +0/-5°C 250 +0/-5°C

Time within 5°C of actual Peak

Temperature(tp) 10-30 seconds 10-30 seconds 10-30 seconds 20-40 seconds

Ramp-down Rate 6°C/second max. 6°C/second max.

Time 25°C to Peak Temperature

6 minutes max. 8 minutes max.

Note: All temperatures refer to topside of the package. Measured on the body surface.

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw16

APL5525/5526

Test item Me th o d Desc ription

SOLDERABILITY MIL-STD-883D-2003

245°C, 5 SEC

HOLT MIL-STD-883D-1005.7

1000 H rs B ias @ 1 25°C

PCT JESD-22-B,A102

168 H rs, 100%RH, 121°C

TST MIL-STD-883D-1011.9

-65°C~150°C, 200 C ycles

ESD MIL-STD-883D- 301 5.7 VH BM > 2KV, VMM > 200V

Latch-Up JESD 7 8 10ms, 1tr > 100mA

Carrier Tape

A

J

B

T2

T1

C

t

Ao

E

W

Po P

Ko

Bo

D1

D

F

P1

Reliability Test Program

Copyright  ANPEC Electronics Corp.

Rev. A.4 - Feb., 2004 www.anpec.com.tw17

APL5525/5526

A pplication A B C J T1 T2 W P E

330 ± 1 62 +1.5 12.75+

0.15 2 ± 0.5 12.4 ± 0.2 2 ± 0.2 12± 0. 3 8± 0.1 1.75±0.1

F D D1 Po P1 Ao Bo Ko t

SOP - 8/-P

5.5± 1 1.55 +0.1 1.55+ 0.25

4.0 ± 0.1 2.0 ± 0.1 6.4 ± 0.1 5.2± 0. 1

2.1± 0.1 0.3±0.013

Application Carrier Width Cover Tape Width Devices Per Reel

SOP- 8/-P 12 9.3 2500

Cover Tape Dimensions

Anpec Electronics Corp.

Head Office :

5F, No. 2 Li-Hsin Road, SBIP,

Hsin-Chu, Taiwan, R.O.C.

Tel : 886-3-5642000

Fax : 886-3-5642050

Taipei Branch :

7F, No. 137, Lane 235, Pac Chiao Rd.,

Hsin T ien City, Taipei Hsien, Taiwan, R. O. C.

Tel : 886-2-89191368

Fax : 886-2-89191369

Customer Service

Reel Dimensions

(mm)