LTC2960
1
2960fa
For more information www.linear.com/LTC2960
Typical applicaTion
FeaTures DescripTion
36V Nano-Current
Two-Input Voltage Monitor
The LT C
®
2960 is a nano-current, high voltage two-input
voltage monitor, ideally suited for multicell battery ap-
plications. External resistive dividers configure custom
comparator thresholds. The supervisory circuit monitors
the ADJ input and pulls the RST output low when the input
drops below threshold. A reset timeout period delays the
return of the RST output to a high state when the input
rises above the threshold. The spare comparator allows
voltage conditions to be detected with either a non-inverting
input, IN+(LTC2960-1/LTC2960-3) or an inverting input,
IN– (LTC2960-2/LTC2960-4). A manual reset (MR) input
is provided for external activation of the reset output.
Other options provided on the LTC2960-1/LTC2960-2 in-
clude a reset timeout period select pin, RT, to select between
15ms or 200ms reset timeout periods. The LTC2960-3/
LTC2960-4 have a fixed 200ms reset timeout period. The
RST and OUT outputs are available with active pull-up cir-
cuits to an output logic supply pin (LTC2960-3/LTC2960-4)
or 36V open-drain outputs (LTC2960-1/LTC2960-2).
Battery and Regulator Monitor Supply Current vs Supply Voltage
applicaTions
n 850nA Quiescent Current
n Operating Range: 2.5V < VCC < 36V
n 1.5% (Max) Accuracy Over Temperature
n Adjustable Reset Threshold
n Wide Temperature Range (–40°C to 125°C)
n Adjustable IN+/IN– Threshold
n Manual Reset Input
n Compact 2mm × 2mm 8-lead DFN and
TSOT-23 (ThinSOT™) Packages
n Portable Equipment
n Battery Powered Equipment
n Security Systems
n Automotive Systems
L, LT , LT C , LT M , Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
LTC2960 Option Table
Option Inputs Reset Timeout Period Output Type
LTC2960-1 ADJ/IN+15ms/200ms 36V Open-Drain
LTC2960-2 ADJ/IN–15ms/200ms 36V Open-Drain
LTC2960-3 ADJ/IN+200ms Active Pull-Up
LTC2960-4 ADJ/IN–200ms Active Pull-Up
+
VCC
IN+
DVCC
GND
RST
OUT
ADJMR
LTC2960-3
LTC3632
DC/DC
GND
Li-Ion
4.2V
+
Li-Ion
4.2V
C1
0.1µF
50V
C2
1µF
R2
6.04M
R1
402k
6V < VIN < 8.4V
R4
1.3M
R3
402k
VOUT
1.8V
RESET
LOW BATTERY
POWER-FAIL FALLING THRESHOLD = 6.410V
RESET FALLING THRESHOLD = 1.693V
2960 TA01
VCC (V)
0
0
ICC (nA)
900
600
300
1200
40328 16
2960 TA01a
24
MR=5V, 27C
LTC2960
2
2960fa
For more information www.linear.com/LTC2960
absoluTe MaxiMuM raTings
Input Voltages
VCC, RT, MR .......................................... –0.3V to 40V
DVCC ........................................................ –0.3V to 6V
ADJ, IN+, IN– ......................................... –0.3V to 3.5V
Output Voltages (LTC2960-1/LTC2960-2)
RST, OUT ............................................... –0.3V to 40V
Output Voltages (LTC2960-3/LTC2960-4)
RST, OUT (DVCC ≥ 1.6V) ......... –0.3V to (DVCC + 0.3V)
RST, OUT (DVCC = GND) ....................... –0.3V to 6.3V
(Notes 1 & 2)
TOP VIEW
VCC
RT/DVCC
RST
OUT
IN+/IN–
ADJ
MR
GND
DC8 PACKAGE
8-LEAD (2mm × 2mm) PLASTIC DFN
9
4
1
2
36
5
7
8
TJMAX = 150°C, qJA = 80.6°C/W
EXPOSED PAD (PIN 9) PCB GND
CONNECTION OPTIONAL
1
2
3
4
8
7
6
5
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
VCC
RT/DVCC
RST
OUT
IN+/IN–
ADJ
MR
GND
TJMAX = 150°C, qJA = 195°C/W
pin conFiguraTion
orDer inForMaTion
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC2960CDC-1#TRMPBF LTC2960CDC-1#TRPBF LFZZ 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC2960IDC-1#TRMPBF LTC2960IDC-1#TRPBF LFZZ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC2960HDC-1#TRMPBF LTC2960HDC-1#TRPBF LFZZ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C
LTC2960CDC-2#TRMPBF LTC2960CDC-2#TRPBF LGBC 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC2960IDC-2#TRMPBF LTC2960IDC-2#TRPBF LGBC 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC2960HDC-2#TRMPBF LTC2960HDC-2#TRPBF LGBC 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C
LTC2960CDC-3#TRMPBF LTC2960CDC-3#TRPBF LFSF 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC2960IDC-3#TRMPBF LTC2960IDC-3#TRPBF LFSF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC2960HDC-3#TRMPBF LTC2960HDC-3#TRPBF LFSF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C
LTC2960CDC-4#TRMPBF LTC2960CDC-4#TRPBF LGBF 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC2960IDC-4#TRMPBF LTC2960IDC-4#TRPBF LGBF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC2960HDC-4#TRMPBF LTC2960HDC-4#TRPBF LGBF 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C
Average Currents
RST, OUT ...........................................................±5mA
Operating Ambient Temperature Range
LTC2960C ................................................ 0°C to 70°C
LTC2960I .............................................–40°C to 85°C
LTC2960H .......................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TSOT-23 Package .............................................300°C
LTC2960
3
2960fa
For more information www.linear.com/LTC2960
orDer inForMaTion
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC2960CTS8-1#TRMPBF LTC2960CTS8-1#TRPBF LTFZY 8-Lead Plastic TSOT-23 0°C to 70°C
LTC2960ITS8-1#TRMPBF LTC2960ITS8-1#TRPBF LTFZY 8-Lead Plastic TSOT-23 –40°C to 85°C
LTC2960HTS8-1#TRMPBF LTC2960HTS8-1#TRPBF LTFZY 8-Lead Plastic TSOT-23 –40°C to 125°C
LTC2960CTS8-2#TRMPBF LTC2960CTS8-2#TRPBF LTGBB 8-Lead Plastic TSOT-23 0°C to 70°C
LTC2960ITS8-2#TRMPBF LTC2960ITS8-2#TRPBF LTGBB 8-Lead Plastic TSOT-23 –40°C to 85°C
LTC2960HTS8-2#TRMPBF LTC2960HTS8-2#TRPBF LTGBB 8-Lead Plastic TSOT-23 –40°C to 125°C
LTC2960CTS8-3#TRMPBF LTC2960CTS8-3#TRPBF LTFSD 8-Lead Plastic TSOT-23 0°C to 70°C
LTC2960ITS8-3#TRMPBF LTC2960ITS8-3#TRPBF LTFSD 8-Lead Plastic TSOT-23 –40°C to 85°C
LTC2960HTS8-3#TRMPBF LTC2960HTS8-3#TRPBF LTFSD 8-Lead Plastic TSOT-23 –40°C to 125°C
LTC2960CTS8-4#TRMPBF LTC2960CTS8-4#TRPBF LTGBD 8-Lead Plastic TSOT-23 0°C to 70°C
LTC2960ITS8-4#TRMPBF LTC2960ITS8-4#TRPBF LTGBD 8-Lead Plastic TSOT-23 –40°C to 85°C
LTC2960HTS8-4#TRMPBF LTC2960HTS8-4#TRPBF LTGBD 8-Lead Plastic TSOT-23 –40°C to 125°C
Consult LT C Marketing for parts specified with wider operating temperature ranges.
Consult LT C Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics
The l denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C, VCC = 7V, DVCC = 3.3V unless otherwise noted (Note 2).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC VCC Input Supply Operating Range l2.5 36 V
VUVLO VCC Undervoltage Lockout
VCC Undervoltage Lockout Hysteresis
VCC Rising l1.85
100
2.3 V
mV
ICC VCC Input Supply Current MR = 5V, VCC = 36V, –40°C ≤ TA ≤ 85°C
MR = 5V, VCC = 36V, –40°C ≤ TA ≤ 125°C
l
l
400
400
850
850
1250
2000
nA
nA
DVCC DVCC Input Supply Operating Range l1.6 5.5 V
IDVCC DVCC Input Current RST = OUT = LOW DVCC = 5.5V l±50 nA
THRESHOLD ADJUSTMENT INPUTS: ADJ, IN+/IN–
VTH ADJ/IN+ Input Threshold
IN– Input Threshold
Monitored Voltage Falling
Monitored Voltage Rising
l
l
394
394
400
400
406
406
mV
mV
VTHM ADJ to IN+/IN– Threshold Matching l±2 ±6 mV
VRHYS ADJ Threshold Hysteresis Monitored Voltage Rising l8 10 15 mV
V+HYS IN+ Threshold Hysteresis Monitored Voltage Rising l18 20 25 mV
V–HYS IN– Threshold Hysteresis Monitored Voltage Falling l18 20 25 mV
tUV Under Voltage Detect to RST, OUT Falling V = VTH – 40mV l80 170 500 µs
ITH(LKG) Input Leakage Current V = 420mV, –40°C ≤ TA ≤ 85°C
V = 420mV, –40°C ≤ TA ≤ 125°C
l
l
±0.1
±0.1
±1
±10
nA
nA
LTC2960
4
2960fa
For more information www.linear.com/LTC2960
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
The l denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C, VCC = 7V, DVCC = 3.3V unless otherwise noted (Note 2).
Note 2. All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Typical perForMance characTerisTics
Supply Current vs Supply Voltage MR Current vs MR Voltage Supply Current vs MR Voltage
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CONTROL INPUTS: MR, RT
VRT Control Input Threshold RT l0.4 1.4 V
VMR Control Input Threshold MR l0.4 1.4 V
tPW MR Minimum Detectable Pulse Width l20 µs
tPD Propagation Delay to RST Falling Manual Reset Falling l1 7 20 µs
VMR Manual Reset Open Voltage MR Open, MR Load = 100nA l2.6 4 V
IMR Manual Reset Low Current MR = 400mV, VCC ≥ 2.5V l–0.35 –1 –3 µA
ILK Input Leakage Current RT = 15V
MR = 15V
l
l
±100
±100
nA
nA
STATUS OUTPUTS: RST, OUT
VOL Voltage Output Low VCC = 1.2V, I = 10µA (LTC2960-1/LTC2960-3)
VCC = 3V, I = 500µA
l
l
25
100
100
400
mV
mV
VOH Voltage Output High I = –100µA (LTC2960-3/LTC2960-4) l0.7•DVCC V
IOH Leakage Current, Output High V = 5.5V
V = 15V (LTC2960-1/LTC2960-2)
V = 5.5V, DVCC = GND
l
l
l
±50
±100
±50
nA
nA
nA
ISC Output Short-Circuit Current RST = GND DVCC = 6V (LTC2960-3/ LTC2960-4)
OUT = GND DVCC = 6V (LTC2960-3/ LTC2960-4)
l
l
0.8
0.8
3
3
mA
mA
tRST Reset Timeout Period LTC2960-3/LTC2960-4
RT Input High
RT Input Low
l
l
l
140
140
10
200
200
15
280
280
25
ms
ms
ms
VCC(V)
0
0
ICC (nA)
1200
900
600
300
1500
24 32 408 16
2960 G01
125°C
90°C
27°C
–45°C
MR VOLTAGE (V)
0
0
MR CURRENT (µA)
1.2
1.0
0.8
0.6
0.4
0.2
4321 5
2960 G02
VCC = 2.5V
VCC = 7V
MR VOLTAGE (V)
0
0
MR CURRENT (µA)
2.5
2.0
1.5
1.0
0.5
4321 5
2960 G03
VCC = 2.5V
VCC = 7V
LTC2960
5
2960fa
For more information www.linear.com/LTC2960
Typical perForMance characTerisTics
MR Rising Threshold/Open
Voltage vs VCC
Normalized Reset Timeout Period
vs Temperature
Comparator Overvoltage/
Undervoltage Glitch Immunity
ADJ, IN+, IN– Threshold
vs Temperature
Voltage Output HIGH vs
Pull-Down Current (RST/OUT)
Voltage Output LOW vs
Pull-Up Current (RST/OUT)
Voltage Output HIGH vs
Pull-Down Current (RST/OUT)
VCC (V)
2.5
0.4
2.4
1.9
1.4
0.9
4.53.5 4.03.0 5.0
2960 G04
MR OPEN VOLTAGE 27°C
MR INPUT THRESHOLD 27°C
RISING THRESHOLD/OPEN VOLTAGE (V)
TEMPERATURE (°C)
–50
0.7
1.3
1.1
1.2
0.9
1.0
0.8
10050 750 25–25 125
2960 G05
NORMALIZED RESET TIME PERIOD
VCC = 7V
COMPARATOR OVERDRIVE (%)
0.1
0.0
4.0
3.0
1.0
2.0
101 100
2960 G06
GLITCH DURATION (ms)
ADJ/IN+/IN–
VCC = 7V
TEMPERATURE (°C)
–50
370
430
410
420
400
390
380
755025–25 1000 125
2960 G07
VTH (mV)
V+HYS
VRHYS
VTH
V–HYS
PULL-DOWN CURRENT(mA)
0
0
3.5
2.0
3.0
1.5
2.5
1.0
0.5
–0.6–0.4–0.2 –0.8
2960 G08
VOH (V)
–45°C
27°C
90°C
125°C
V
CC
=7V
DV
CC
=3.3V
PULL-UP CURRENT (mA)
0
0
2.0
1.6
1.2
0.8
0.4
321 4 5
2960 G09
VOL (V)
V
CC
=7V
DV
CC
=3.3V
–45°C
27°C
90°C
125°C
PULL-DOWN CURRENT(µA)
0
0
2.0
1.6
1.2
0.8
0.4
–40–20 –60 –80
2960 G08
VOH (V)
–45°C
27°C
90°C
125°C
V
CC
=7V
DV
CC
=1.6V
LTC2960
6
2960fa
For more information www.linear.com/LTC2960
pin FuncTions
ADJ: Reset Threshold Adjustment Input. Tie to resistive
divider to configure desired reset threshold.
DVCC: (LTC2960-3/LTC2960-4) Logic Supply Input. Used
for setting the logic swing of the RST and OUT outputs.
Useful for interfacing with logic voltages different from
VCC. Bypass DVCC with 0.1µF to GND. Grounding DVCC
allows OUT and RST to act as open drain outputs.
Exposed Pad (DFN Only): Exposed pad may be left floating
or connected to device ground.
GND: Device ground.
IN–: (LTC2960-2/LTC2960-4) IN– Threshold Adjustment
Input. Tie to resistive divider to configure required thresh-
old. Tie to GND if unused.
IN+: (LTC2960-1/LTC2960-3) IN+ Threshold Adjustment
Input. Tie to resistive divider to configure required thresh-
old. Tie to GND if unused.
MR: Manual Reset Input. Attach a push-button switch or
logic signal between this input and ground. A logic low on
this input pulls RST low. When the MR input returns to
logic high, RST returns high after a reset timeout period
has expired. Leave open if unused.
OUT: (LTC2960-1/LTC2960-3) Pulls low when monitored
voltage falls below the IN+ threshold. Released when
the IN+ voltage rises above its threshold by 5%. For the
LTC2960-3, OUT is driven by DVCC when logic high. OUT
is open drain if DVCC is grounded. Leave open if unused.
(LTC2960-2/LTC2960-4) OUT pulls low when the moni-
tored voltage rises above the IN– threshold. Released when
monitored voltage falls below IN– threshold by 5%. For the
LTC2960-4, OUT is driven to DVCC for a logic high. OUT
is open drain if DVCC is grounded. Leave open if unused.
RST: Reset Output. Pulls low when monitored voltage falls
below the reset (ADJ) threshold. RST is released after
monitored voltage exceeds the reset threshold plus 2.5%
hysteresis and after reset timeout period has expired. For
the LTC2960-3/LTC2960-4, RST is driven to DVCC for a
logic high. RST is open drain if DVCC is grounded. Leave
open if unused.
RT: (LTC2960-1/LTC2960-2) Reset Timeout Period Se-
lection Input. Tie to GND for 15ms delay. Tie to VCC for
200ms delay.
VCC: Power Supply Input. When VCC falls below the falling
UVLO threshold, the outputs are pulled low. If VCC falls
below 1.2V the logic state of the outputs cannot be guar-
anteed. Bypass VCC with 0.1µF to GND. Use appropriate
voltage rating for bypass capacitor.
LTC2960
7
2960fa
For more information www.linear.com/LTC2960
block DiagraM
TiMing DiagraM
+
–
REGULATOR 400mV
REFERENCE
RESET
DELAY
VCC
MR
RST
OUT
IN+ (LTC2960-1/LTC2960-3)
IN– (LTC2960-2/LTC2960-4)
ADJ
1µA
0.4V
GND
RT
LTC2960-1/LTC2960-2
DVCC
LTC2960-3/LTC2960-4
0.4V
LTC2960-2/LTC2960-4
LTC2960-1/LTC2960-3
+
–
2960 BD
IN+/OUT TIMING
IN–/OUT TIMING
ADJ/RST TIMING
VTH + V+HYS
VTH
VTH + VRHYS
VTH
VTH
VTH + V–HYS
VIN+
VADJ
tPD
tRST tRST
VIN–
OUT
RST
MR
OUT
2960 TD
LTC2960
8
2960fa
For more information www.linear.com/LTC2960
VOLTAGE MONITORING
The LTC2960 is a voltage supervisor with a wide operating
voltage range up to 36V with only 850nA quiescent current.
The supervisor has two outputs, RST and OUT that pro-
vide voltage monitoring capabilities for system power-up,
power-down and brown-out conditions. Built-in hysteresis
and a reset timeout period ensure that fluctuations due to
load transients or supply noise do not cause chattering of
the status outputs. The LTC2960 can provide reset and
voltage status signals to a microprocessor based system
or can alternatively be used as an Under Voltage Lock Out
(UVLO) for DC/DC switchers or LDOs for control over a
battery operated system.
If the monitored voltage drops below the reset threshold,
RST pulls low until the ADJ input rises above 0.4V plus
2.5% hysteresis. An internal reset timer delays the return
of the RST output to a high state to provide monitored
voltage settling and initialization time. The RST output is
typically connected to a processor reset input.
If the monitored supply voltage falls to the IN+ (LTC2960-1/
LTC2960-3) threshold, the spare comparator pulls OUT low.
OUT remains low until the IN+ input rises above 0.4V plus
5% hysteresis. OUT is typically used to signal preparation
for controlled shutdown. For example, the OUT output
may be connected to a processor nonmaskable interrupt
(NMI). Upon interrupt, the processor begins shutdown
procedures such as supply sequencing and/or storage/
erasure of system state in nonvolatile memory.
If the monitored supply voltage rises to the IN– threshold
(LTC2960-2/LTC2960-4), the spare comparator pulls OUT
low. OUT remains low until the IN– falls below 0.4V minus
5% hysteresis. The LTC2960-2/LTC2960-4 operates as an
undervoltage and overvoltage monitor.
Few, if any, external components are necessary for reliable
operation. However, a decoupling capacitor between VCC
and ground is recommended (0.01µF minimum). Use a
capacitor with a compatible voltage rating.
applicaTions inForMaTion
THRESHOLD CONFIGURATION
The LTC2960 monitors voltage applied to its inputs IN+/IN–
and ADJ. A resistive divider connected between a monitored
voltage and ground is used to bias the inputs. Figure 1
demonstrates how the inputs can be made dependent upon
a single voltage (V1). Only three resistors are required.
To calculate their values, specify desired falling reset (VR)
and IN+ (VIN+) thresholds with VIN+ > VR. For example:
VIN+ = 6.4V, VR = 6V
Figure 1. Configuration for Single Voltage Monitoring
ADJ
IN+
RST
OUT
LTC2960-1/
LTC2960-3
R3
R2
V1
R1
2960 F01
The solution for R1, R2 and R3 provides three equations
and three unknowns. Maximum resistor size is governed
by maximum input leakage current. For the LTC2960, the
maximum input leakage current below 85°C is 1nA. For
a maximum error of 1% due to both input currents, the
resistor divider current should be at least 100 times the
sum of the leakage currents, or 0.2µA. If the total divider
resistance is chosen arbitrarily to be 8MΩ, such as in this
example, then the current is 750nA at the reset threshold.
This results in a leakage current error well below 1%.
For RSUM = 8MΩ, then:
RSUM = R1 + R2 + R3
Both the falling reset and IN+ thresholds are 0.4V, so:
R1=
V
TH
•R
SUM
V
IN+=
0.4V •8MΩ
6.4V =500k
The closest 1% value is 499k. R2 can be determined from:
R2 =
V
TH
•R
SUM
V
R
– R1=
0.4V •8MΩ
6V – 499k
R2 = 34.33k
LTC2960
9
2960fa
For more information www.linear.com/LTC2960
Figure 2. Dual Voltage Monitoring
The closest 1% resistor value is 34k. R3 is easily obtained
from:
R3 = RSUM – R1 – R2 = 8M – 499k – 34k
R3 = 7.467MΩ
The closest 1% resistor value is 7.5MΩ. Plugging the
standard values back into the equations yields the design
values for the falling reset and IN+ voltages:
VIN+ = 6.4V, VRST = 6.028V
Figure 2 demonstrates how the inputs can be biased
to monitor two voltages (V1, V2). In this example, four
resistors are required. Calculate each divider ratio for the
desired falling threshold (VFT) using:
RnB
RnA =
V
FT
V
TH
– 1=
V
FT
0.4V –
1
In Figure 2, OUT is tied back to the MR input, making the
state of the RST output dependent upon both V1 and V2. If
V1 and V2 are both above the configured falling threshold
plus hysteresis, RST is allowed to pull high. If independent
operation of the status outputs is desired, simply omit the
OUT and MR connection.
applicaTions inForMaTion
Figure 3. OUT vs VCC (LTC2960-1) Externally Configured for
6V Threshold with RST Tied to VCC Through Pull-Up Resistor
ADJ
IN+
RST
OUT
MR
LTC2960-1/
LTC2960-3
R2B
V2
R2A
R1B
V1
R1A
2960 F02
SELECTING OUTPUT LOGIC STYLE
The LTC2960 status outputs are available in two options:
open-drain (LTC2960-1/LTC2960-2) or active pull-up with
the DVCC pin replacing the RT pin (LTC2960-3/LTC2960-4).
The open-drain option allows the outputs to be pulled up
VCC (V)
0
0
OUT (V)
6
3
4.5
1.5
7.5
7.51.5 3
2960 F03
4.5 6
to a user defined voltage up to 36V with a resistor. The
open-drain pull-up voltage may be greater than VCC. Select
a resistor compatible with desired output rise time and
load current specifications. Figure 3 demonstrates typical
LTC2960-1 OUT output behavior. When the status outputs
are low, power is dissipated in the pull-up resistors.
The outputs of both the LTC2960-3 and LTC2960-4 can
be configured as either low voltage active pull-up or open-
drain. This is done by tying the DVCC pin to either a supply
or GND. Using the active pull-up configuration, DVCC tied
to a supply, lowers power dissipation by eliminating the
static current drawn by pull-up resistors when the outputs
are low and improves output rise time. In Figure 4(a), an
LTC2960-3 has active pull-up outputs configured by tying
DVCC to a 1.6V to 5.5V supply. In Figure 4(b), the LTC2960-3
has open-drain outputs configured by tying the DVCC pin to
ground. When DVCC is connected to ground both outputs
are open-drain and pull-up resistors are required.
Some applications require RST and/or OUT outputs to
be valid with VCC down to ground when DVCC is tied to
VCC. Active pull-up satisfies this requirement with the ad-
dition of an optional external resistor from the output to
ground. The resistor provides a path for leakage currents,
preventing the output from floating to undetermined volt-
ages when connected to high impedance (such as CMOS
logic inputs). The resistor value should be small enough to
provide effective pull-down without excessively loading the
LTC2960
10
2960fa
For more information www.linear.com/LTC2960
applicaTions inForMaTion
pull-up circuitry. A 100k resistor from output to ground is
satisfactory for most applications. When the status outputs
are high, power is dissipated in the pull-down resistors.
If VCC falls below the falling UVLO threshold, the outputs
are pulled to ground. The outputs are guaranteed to stay
low for VCC ≥ 1.2V regardless of the output logic configura-
tion. When VCC < 1.2V, the active pull-up output behaves
similarly to an open-drain output with a pull-up resistor.
and MR is a solution to this issue. The MR input can be
pulled to 36V maximum and will not affect the internal
circuitry. Input MR is often pulled down through the use
of a pushbutton switch.
SELECTING THE RESET TIMEOUT PERIOD
Use the RT input (LTC2960-1/ LTC2960-2) to select
between two fixed reset timeout periods. Connect RT to
ground for a 15ms timeout. Connect RT to VCC for a 200ms
timeout. The reset timeout period occurs after the ADJ
input is driven above threshold and the MR input transitions
above its logic threshold. After the reset timeout period,
the RST output is allowed to pull up to a high state as
shown in Figure 5. The RT input is replaced by the DVCC
input in the LTC2960-3/LTC2960-4 options and the reset
timeout period defaults to 200ms.
0.4V
IN+
LTC2960-3
(a). PUSH-PULL CONFIGURATION
(b). OPEN-DRAIN CONFIGURATION
DVCC 1.6V TO 5.5V
6.3V MAX
OUT
LTC2960-3
DVCC
OUT
–
+
0.4V
IN+–
+
2960 F04
Figure 4. LTC2960-3 (LTC2960-4) RST and OUT Outputs
Are Configurable as Push-Pull or Open-Drain
ADJ
15ms
200ms
2960 F05
RST, RT = GND
RST, RT = VCC
Figure 5. Selectable Reset Timeout Period
MANUAL RESET INPUT
When ADJ is above its reset threshold and the manual
reset input (MR) is pulled low, the RST output is forced
low. RST remains low for the selected reset timeout period
after the manual reset input is released and pulled high.
The manual reset input is pulled up internally through a
1µA current source to an internal bias voltage (see Elec-
trical Characteristics). If external leakage currents have
the ability to pull down the manual reset input below its
logic threshold, a pull-up resistor placed between VCC
EXTERNAL HYSTERESIS
The LTC2960 IN+ comparator hysteresis is 20mV (V+HYS),
or 5% referred to VTH. Certain applications require more
than the built-in native hysteresis. The application sche-
matic in Figure 6 adds one additional resistor (R6) to a
typical attenuator network. The procedure below is used
to determine a value for R6 to provide an increase over the
native hysteresis. In this example, it is desired to double
the native hysteresis from 300mV to 600mV and achieve
a falling threshold of 6V.
Before including R6, the rising threshold (VR) is 6.293V
while the falling threshold (VF) is 5.993V. The hysteresis
referred to VA is calculated from:
V
HYST VA
( )
=V
PHYS 1+R4
R5
=20mV •15 =300mV
LTC2960
11
2960fa
For more information www.linear.com/LTC2960
2960 F06
DVCC
OUTIN+
LTC2960-3
R6
6.81M
VB
VA
R4
681k
R5
48.7k
Figure 6. External Hysteresis
The addition of R6 allows OUT to sink or source current
to the summing junction at IN+. Neglecting internal switch
resistances and providing that R6 >> R5, the externally
modified hysteresis (referred to VA) becomes:
V
HEXT ≈V
HYS(VA) +V
B
R4
R6
Since the amount of hysteresis is to be doubled, the
second term in the above expression needs to be about
300mV. With a logic supply, VB, equal to 3V, the ratio R4/
R6 should be about 0.1. Choosing R6 to be 6.81M satisfies
the design criteria.
The addition of R6 modifies the rising and falling thresholds
originally determined by R4 and R5. The modified rising
threshold becomes:
V
R=VTH +V+HYS
( )
•1+R4
R5 +R4
R6
=400mV +20mV
( )
•1+13.98+0.1
( )
=6.3336V
It is apparent that the R4/R6 term does not affect the ris-
ing threshold significantly resulting in a change of only
+0.645%. The falling threshold incorporating R6 is:
V
F=VTH 1+R4
R5 +R4
R6
VTH – V
B
VTH
=0.4V •1+13.98 – 0.65
( )
=5.732V
applicaTions inForMaTion
The falling threshold can be restored to the original value
by reducing the value of R5. Under the assumption that
the addition of R6 has a negligible impact on the rising
threshold, a new R4/R5 ratio can be calculated as shown:
R4
R5 =
V
R
VTH +V+HYS
( )
– 1=
6.6V
420mV – 1=14.7
1
Given the ratio of R4/R5, the closest 1% resistor value for
R5 is 46.4k. With the actual resistor values now known,
the final thresholds can be calculated by plugging the
values into the equations above for VR and VF to obtain:
V
R
=6.626V, V
F
=6.010V, V
HYST
=616mV
As a result of the added current component through R6
an error term exists that is a function of the pull-up volt-
age, VB in Figure 6.
Operation with Supply Transients over 40V and Hot
Swapping
The circuit in Figure 7(a) allows the LTC2960 to withstand
high voltage transients. The magnitude of the voltage
transients that can be absorbed is set by the voltage rat-
ing of RZ. A TT-IRC pulse-withstanding surface mount
1206 resistor with a nominal voltage rating of 200V is
used. The external 30V Zener diode (Z1) and the 143kΩ
current limiting resistor (RZ) protect the VIN supply pin
of the LTC2960. Note that there is a speed penalty which
is the time constant determined by RZ and C1, 14.3ms in
this example. If VIN is below 30V, there is a voltage drop
across RZ that is dependent on the quiescent current of
the LTC2960 which is nominally less than 150mV but can
be as high as 290mV if MR is pulled low. The maximum
voltage drop is determined by the maximum specified ICC
and MR pull-up currents. For conditions where the Zener
conducts current, it can be biased in the microamp range
owing to the low quiescent current of the LTC2960. For a
supply voltage of 150V, the Zener is biased <1mA. When
input pins are used to sense VIN, the input pins ADJ/IN+/
IN– absolute maximum rating of 3.5V must not be exceeded.
VIN can be a maximum of 8.75x the lowest programmed
threshold to satisfy this condition. For a maximum VIN of
150V, the lowest programmable threshold is >17V.
LTC2960
12
2960fa
For more information www.linear.com/LTC2960
When a supply voltage is abruptly connected to the input
resonant ringing can occur as a result of series inductance.
The peak voltage could rise to 2x the input supply but in
practice can reach 2.5x if a capacitor with a strong volt-
age coefficient is present. If a 12V supply is hot plugged
the resulting ringing could reach the abs max of VCC. Any
circuit with an input of more than 7V should be scrutinized
for ringing. Circuit board trace inductances of as little as
10nH can produce significant ringing.
One effective means to eliminate ringing is to include a
10–100Ω resistance in series with the supply input before
the VCC capacitor shown in Figure 7(b). This provides damp-
ing for the resonant circuit but imposes a time constant to
VCC. In Figure 7(b), the time constant of RS and C1 is 2µs.
Figure 7. Operation with High Voltage Transients
and Hot Swapping
C1
0.1µF
50V
RZ
143k
PWC1206LF143kJ*
VCC
Z1
BZX84C30
BV = 30V
VIN MAX 200V
LTC2960
(a)
(b)
C1
0.1µF
50V
RS
20
VIN
VCC
LTC2960
2960 F07
*TT-IRC
applicaTions inForMaTion
LTC2960
13
2960fa
For more information www.linear.com/LTC2960
Typical applicaTions
Figure 8. Configurable Regulator UVLO and Low Battery Indicator
Configurable Regulator UVLO and Low Battery
Indicator
In the circuit of Figure 8, the high voltage open drain
OUT output is used as a configurable UVLO signal for a
switching regulator. A Li-Ion battery can contain protec-
tion circuitry that open circuits its terminals through an
internal switch when it reaches 2.5V. With a threshold of
5.537V the LTC2960 OUT output disables the load before
this occurs in order to prevent damage to the batteries.
In addition to the UVLO signal, the LTC2960 provides a
low battery indicator for the system. Figure 9 shows an
alternative arrangement in which the LTC2960 monitors
the output of the 3.3V regulator to provide a reset signal.
LTC2960-1
LT3991
VIN
VCC GND
VOUT
EN
ADJ
RT
GND
MR
IN+
RST
OUT
R3
5.11M*
Li-Ion
4.2V
Li-Ion
4.2V
R2
49.9k
VBAT
6V TO 8.4V VOUT
3.3V
C1
0.1µF
25V
R1
348k
LOW BATTERY
R5
1M
R4
10M
2960 F08
C2
47µF
16V
UVLO FALLING THRESHOLD = 5.537V
RESET FALLING THRESHOLD = 6.33V
NOT ALL LT3991 COMPONENTS SHOWN
BUCK CONVERTER
+
+
*VISHAY-DALE CRCW SERIES 0603 1%
Figure 9. Configurable Regulator UVLO and Supervisor
LTC2960-1
LT3991
VIN
VCC
GND
VOUT
EN
IN+
RT
GND
MR
ADJ
RST
OUT
R2
6.04M
Li-Ion
4.2V
Li-Ion
4.2V
VBAT
6V TO 8.4V VOUT
3.3V
C1
0.1µF
25V
R1
402k
RESD*
10k
RESET
R6
1M
R4
2.26M
R3
402k
R5
10M
2960 F09
UVLO FALLING THRESHOLD = 6.410V
RESET FALLING THRESHOLD = 2.649V
*OPTIONAL RESISTOR FOR ADDED ESD PROTECTION
+
+
C2
47µF
16V
NOT ALL LT3991 COMPONENTS SHOWN
BUCK CONVERTER
LTC2960
14
2960fa
For more information www.linear.com/LTC2960
Typical applicaTions
Figure 10. Battery Disconnect to Protect Against Deep Discharge
Figure 11. Automotive Supervisor
LTC2960-2
VCC
IN–
RT
GND
MR
ADJ
RST
OUT
R2
5.6M*
Li-Ion
4.2V
Li-Ion
4.2V
VBAT
6V TO 8.4V
M1
Si4435
M2
Si4435 VOUT
C1
0.1µF
25V
R1
402k*
LOW BATTERY
R5
10M
R4
6.04M*
R3
402k*
R6
100k
R7
1M
1N5245
15V
2960 F10
IN– FALLING THRESHOLD = 5.974V
ADJ FALLING THRESHOLD = 6.410V
+
+
R8
10k
*VISHAY-DALE CRCW SERIES 0603 1 %
LTC2960-3
VCC
IN+
GND
MR
OUT
ADJ
RST
DVCC
R2
825k
R7
1M
VIN
4V TO 27V
12V
VEHICLE BATTERY
IRLR2908 VOUT
3.3V
C1
1µF
50V
R1
80.6k
UV
OV
R6
6.04M
R5
1M
R8
102k
R7
4.99k
R4
1.78M
R3
1M
2960 F11
C2
22µF
25V
IN+ FALLING THRESHOLD = 4.49V
ADJ FALLING THRESHOLD = 2.816V
LT3991
BUCK CONVERTER
VIN
GND
VOUT
FBEN/SS
LT4356
VCC
GND
GATE OUT
FLT
FB
NOT ALL LT3991 COMPONENTS SHOWN
The LTC2960-2 in Figure 10 is yet another way to prevent
excessive discharge of a battery. The high voltage OUT
output is used to drive the gate of a PMOS switch to in-
terrupt the path to VOUT in the event of an undervoltage
condition. When the battery stack voltage is above the
IN– rising threshold of 5.972V, the PMOS switch is turned
on. The LTC2960-2 also supervises VOUT to provide a low
battery signal as an early warning of impending shutdown.
A 10k resistor is included in series with the VCC pin to limit
current in the event of a reverse battery condition. In all
three examples, the load drops to <2.5µA typically and
excessive battery drain is prevented.
Automotive Supervisor (LTC2960 H-Grade)
The circuit in Figure 11 uses the LTC2960-3 (H-grade) as a
low voltage supervisor capable of operating in temperatures
up to 125°C in automotive environments. The LT4356
surge stopper limits VIN to 27V under the alternator load
LTC2960
15
2960fa
For more information www.linear.com/LTC2960
Typical applicaTions
LT3009-5
VIN
GND
OUT
SHDN
LTC2960-4
VCC
GND MR
IN–
ADJ
DVCC
RST
OUT
R3A
7.32M*
R3B
118k*
R4
10k
R2
68k*
VIN
16.4V
VOUT
5V
20mA MAX
C1
0.1µF
50V
R1
182k*
FAULT
2960 F12
C2
1µF
16V
UPPER THRESHOLD = 16.897V
LOWER THRESHOLD = 12.3V
*VISHAY-DALE CRCW SERIES 0603 1%
Figure 12. Window Comparator for High Voltage Input
dump condition. The LT3991 buck regulator in conjunc-
tion with the LTC2960 draw <10µA quiescent current for
no load, which limits the drain on the vehicle battery even
after long periods of inactivity.
Window Comparator for High Voltage Input
The LTC2960-4 can be configured as a window compara-
tor to monitor high voltage supplies or battery stacks as
shown in Figure 12. A fault signal is generated if VIN is out
of regulation. The OUT output of the LTC2960-4 is fed back
into the MR input to drive the RST output. A micropower
LDO provides bias to the active pull-up DVCC supply for
low static current draw in the outputs.
Micropower Power Supply Sequencer and Supervisor
Figure 13 illustrates multiple uses for the LTC2960 in a
power supply system. U1 is a power supply sequencer
whose IN+ input monitors VIN and enables the 5V switch-
ing regulator. The ADJ input monitors the output of the
5V switching regulator and enables the 1.8V LDO after a
16ms Reset Timeout Period. U2 is a supervisor monitor-
ing the 5V and 1.8V outputs. The OUT output by virtue
of the MR pin, keeps the RST output low until the 1.8V
supply is ready.
LTC2960
16
2960fa
For more information www.linear.com/LTC2960
0.25 ±0.05
1.37 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.64 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.45 BSC
2.00 ±0.10
(4 SIDES)
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
0.64 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
1.37 ±0.10
(2 SIDES)
1
4
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC8) DFN 0409 REVA
0.23 ±0.05
0.45 BSC
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER
DC8 Package
8-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1719 Rev A)
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.22 – 0.36
8 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0710 REV A
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
3.85 MAX
0.40
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637 Rev A)
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
LTC2960
17
2960fa
For more information www.linear.com/LTC2960
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 12/13 Inverted OUT waveform in IN–/OUT Timing Diagram 7
LTC2960
18
2960fa
For more information www.linear.com/LTC2960
LINEAR TECHNOLOGY CORPORATION 2013
LT 1213 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC2960
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LTC1326 Micropower Triple-Supply Monitor for 5V/2.5V, 3.3V and ADJ 4.725V, 3.118V, 1V Threshold (±0.75%) and ADJ
LTC1726 Micropower Triple-Supply Monitor for 2.5V/5V, 3.3V and ADJ Adjustable Reset and Watchdog Timeouts
LTC1727 Micropower Triple-Supply Monitor with Open-Drain Reset Individual Monitor Outputs in MSOP
LTC1728 Micropower Triple-Supply Monitor with Open-Drain Reset 5-Lead SOT-23 Package
LTC1985 Micropower Triple-Supply Monitor with Push-Pull Reset Output 5-Lead SOT-23 Package
LTC2900/LTC2901/
LTC2902
Programmable Quad-Supply Monitor Adjustable Reset, Watchdog Timer and Tolerance, 10-Lead
MSOP and DFN Packages
LTC2903 Precision Quad-Supply Monitor 6-Lead SOT-23 and DFN Packages
LTC2904/LTC2905/
LTC2906/LTC2907
Three-State Programmable Precision Dual-Supply Monitor 8-Lead SOT-23 and DFN Packages
LTC2908 Precision Six-Supply Monitor (Four Fixed and Tw o Adjustable) 8-Lead SOT-23 and DFN Packages
LTC2909 Precision Triple-/Dual-Input UV, OV and Negative Voltage Monitor Shunt Regulated VCC Pin, Adjustable Threshold and Reset,
8-Lead SOT-23 and DFN Packages
LTC2910 Octal Positive/Negative Voltage Monitor Separate VCC Pin, Eight Inputs, Up to Tw o Negative Monitors
Adjustable Reset Timer, 16-Lead SSOP and DFN Packages
LTC2912/LTC2913/
LTC2914
Single-/Dual-/Quad-UV and OV Voltage Monitors Separate VCC Pin, Adjustable Reset Timer
LTC2915/LTC2916/
LTC2917/LTC2918
Single-Voltage Supervisors with 27 Pin-Selectable Thresholds Manual Reset and Watchdog Functions, 8- and 10-Lead
TSOT-23, MSOP and DFN Packages
LTC2934 Ultralow Power Supervisor with ADJ and PFI Inputs 500nA Quiescent Current, 2mm × 2mm 8-Lead DFN and
TSOT-23 Packages
LTC2935 Ultralow Power Supervisor with Eight Pin-Selectable Thresholds 500nA Quiescent Current, 2mm × 2mm 8-Lead DFN and
TSOT-23 Packages
Figure 13. Micropower Power Supply Sequencer and Supervisor
LTC2960-1
6.6V < VIN < 36V
VCC
GND
MR
IN+ADJ
RT
OUT
U1 RST
LTC2960-1
15ms DELAY
200ms DELAY
2960 F14
VCC
GND
MR
OUT
RT ADJ
IN+
RST
C1
0.1µF
25V
R1
402k
R2
6.04M
R3
10M
VIN SUPPLY UVLO = 6.410V
1.8V SUPPLY UVLO = 3.863V
RESET THRESHOLD = 1.693V
R4
402k
R8
1.3M
R7
402k
R9
1M
1.8V
OUTPUT
5V
OUTPUT
RST
R5
3.48M
R6
1M
LT3991
VIN
GND
VOUT
EN
LT3009-1.8
IN
GND
OUT
SHDN C3
1µF
10V
C2
47µF
16V
NOT ALL LT3991 COMPONENTS SHOWN
BUCK CONVERTER
U2
