Vishay Siliconix
DG201HS
Document Number: 70038
S-71241–Rev. G, 25-Jun-07
www.vishay.com
1
High-Speed Quad SPST CMOS Analog Switch
FEATURES
Fast Switching-tON: 38 ns
Low On-Resistance: 25 Ω
Low Leakage: 100 pA
Low Charge Injection
TTL/CMOS Logic Compatible
Single Supply Compatibility
High Current Rating: - 30 mA
BENEFITS
Faster Throughput
Higher Accuracy
Reduced Pedestal Error
Upgrades Existing Designs
Simple Interfacing
Replaces HI201HS, ADG201HS
Space Savings (TSSOP)
APPLICATIONS
Data Acquisition
Hi-Rel Systems
Sample-and-Hold Circuits
Communication Systems
Automatic Test Equipment
Integrator Reset Circuits
Choppers
Gain Switching
Avionics
DESCRIPTION
The DG201HS is an improved monolithic device containing
four independent analog switches. It is designed to provide
high speed, low error switching of analog signals. Combining
low on-resistance (25 Ω) with high speed (tON: 38 ns), the
DG201HS is ideally suited for high speed data acquisition
requirements.
To achieve high voltage ratings and superior switching
performance, the DG201HS is built on a proprietary
high-voltage silicon-gate process. An epitaxial layer
prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks input voltages to the supply values, when off.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
* Pb containing terminations are not RoHS compliant, exemptions may apply
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
IN1IN2
D1D2
S1S2
V- V+
GND NC
S4S3
D4D3
IN4IN3
Top View
S1S2
V- V+
NC NC
GND NC
S4S3
LCC
NC IN3D3
D4IN4
NC IN2D2
D1IN1
Key
910111213
4
5
6
7
8
1231920
14
15
16
17
18
Dual-In-Line, SOIC and TSSOP
Logic "0" 0.8 V
Logic "1" 2.4 V
TRUTH TABLE
Logic Switch
0 ON
1OFF
Available
Pb-free
RoHS*
COMPLIANT
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2
Document Number: 70038
S-71241–Rev. G, 25-Jun-07
Vishay Siliconix
DG201HS
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 12 mW/°C above 75 °C.
e. Derate 7.6 mW/°C above 75 °C.
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
ORDERING INFORMATION
Temp Range Package Part Number
- 40 to 85 °C
16-Pin Plastic DIP DG201HSDJ
DG201HSDJ-E3
16-Pin Narrow SOIC
DG201HSDY
DG201HSDY-E3
DG201HSDY-T1
DG201HSDY-T1-E3
16-Pin TSSOP
DG201HSDQ
DG201HSDQ-E3
DG201HSDQ-T1
DG201HSDQ-T1-E3
ABSOLUTE MAXIMUM RATINGS
Parameter Limit Unit
V+ to V- 44
V
GND to V- 25
Digital Inputsa, VS, VD
(V-) - 4 to (V+) + 4 or
30 mA, whichever occurs first
Continuous Current (Any Terminal) 30 mA
Current, S or D (Pulsed at 1 ms, 10 % duty cycle) 100
Storage Temperature (A Suffix) - 65 to 150 °C
(D Suffix) - 65 to 125
Power Dissipation (Package)b
16-Pin Plastic DIPc470
mW
16-Pin CerDIPd900
16-Pin Narrow Body SOIC and TSSOPe600
LCC-20d900
Figure 1.
GND
V-
DX
SX
V+
5 V
Reg
V+
INX
V-
Level
Shift/
Drive
Document Number: 70038
S-71241–Rev. G, 25-Jun-07
www.vishay.com
3
Vishay Siliconix
DG201HS
Notes:
a.Refer to PROCESS OPTION FLOWCHART.
b.Room = 25 °C, Full = as determined by the operating temperature suffix.
c.Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d.The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e.Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
SPECIFICATIONSa
Parameter Symbol
Test Conditions
Unless Specified
V+ = 15 V, V- = - 15 V
VIN = 3 V, 0.8 VfTempb Typc
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Unit Mind MaxdMind Maxd
Analog Switch
Analog Signal RangeeVANALOG Full V- V+ V- V+ V
Drain-Source
On-Resistance rDS(on)
IS = - 10 mA, VD = ± 8.5 V
V+ = 13.5 V, V- = - 13.5 V
Room
Full
25 50
75
50
75 Ω
rDS(on) Match Room 3 %
Switch Off Leakage Current
IS(off) V+ = 16.5 V, V- = - 16.5 V
VD = ± 15.5 V
VS= ± 15.5 V
Room
Full
0.1 - 1
- 60
1
60
- 1
- 20
1
20
nA
ID(off) Room
Full
0.1 - 1
- 60
1
60
- 1
- 20
1
20
Channel On Leakage
Current ID(on)
V+ = 16.5 V, V- = - 16.5 V
VS = VD = ± 15.5 V
Room
Full
0.1 - 1
- 60
1
60
- 1
- 20
1
20
Digital Control
Input, High Voltage VINH Full 2.4 2.4 V
Input, Low Voltage VINL Full 0.8 0.8
Input Capacitance CIN Full 5 pF
Input Current IINH or IINL VIN under test = 0.8 V, 3 V Full - 11- 11µA
Dynamic Characteristics
Tu r n - O n T ime tON RL = 1 kΩ, CL = 35 pF
VS = ± 10 V, VINH = 3 V
See Figure 2
Room
Full
48 60
75
60
75
ns
Turn-Off Time tOFF1 Room
Full
30 50
70
50
70
tOFF2 Room 150
Output Settling Time to 0.1 % tsRoom 180
Charge Injection Q CL = 1 nF, VS = 0 V
Vgen = 0 V, Rgen = 0 ΩRoom - 5 pC
Off Isolation OIRR RL = 1 kΩ, CL = 10 pF
f = 100 kHz Room 85
dB
Crosstalk
(Channel-to-Channel) XTA LK
Any Other Channel Switches
RL = 1 kΩ, CL = 10 pF
f = 100 kHz
Room 100
Source Off Capacitance CS(off)
VS , VD = 0 V, f = 1 MHz
Room 8
pF
Drain Off Capacitance CD(off) Room 8
Channel On Capacitance CD(on) Room 30
Drain-to-Source
Capacitance CDS(off) Room 0.5
Power Supplies
Positive Supply Current I+
V+ = 15 V, V- = - 15 V
VIN = 0 or 5 V
Room
Full
4.5
10 10 mA
Negative Supply Current I- Room
Full
3.5
- 6 - 6
Power ConsumptioncPCFull 240 240 mW
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4
Document Number: 70038
S-71241–Rev. G, 25-Jun-07
Vishay Siliconix
DG201HS
Notes:
a.Refer to PROCESS OPTION FLOWCHART.
b.Room = 25 °C, Full = as determined by the operating temperature suffix.
c.Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d.The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e.Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONSa FOR SINGLE SUPPLY
Parameter Symbol
Test Conditions
Unless Specified
V+ = 10.8 V to 16.5 V,
V- = GND = 0 V, VIN = 3 V, 0.8 VfTempb Typc
A Suffix
- 55 to 125 °C
D Suffix
- 40 to 85 °C
Unit Mind MaxdMind Maxd
Analog Switch
Analog Signal RangeeVANALOG Full 0 V+ 0 V+ V
Drain-Source
On-Resistance rDS(on)
IS = - 10 mA, VD = 8.5 V
V+ = 10.8 V
Room
Full 65 90
120
90
120 Ω
Switch Off Leakage Current
IS(off) V+ = 16.5 V
VS= 0.5 V, 10 V
VD = 10 V, 0.5 V
Room
Full 0.1 - 1
- 60
1
60
- 1
- 20
1
20
nA
ID(off) Room
Full 0.1 - 1
- 60
1
60
- 1
- 20
1
20
Channel On Leakage
Current ID(on) + IS(on)
V+ = 16.5 V
VD = 0.5 V, 10 V
Room
Full 0.1 - 1
- 60
1
60
- 1
- 20
1
20
Digital Control
Input, High Voltage VINH Full 2.4 2.4 V
Input, Low Voltage VINL Full 0.8 0.8
Input Capacitance CIN Full 5 pF
Input Current IINH or IINL
V+ = 16.5 V
VIN under test = 0.8 V, 3 V Full - 1 1 - 1 1 µA
Dynamic Characteristics
Tur n -On Ti m e tON RL = 1 kΩ, CL = 35 pF
VS = 2 V, V = 10.8 V
See Figure 2
Room
Full
50
70
50
70
ns
Tur n -Off T i m e tOFF1 Room
Full
50
70
50
70
tOFF2 Room 150
Output Settling Time to 0.1 % tsRoom 180
Charge Injection Q CL = 1 nF, VS = 0 V
Vgen = 0 V, Rgen = 0 ΩRoom 10 pC
Off Isolation OIRR RL = 1 kΩ, CL = 10 pF
f = 100 kHz Room 85
dB
Crosstalk
(Channel-to-Channel) XTA L K
Any Other Channel Switches
RL = 1 kΩ, CL = 10 pF
f = 100 kHz
Room 100
Source Off Capacitance CS(off) f = 1 MHz Room 10
pFDrain Off Capacitance CD(off) Room 10
Channel On Capacitance CD(on) VANALOG = 0 V Room 30
Power Supply
Positive Supply Current I+ V+ = 15 V, VIN = 0 or 5 V Full 10 10 mA
Power ConsumptioncPCFull 150 150 mW
Document Number: 70038
S-71241–Rev. G, 25-Jun-07
www.vishay.com
5
Vishay Siliconix
DG201HS
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
rDS(on) vs. VD and Power Supply Voltages
rDS(on) vs. VD and Single Power Supply Voltages
Input Switching Threshold vs. Supply Voltage
- 20 - 16 - 12 - 8 - 4 0 4 8 12 16 20
0
10
20
30
40
50
60
70
± 5 V
VD – Drain Voltage (V)
± 10 V
± 15 V
± 20 V
r
DS(on)
– Drain-Source On-Resistance (Ω)
0246810121416
0
20
40
60
80
100
120
140
160
180
VD – Drain Voltage (V)
V+ = 5 V
7 V
10 V
12 V
15 V
rDS(on) – Drain-Source On-Resistance (Ω)
0
0.5
1
1.5
2
2.5
V (V)
TH
Positive Supplies (V)
4 6 8 101214161820
rDS(on) vs. VD and Temperature
Leakage Currents vs. Temperature
Switching Time vs. Power Supply Voltage
0
10
20
30
40
50
- 15 - 10 - 5 0 5 10 15
VD – Drain Voltage (V)
125 °C
85 °C
- 55 °C
0 °C
V+ = 15 V
V- = - 15 V
rDS(on) – Drain-Source On-Resistance (Ω)
25 °C
- 60 - 40 - 20 0 20 40 60 80 100 120 140
10 pA
100 pA
1 nA
10 nA
ID(on)
Leakage
Temperature (°C)
IS(off), ID(off)
30
35
40
45
50
55
± 4 ± 6 ± 8 ± 10 ± 12 ± 14 ± 16 ± 18 ± 20
Supply Voltage (V)
Switching Time (ns)
tON
tOFF
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Document Number: 70038
S-71241–Rev. G, 25-Jun-07
Vishay Siliconix
DG201HS
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Switching Times vs. Temperature
Switching Times vs. Temperature
- 55 - 25 0 25 50 75 100 125
20
25
30
35
40
45
Temperature (°C)
Switching Time (ns)
tON
tOFF
V+ = 15 V
V- = - 15 V
- 55 - 25 0 25 50 75 100 125
20
25
30
35
40
45
50
Temperature (°C)
Switching Time (ns)
V+ = 10.8 V
V- = 0 V
tON
tOFF
Switching Times vs. Power Supply Voltage
Charge Injection vs. Source Voltage
4 6 8 101214161820
30
35
40
45
50
55
60
65
V+ – Positive Supply (V)
(ns)tON
,t
OFF
tON
tOFF
- 15 - 10 - 5 0 5 10 15
- 40
- 30
- 20
- 10
0
10
20
VS – Source Voltage (V)
V+ = 15 V, V- = 0 V
V+ = 15 V
V- = - 15 V
Chargie Injection (pC)
Off Isolation vs. Frequency
10 k 100 k 1 M 10 M
40
50
60
70
80
90
100
110
120
f – Frequency (Hz)
OIRR
RL = 100 Ω
V+ = 15 V
V- = - 15 V
RL = 1 kΩ
Document Number: 70038
S-71241–Rev. G, 25-Jun-07
www.vishay.com
7
Vishay Siliconix
DG201HS
TEST CIRCUITS
Figure 2. Switching Time
10 %
90 %
± 10 V
RL
RL + rDS(on)
VO = VS
CL (includes fixture and stray capacitance)
V-
V+
IN
S
CL
35 pF
D
3 V RL
1 kΩ
VO
- 15 V
GND
+ 15 V
50 %
0 V
3 V
tOFF1
tON
VO
VS
tr < 20 ns
tf < 20 ns
Logic
Input
Switch
Input
Switch
Output
tOFF2
Figure 3. Charge Injection
C
L
1 nF
3 V
V-
- 15 V
V
O
GND
V+
R
g
S D
IN
+ 15 V
ΔV
O
V
O
IN
X
SW
ON
OFF
Q = ΔV
O
x C
L
Figure 4. Off Isolation
S
IN RL
D
Rg = 50 Ω
VSVO
0 V, 3 V
Off Isolation = 20 log VS
VO
V+
- 15 V
GND V- C
C
+ 15 V
Figure 5. Crosstalk
50 Ω
D1
VO
Rg = 50 Ω
S1
+ 15 V
- 15 V
D2
GND
V+
V-
NC
C
C
S2
RL
IN1
XTA L K Isolation = 20 log VS
VO
0 V, 3 V
0 V, 3 V
VS
IN2
C = RF bypass
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Document Number: 70038
S-71241–Rev. G, 25-Jun-07
Vishay Siliconix
DG201HS
APPLICATIONS
A high-speed, low-glitch analog switch such as Vishay Siliconix’s DG201HS improves the accuracy and shortens the acquisition
and settling times of a sample-and-hold circuit.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see http://www.vishay.com/ppg?70038.
VANALOG
Input
Buffer
Si581
SAMPLE/HOLD
CH
(Polystyrene)
JFET Buffer
OUTPUT
to A/D Converte
r
DG201HS
Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
Disclaimer
Legal Disclaimer Notice
Vishay
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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