LTC3576/LTC3576-1
1
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TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
Switching Power Manager
with USB On-the-Go + Triple
Step-Down DC/DCs
n HDD-Based Media Players
n GPS, PDAs, Digital Cameras, Smart Phones
n Automotive Compatible Portable Electronics L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. Bat-Track and PowerPath are trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents, including 6522118, 6404251.
High Effi ciency PowerPath Manager with Overvoltage Protection
and Triple Step-Down Regulator
PowerPath Switching Regulator Effi ciency
to System Load (PVOUT/PVBUS)
n
Bidirectional Switching Regulator with Bat-Track™
Adaptive Output Control Provides Effi cient Charging
and
a 5V Output for USB On-The-Go
n
Bat-Track Control of External High Voltage Step-
Down Switching Regulator
n
Overvoltage Protection Guards Against Damage
n Instant-On Operation with Discharged Battery
n Triple Step-Down Switching Regulators with I
2
C
Adjustable Outputs (1A/400mA/400mA IOUT)
n
180mΩ Internal Ideal Diode + External Ideal Diode
Controller Powers the Load in Battery Mode
n Li-Ion/Polymer Battery Charger (1.5A Max ICHG)
n Battery Float Voltage: 4.2V (LTC3576), 4.1V (LTC3576-1)
n Compact (4mm × 6mm × 0.75mm) 38-Pin QFN Package
The LTC
®
3576/LTC3576-1 are highly integrated power
management and battery charger ICs for Li-Ion/Polymer
battery applications. They each include a high effi ciency,
bidirectional switching PowerPath™ manager with auto-
matic load prioritization, a battery charger, an ideal diode, a
controller for an external high voltage switching regulator
and three general purpose step-down switching regulators
with I2C adjustable output voltages. The internal switch-
ing regulators automatically limit input current for USB
compatibility and can also generate 5V at 500mA for USB
on-the-go applications when powered from the battery.
Both the USB and external switching regulator power paths
feature Bat-Track optimized charging to provide maximum
power to the application from supplies as high as 38V. An
overvoltage circuit protects the LTC3576/LTC3576-1 from
damage due to high voltage on the VBUS or WALL pins with
just two external components. The LTC3576/LTC3576-1 are
available in a low profi le 38-pin (4mm × 6mm × 0.75mm)
QFN package.
Li-Ion
0.8V TO 3.6V/400mA
3.3V/20mA
0.8V TO 3.6V/400mA
0.8V TO 3.6V/1A
RST
2
OPTIONAL
0V
T
TO OTHER
LOADS
+
LTC3576/LTC3576-1
TRIPLE
HIGH EFFICIENCY
STEP-DOWN
SWITCHING
REGULATORS
I2C PORT
ALWAYS ON LDO
MEMORY
RTC/LOW
POWER LOGIC
I2C
CORE
I/O
3576 TA01
µPROCESSOR
CHARGE
ENABLE
CONTROLS
USB COMPLIANT
BIDIRECTIONAL
SWITCHING
REGULATOR
OVERVOLTAGE
PROTECTION
EXTERNAL HIGH VOLTAGE
BUCK CONTROLLER
CC/CV
BATTERY
CHARGER
61
2
3
USB OR
5V AC
ADAPTER
AUTOMOTIVE
FIREWIRE, ETC. LT3653
LOAD CURRENT (mA)
10
0
EFFICIENCY (%)
20
40
60
80
100 1000
3576 TA01b
100
10
30
50
70
90
BAT = 4.2V
BAT = 3.3V
VBUS = 5V
IBAT = 0mA
10x MODE
LTC3576/LTC3576-1
2
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PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
VBUS, WALL (Transient) t < 1ms,
Duty Cycle < 1% .......................................... –0.3V to 7V
VBUS, WALL (Static), BAT, VIN1, VIN2, VIN3,
VOUT, ENOTG, NTC, SDA, SCL, DVCC,
RST3, CHRG ................................................ –0.3V to 6V
ILIM0, IILIM1 ........ –0.3V to Max(VBUS, VOUT, BAT) + 0.3V
EN1, EN2, EN3 .............................. –0.3V to VOUT + 0.3V
FBx (x = 1, 2, 3) ..............................–0.3V to VINx + 0.3V
IOVSENS ...................................................................10mA
ICLPROG ....................................................................3mA
ICHRG, IRST3 ............................................................50mA
IPROG ........................................................................2mA
ILDO3V3 ...................................................................30mA
ISW1, ISW2 (Continuous) .......................................600mA
ISW
, ISW3, IBAT
, IVOUT (Continuous) ..............................2A
Maximum Junction Temperature...........................125°C
Operating Temperature Range..................–40°C to 85°C
Storage Temperature Range ...................–65°C to 125°C
(Notes 1, 2, 3)
13 14 15 16
TOP VIEW
39
UFE PACKAGE
38-LEAD (4mm s 6mm) PLASTIC QFN
17 18 19
38 37 36 35 34 33 32
24
25
26
27
28
29
30
31
8
7
6
5
4
3
2
1CLPROG
LDO3V3
NTCBIAS
NTC
OVGATE
OVSENS
FB1
VIN1
SW1
EN1
ENOTG
DVCC
IDGATE
CHRG
PROG
ACPR
WALL
VC
FB2
VIN2
SW2
EN2
RST3
FB3
ILIM1
ILIM0
SW
VBUS
VBUS
VOUT
BAT
SCL
SDA
NC
VIN3
SW3
NC
EN3
23
22
21
20
9
10
11
12
TJMAX = 125°C, θJA = 34°C/W
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PowerPath Switching Regulator—Step-Down Mode
VBUS Input Supply Voltage 4.35 5.5 V
IVBUS(LIM) Total Input Current 1× Mode
5× Mode
10× Mode
Low Power Suspend Mode
High Power Suspend Mode
l
l
l
l
l
82
440
800
0.32
1.6
90
472
880
0.39
2.05
100
500
1000
0.5
2.5
mA
mA
mA
mA
mA
IVBUSQ (Note 4) Input Quiescent Current 1× Mode
5×, 10× Modes
Low/High Power Suspend Modes
7
17
0.045
mA
mA
mA
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3576EUFE#PBF LTC3576EUFE#TRPBF 3576 38-Lead (4mm × 6mm) Plastic QFN –40°C to 85°C
LTC3576EUFE-1#PBF LTC3576EUFE-1#TRPBF 35761 38-Lead (4mm × 6mm) Plastic QFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
LTC3576/LTC3576-1
3
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ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
hCLPROG
(Note 4) Ratio of Measured VBUS Current to
CLPROG Program Current 1× Mode
5× Mode
10× Mode
Low Power Suspend Mode
High Power Suspend Mode
210
1160
2200
9.6
56
mA/mA
mA/mA
mA/mA
mA/mA
mA/mA
IVOUT(POWERPATH) VOUT Current Available Before
Discharging Battery 1× Mode, BAT = 3.3V
5× Mode, BAT = 3.3V
10× Mode, BAT = 3.3V
Low Power Suspend Mode
High Power Suspend Mode
0.26
1.6
121
667
1217
0.31
20.41
2.4
mA
mA
mA
mA
mA
VCLPROG CLPROG Servo Voltage in Current Limit Switching Modes
Suspend Modes 1.18
100 V
mV
VUVLO VBUS Undervoltage Lockout Rising Threshold
Falling Threshold 3.95 4.30
4.00 4.35 V
V
VDUVLO VBUS to BAT Differential Undervoltage
Lockout Rising Threshold
Falling Threshold 200
50 mV
mV
VOUT V
OUT Voltage 1×, 5×, 10× Modes, 0V < BAT < 4.2V,
IVOUT = 0mA, Battery Charger Off
USB Suspend Modes, IVOUT = 250µA
3.4
4.5 BAT + 0.3
4.6 4.7
4.7 V
V
fOSC Switching Frequency 1.8 2.25 2.7 MHz
RPMOS_
POWERPATH
PMOS On-Resistance 0.18
RNMOS_
POWERPATH
NMOS On-Resistance 0.30
IPEAK_POWERPATH Peak Inductor Current Limit 1× Mode (Note 5)
5× Mode (Note 5)
10× Mode (Note 5)
1
2
3
A
A
A
RSUSP Suspend LDO Output Resistance Closed Loop 10
PowerPath Switching Regulator—Step-Up Mode (USB On-the-Go)
VBUS Output Voltage 0mA ≤ IVBUS ≤ 500mA, VOUT > 3.2V 4.75 5.25 V
VOUT Input Voltage 2.9 5.5 V
IVBUS Output Current Limit l550 680 mA
IPEAK Peak Inductor Current Limit (Note 5) 1.8 A
IOTGQ VOUT Quiescent Current VOUT = 3.8V, IVBUS = 0mA (Note 6) 1.38 mA
VCLPROG Output Current Limit Servo Voltage 1.15 V
VOUT(UVLO) VOUT UVLO—VOUT Falling
VOUT UVLO—VOUT Rising 2.5 2.6
2.8 2.9 V
V
tSCFAULT Short-Circuit Fault Delay VBUS < 4V and PMOS Switch Off 7.2 ms
Bat-Track Switching Regulator Control
VWALL Absolute WALL Input Threshold Rising Threshold
Hysteresis 4.2 4.3
1.1 4.4 V
V
ΔVWALL Differential WALL Input Threshold WALL-BAT Falling
Hysteresis 030
60 45 mV
mV
VOUT Regulation Target Under VC Control 3.55 BAT + 0.3 V
IWALLQ WALL Quiescent Current 400 µA
RACPR ACPR Pull-Down Strength 150
VHACPR ACPR High Voltage VOUT V
VLACPR ACPR Low Voltage 0V
LTC3576/LTC3576-1
4
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ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Overvoltage Protection
VOVCUTOFF Overvoltage Protection Threshold With 6.2k Series Resistor 6.1 6.35 6.7 V
VOVGATE OVGATE Output Voltage VOVSENS < VOVCUTOFF
VOVSENS > VOVCUTOFF
1.88•VOVSENS
012 V
V
tRISE OVGATE Time to Reach Regulation OVGATE CLOAD = 1nF 2.2 ms
Battery Charger
VFLOAT BAT Regulated Output Voltage LTC3576
l
4.179
4.165 4.200
4.200 4.221
4.235 V
V
LTC3576-1
l
4.079
4.065 4.100
4.100 4.121
4.135 V
V
ICHG Constant Current Mode Charger Current RPROG = 1k
RPROG = 5k 980
185 1030
206 1065
223 mA
mA
IBAT Battery Drain Current VBUS > VUVLO, Suspend Mode,
IVOUT = 0µA 3.6 6 µA
VBUS = 0V, IVOUT = 0µA
(Ideal Diode Mode) 28 45 µA
VPROG PROG Pin Servo Voltage 1.000 V
VPROG_TRKL PROG Pin Servo Voltage in Trickle Charge BAT < VTRKL 0.100 V
VC/10 C/10 Threshold Voltage at PROG 100 mV
hPROG Ratio of IBAT to PROG Pin Current 1030 mA/mA
ITRKL Trickle Charge Current BAT < VTRKL, RPROG = 1k 100 mA
VTRKL Trickle Charge Threshold Voltage BAT Rising 2.7 2.85 3.0 V
ΔVTRKL Trickle Charge Hysteresis Voltage 135 mV
ΔVRECHRG Recharge Battery Threshold Voltage Threshold Voltage Relative to VFLOAT –75 –100 –125 mV
tTERM Safety Timer Termination Period Timer Starts When VBAT = VFLOAT 3.3 4 5 Hour
tBADBAT Bad Battery Termination Time BAT < VTRKL 0.4 0.5 0.6 Hour
hC/10 End of Charge Current Ratio (Note 7) 0.085 0.1 0.112 mA/mA
VCHRG CHRG Pin Output Low Voltage ICHRG = 5mA 65 100 mV
ICHRG CHRG Pin Leakage Current VCHRG = 5V 1 µA
RON_CHG Battery Charger Power FET On-
Resistance (Between VOUT and BAT) 0.18
TLIM Junction Temperature in Constant
Temperature Mode 110 °C
NTC
VCOLD Cold Temperature Fault Threshold Voltage Rising Threshold
Hysteresis 75 76.5
1.6 78 %NTCBIAS
%NTCBIAS
VHOT Hot Temperature Fault Threshold Voltage Falling Threshold
Hysteresis 33.4 34.9
1.5 36.4 %NTCBIAS
%NTCBIAS
VDIS NTC Disable Threshold Voltage Falling Threshold
Hysteresis 0.7 1.7
50 2.7 %NTCBIAS
mV
INTC NTC Leakage Current NTC = NTCBIAS = 5V –50 50 nA
Ideal Diode
VFWD Forward Voltage IVOUT = 10mA 15 mV
RDROPOUT Internal Diode On-Resistance Dropout IVOUT = 200mA 0.18
IMAX_DIODE Diode Current Limit 2 A
LTC3576/LTC3576-1
5
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ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Always On 3.3V LDO Supply
VLDO3V3 Regulated Output Voltage 0mA < ILDO3V3 < 20mA 3.1 3.3 3.5 V
RCL_LDO3V3 Closed-Loop Output Resistance 2.7
ROL_LDO3V3 Dropout Output Resistance 23
Logic (ILIM0, ILIM1, EN1, EN2, EN3, ENOTG, and SCL, SDA when DVCC = 0V)
VIL Logic Low Input Voltage 0.4 V
VIH Logic High Input Voltage 1.2 V
IPD1 ILIM0, ILIM1, EN1, EN2, EN3, ENOTG, SCL,
SDA Pull-Down Current 2µA
I2C Port
DVCC Input Supply 1.6 5.5 V
IDVCC DVCC Current SCL/SDA = 0kHz, DVCC = 3.3V 0.5 µA
VDVCC(UVLO) DVCC UVLO 1.0 V
ADDRESS I2C Address 0001001[0]
VIH, SDA, SCL Input High Threshold 70 %DVCC
VIL, SDA, SCL Input Low Threshold 30 %DVCC
IPD2, SDA, SCL Pull-Down Current 2µA
VOL Digital Output Low (SDA) ISDA = 3mA 0.4 V
fSCL Clock Operating Frequency 400 kHz
tBUF Bus Free Time Between Stop and Start
Condition 1.3 µs
tHD_STA Hold Time After (Repeated) Start
Condition 0.6 µs
tSU_STA Repeated Start Condition Setup Time 0.6 µs
tSU_STO Stop Condition Setup Time 0.6 µs
tHD_DAT(O) Data Hold Time Output 0 900 ns
tHD_DAT(I) Data Hold Time Input 0 ns
tSU_DAT Data Setup Time 100 ns
tLOW SCL Low Period 1.3 µs
tHIGH SCL High Period 0.6 µs
tfSDA/SCL Fall Time 20 300 ns
trSDA/SCL Rise Time 20 300 ns
tSP Input Spike Suppression Pulse Width 50 ns
General Purpose Switching Regulators 1, 2 and 3
VIN1,2,3 Input Supply Voltage (Note 8) 2.7 5.5 V
VOUT(UVLO) VOUT UVLO—VOUT Falling
VOUT UVLO—VOUT Rising VIN1,2,3 Connected to VOUT Through
Low Impedance. Switching
Regulators are Disabled in UVLO
2.5 2.6
2.8 2.9 V
V
fOSC Switching Frequency 1.8 2.25 2.7 MHz
IFB1,2,3 FBx Input Current VFB1,2,3 = 0.85V –50 50 nA
D1,2,3 Maximum Duty Cycle 100 %
RSW1,2,3_PD SWx Pull-Down in Shutdown 10 k
LTC3576/LTC3576-1
6
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ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IVIN1,2,3 Pulse-Skipping Mode Input Current IOUT1,2,3 = 0µA (Note 9) 90 µA
Burst Mode
®
Input Current IOUT1,2,3 = 0µA (Note 9) 20 35 µA
LDO Mode Input Current IOUT1,2,3 = 0µA (Note 9) 15 25 µA
Shutdown Input Current Limit IOUT1,2,3 = 0µA, FB1,2,3 = 0V 1 µA
VFBHIGH1,2,3 Maximum Servo Voltage Full Scale (1,1,1,1) (Note 10) l0.78 0.80 0.82 V
VFBLOW1,2,3 Minimum Servo Voltage Zero Scale (0,0,0,0) (Note 10) 0.405 0.425 0.445 V
VLSB1,2,3 VFB1,2 Servo Voltage Step Size 25 mV
RLDO_CL1,2,3 LDO Mode Closed-Loop ROUT VFB1,2,3 = VOUT1,2 3 = 0.8V 0.25
RLDO_OL1,2,3 LDO Mode Open-Loop ROUT (Note 11) 2.5
General Purpose Switching Regulator 1 and 2
ILIM1,2 PMOS Switch Current Limit Pulse-Skipping/Burst Mode
Operation (Note 5) 600 900 1300 mA
IOUT1,2 Available Output Current LDO Mode 50 mA
RP1,2 PMOS RDS(ON) 0.6
RN1,2 NMOS RDS(ON) 0.7
General Purpose Switching Regulator 3
ILIM3 PMOS Switch Current Limit Pulse-Skipping/Burst Mode
Operation (Note 5) 1300 1800 2800 mA
IOUT3 Available Output Current LDO Mode 50 mA
RP3 PMOS RDS(0N) 0.18
RN3 NMOS RDS(ON) 0.3
tRST3 Power-On Reset Time for Switching
Regulator VFB3 Within 92% of Final Value to
RST3 Hi-Z 230 ms
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3576E/LTC3576E-1 are guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: The LTC3576E/LTC3576E-1 include overtemperature protection
that is intended to protect the device during momentary overload
conditions. Junction temperature will exceed 125°C when overtemperature
protection is active. Continuous operation above the specifi ed maximum
operating junction temperature may impair device reliability.
Note 4: Total input current is the sum of quiescent current, I
VBUSQ
, and
measured current given by V
CLPROG
/R
CLPROG
• (h
CLPROG
+ 1).
Note 5: The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum specifi ed pin current rating may result in device
degradation or failure.
Note 6: The bidirectional switcher’s supply current is bootstrapped to VBUS
and in the application will refl ect back to VOUT by (VBUS/VOUT) •
1/effi ciency. Total quiescent current is the sum of the current into the
VOUT pin plus the refl ected current.
Note 7: h
C/10
is expressed as a fraction of the measured full charge
current with indicated PROG resistor.
Note 8: VOUT not in UVLO.
Note 9: FBx above regulation such that regulator is in sleep. Specifi cation
does not include resistive divider current refl ected back to V
INx
.
Note 10: Applies to pulse-skipping and Burst Mode operation only.
Note 11: Inductor series resistance adds to open-loop R
OUT
.
LTC3576/LTC3576-1
7
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TYPICAL PERFORMANCE CHARACTERISTICS
Ideal Diode V-I Characteristics
Ideal Diode Resistance
vs Battery Voltage
VOUT Voltage vs Load Current
(Battery Charger Disabled)
USB Limited Load Current vs Battery
Voltage (Battery Charger Disabled)
Battery and VBUS Currents
vs Load Current
Battery Charge Current
vs Temperature
PowerPath Switching Regulator
Transient Response
PowerPath Switching Regulator
Effi ciency vs Load Current
Battery Charging Effi ciency
vs Battery Voltage with No
External Load (PBAT/PVBUS)
FORWARD VOLTAGE (V)
0
CURRENT (A)
0.6
0.8
1.0
0.16
3576 G01
0.4
0.2
00.04 0.08 0.12 0.20
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
INTERNAL IDEAL
DIODE ONLY
VBUS = 5V
BATTERY VOLTAGE (V)
2.7
RESISTANCE ()
0.15
0.20
0.25
3.9
3576 G02
0.10
0.05
03.0 3.3 3.6 4.2
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
INTERNAL IDEAL
DIODE
TEMPERATURE (°C)
–40
0
CHARGE CURRENT (mA)
100
200
300
400
04080 120
3576 G06
500
600
–20 20 60 100
THERMAL REGULATION
RPROG = 2k
LOAD CURRENT (A)
0
VOUT (V)
4.00
4.25
4.50
0.8
3576 G03
3.75
3.50
3.25 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.9 1.0
BAT = 4V
BAT = 3.4V
BATTERY VOLTAGE (V)
2.7
0
LOAD CURRENT (mA)
100
300
400
500
3.3 3.9 4.2
900
3576 G04
200
3.0 3.6
600
700
800
VBUS = 5V
5s MODE
LOAD CURRENT (mA)
0
CURRENT (mA)
250
500
750
800
3576 G05
0
–250
–500 100 200 300 400 500 600 700 9001000
VBUS CURRENT
BATTERY CURRENT
(CHARGING)
VBUS = 5V
BAT = 3.8V
5s MODE
RCLPROG = 3.01k
RPROG = 1k BATTERY CURRENT
(DISCHARGING)
VOUT
50mV/DIV
AC COUPLED
IVOUT
500mA/DIV
0mA
20µs/DIV 3576 G07
VBUS = 5V
VOUT = 3.65V
CHARGER OFF
10s MODE
LOAD CURRENT (mA)
30
60
50
40
100
90
80
70
3576 G08
EFFICIENCY (%)
10 1000
100
1s MODE
5s, 10s MODE
BATTERY VOLTAGE (V)
2.7
50
EFFICIENCY (%)
55
65
70
75
3.3 3.9 4.2
95
3576 G09
60
3.0 3.6
80
85
90
RCLPROG = 3.01k
RPROG = 1k
1s MODE
5s MODE
TA = 25°C unless otherwise specifi ed.
LTC3576/LTC3576-1
8
3576fb
VBUS Quiescent Current
vs VBUS Voltage (Suspend)
VOUT Voltage
vs Load Current in Suspend
VBUS Current
vs Load Current in Suspend
Battery Charge Current
vs VOUT Voltage
Normalized Battery Charger Float
Voltage vs Temperature
VOUT Voltage vs Battery Voltage
(Charger Overprogrammed)
VBUS Quiescent Current
vs Temperature
Battery Drain Current
vs Temperature
VBUS Quiescent Current in
Suspend vs Temperature
BUS VOLTAGE (V)
0
0
QUIESCENT CURRENT (µA)
10
20
30
40
50
60
1234
3576 G10
5
LOAD CURRENT (mA)
0
VOUT (V)
4.0
4.5
5.0
2.0
3576 G11
3.5
3.0
2.5 0.5 1.0 1.5 2.5
HIGH POWER SUSPEND
LOW POWER SUSPEND
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
LOAD CURRENT (mA)
0
VBUS CURRENT (mA)
1.5
2.0
2.5
2.0
3576 G12
1.0
0.5
00.5 1.0 1.5 2.5
HIGH POWER
SUSPEND
LOW POWER SUSPEND
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
VOUT (V)
3.40
0
BATTERY CURRENT (mA)
100
200
300
400
3.50 3.60 3.70 3.80
3576 G13
500
600
3.45 3.55 3.65 3.75
RCLPROG = 3.01k
RPROG = 2k
5s MODE
BATTERY VOLTAGE (V)
2.7
VOUT (V)
3.9
4.3
4.7
3.9
3576 G14
3.5
3.1
3.7
4.1
4.5
3.3
2.9
2.7 3.0 3.3 3.6 4.2
5s MODE
1s MODE
VBUS = 5V
IVOUT = 0V
RCLPROG = 3.01k
RPROG = 1k
TEMPERATURE (°C)
–40
NORMALIZED FLOAT VOLTAGE
0.998
0.999
1.000
60
3576 G15
0.997
0.996 –15 10 35 85
1.001
TEMPERATURE (°C)
–40
QUIESCENT CURRENT (mA)
15
20
25
60
3576 G16
10
5
0–15 10 35 85
VBUS = 5V
5s MODE
1sMODE
TEMPERATURE (°C)
–40
0
QUIESCENT CURRENT (µA)
10
20
30
40
50
60
–15 10 35 60
3576 G17
85
VBUS = 5V
TEMPERATURE (°C)
–40
25
30
35
60
3576 G18
20
15
–15 10 35 85
10
5
0
BATTERY CURRENT (µA)
BAT = 3.8V
VBUS = 0V
SWITCHING
REGULATORS OFF
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed.
LTC3576/LTC3576-1
9
3576fb
OTG Boost Quiescent Current
vs VOUT Voltage
OTG Boost VBUS Voltage
vs Load Current
OTG Boost Effi ciency
vs Load Current
OTG Boost Effi ciency
vs VOUT Voltage
OTG Boost Start-Up Time into
Current Source Load
vs VOUT Voltage
OTG Boost Burst Mode OperationOTG Boost Transient Response
OTG Boost Burst Mode Current
Threshold vs VOUT Voltage
OTG Boost Start-Up into Current
Source Load
VOUT (V)
2.90
0.5
QUIESCENT CURRENT (mA)
0.7
1.1
1.3
1.5
2.5
1.9
3.55 4.20
3576 G19
0.9
2.1
2.3
1.7
4.85 5.50
LOAD CURRENT (mA)
0 100
3.0
VBUS (V)
4.0
5.5
200 400 500
3576 G20
3.5
5.0
4.5
300 600 700
VOUT = 5V
VOUT = 4.4V
VOUT = 3.8V
VOUT = 3.2V
VBUS = 4.75V
IVBUS = 500mA
LOAD CURRENT (mA)
1
40
EFFICIENCY (%)
80
90
100
10 100 1000
3576 G21
70
60
50
VOUT = 5V
VOUT = 4.4V
VOUT = 3.8V
VOUT = 3.2V
VOUT (V)
2.90
EFFICIENCY (%)
80
85
5.50
3576 G22
75
70 3.55 4.20 4.85
95
90
500mA LOAD
100mA LOAD
VOUT (V)
2.9
1.50
TIME (ms)
1.75
2.00
2.25
2.50
3.4 3.9 4.4 4.9
3576 G23
5.4
22µF ON VBUS, 22µF AND
LOAD THROUGH OVP
22µF ON VBUS,
NO OVP
22µF ON VBUS,
LOAD THROUGH OVP
VOUT (V)
2.90
LOAD CURRENT (mA)
200
300
5.50
3576 G24
100
03.55 4.20 4.85
400
RISING THRESHOLD
FALLING THRESHOLD
VBUS
50mV/DIV
AC COUPLED
IVBUS
200mA/DIV
0mA
20µs/DIV 3576 G25
VOUT = 3.8V
IVBUS
200mA/DIV
VBUS
2V/DIV
0V
0mA
200µs/DIV 3576 G26
VOUT = 3.8V
ILOAD = 500mA
VBUS
50mV/DIV
AC COUPLED
VSW
1V/DIV
0V 50µs/DIVVOUT = 3.8V
ILOAD = 10mA
3576 G27
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed.
LTC3576/LTC3576-1
10
3576fb
Battery Charging from USB-HV
BUCK-USB USB OTG from BAT-HV BUCK-BAT
Oscillator Frequency
vs Temperature
OVP Connect Waveform OVP Disconnect Waveform
Rising OVP Threshold
vs Temperature
OVGATE vs OVSENS
OVGATE Quiescent Current
vs Temperature
RST3, CHRG Pin Current
vs Voltage (Pull-Down State)
VOUT
1V/DIV
AC COUPLED
VBUS
100mV/DIV
AC COUPLED
VSW
5V/DIV
HVOK
5V/DIV
0V
0V
500µs/DIV 3576 G28
VBUS = 5V
HVIN = 12V
USING LT3653
VOUT
1V/DIV
AC COUPLED
VBUS
200mV/DIV
AC COUPLED
IBAT
1A/DIV
HVOK
5V/DIV
0V
500µs/DIV 3576 G29
VBAT = 3.8V
IBUS = 285mA
HVIN = 12V
USING LT3653
0A
TEMPERATURE (°C)
–40
FREQUENCY (MHz)
2.20
2.25
2.30
60
3576 G30
2.15
2.10
2.05 –15 10 35 85
VOUT = 5V
VOUT = 4.2V
VOUT = 3.6V
VOUT = 3V
VOUT = 2.7V
VBUS
5V/DIV
OVGATE
5V/DIV
500µs/DIV 3576 G31
OVP INPUT
VOLTAGE
0V TO 5V
STEP 5V/DIV
VBUS
5V/DIV
OVGATE
5V/DIV
500µs/DIV 3576 G32
OVP INPUT
VOLTAGE
5V TO 10V
STEP 5V/DIV
TEMPERATURE (°C)
–40
OVP THRESHOLD (V)
6.270
6.275
6.280
60
3576 G33
6.265
6.260
6.255 –15 10 35 85
INPUT VOLTAGE (V)
0
0
OVGATE (V)
2
4
6
8
10
12
24 68
3576 G34
OVSENS CONNECTED
TO INPUT THROUGH
6.2k RESISTOR
TEMPERATURE (°C)
–40
QUIESCENT CURRENT (µA)
33
35
37
60
3576 G35
31
29
27 –15 10 35 85
VOVSENS = 5V
RST3, CHRG PIN VOLTAGE (V)
0
RST3,CHRG PIN CURRENT (mA)
60
80
100
4
3576 G36
40
20
01235
VBUS = 5V
BAT = 3.8V
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed.
LTC3576/LTC3576-1
11
3576fb
3.3V LDO Output Voltage
vs Load Current, VBUS = 0V
3.3V LDO Step Response
(5mA to 15mA)
Battery Drain Current
vs Battery Voltage
Switching Regulator Low Power
Quiescent Currents vs Temperature
Switching Regulator Current Limit
vs Temperature
RDS(ON) for Switching Regulator
Power Switches vs Temperature
Switching Regulators 1, 2
Pulse-Skipping Mode Effi ciency
Switching Regulators 1, 2
Burst Mode Effi ciency
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
3.0
3.2
20
3576 G37
2.8
2.6 510 15 25
3.4 BAT = 3.9V, 4.2V
BAT = 3.6V
BAT = 3V
BAT = 3.5V
BAT = 3.4V
BAT = 3.1V
BAT = 3.2V
BAT = 3.3V
ILDO3V3
5mA/DIV
0mA
20µs/DIVBAT = 3.8V 3576 G38
VLDO3V3
20mV/DIV
AC COUPLED
BATTERY VOLTAGE (V)
2.7
25
30
35
3.9
3576 G39
20
15
3.0 3.3 3.6 4.2
10
5
0
BATTERY CURRENT (µA)
IVOUT = 0mA
VBUS = 0V
VBUS = 5V
(SUSPEND MODE)
Switching Regulator Soft-Start
Waveform
VOUT 500mV/DIV
50µs/DIV 3576 G40
TEMPERATURE (°C)
–40
CURRENT LIMIT (A)
1.0
1.5
60
3576 G41
0.5
0–15 10 35 85
2.0
REGULATOR 3
REGULATORS 1, 2
VIN1,2,3 = 3.8V
TEMPERATURE (°C)
–40
ON-RESISTANCE (Ω)
0.6
0.8
1.0
60
3576 G42
0.4
0.2
0–15 10 35 85
NMOS SWITCH
NMOS SWITCH
PMOS SWITCH
REGULATORS 1, 2
REGULATOR 3
PMOS SWITCH
TEMPERATURE (°C)
–40
QUIESCENT CURRENTS (μA)
60
80
100
60
3576 G43
40
20
50
70
90
30
10
0–15 10 35 85
Burst Mode OPERATION
PULSE-SKIPPING MODE
LDO MODE
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3576 G44
01
VIN3 = 3.8V VOUT1,2 = 2.5V
VOUT1,2 = 1.2V
VOUT1,2 = 1.8V
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3576 G45
01
VIN3 = 3.8V VOUT1,2 = 2.5V
VOUT1,2 = 1.2V
VOUT1,2 = 1.8V
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed.
LTC3576/LTC3576-1
12
3576fb
Switching Regulator Constant
Frequency Quiescent Currents
Switching Regulator 3
Pulse-Skipping Mode Effi ciency
Switching Regulator 3
Burst Mode Effi ciency
Switching Regulators 1, 2
Feedback Voltage vs Load Current
Switching Regulators 1, 2
Transient Response
Switching Regulator Mode
Transition, Pulse-Skipping-LDO-
Pulse-Skipping
Switching Regulator 3 Feedback
Voltage vs Load Current
Switching Regulator 3
Transient Response
Switching Regulator Mode
Transition, Pulse-Skipping–Burst
Mode Operation–Pulse-Skipping
TEMPERATURE (°C)
–40
QUIESCENT CURRENT (mA)
3
4
5
35 85
3576 G46
2
1
0–15 10 60
6
7
8
SWITCHING
REGULATOR 3
SWITCHING
REGULATORS 1, 2
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3576 G47
01
VIN3 = 3.8V
VOUT3 = 2.5V
VOUT3 = 1.2V
VOUT3 = 1.8V
LOAD CURRENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3576 G48
01
VIN3 = 3.8V VOUT3 = 2.5V
VOUT3 = 1.2V
VOUT3 = 1.8V
LOAD CURRENT (mA)
0.800
FEEDBACK VOLTAGE (V)
0.810
0.820
0.795
0.805
0.815
0.1 10 100 1000
3576 G49
0.790
1
Burst Mode
OPERATION
PULSE-SKIPPING MODE
VOUT2
50mV/DIV
AC COUPLED
IOUT2
200mA/DIV
0mA
50µs/DIV 3576 G50
VIN2 = 3.8V
VOUT2 = 3.4V
VOUT3
50mV/DIV
AC COUPLED
VSW3
1V/DIV
0V
50µs/DIV 3576 G51
VIN3 = 3.8V
VOUT3 = 1.8V
IOUT3 = 50mA
LOAD CURRENT (mA)
0.795
FEEDBACK VOLTAGE (V)
0.800
0.805
0.810
0.1 10 100 1000
3576 G52
0.790 1
Burst Mode
OPERATION
PULSE-SKIPPING MODE
VOUT3
50mV/DIV
AC COUPLED
IOUT3
500mA/DIV
0mA
50µs/DIV 3576 G53
VIN3 = 3.8V
VOUT3 = 1.8V
VOUT3
50mV/DIV
AC COUPLED
VSW3
1V/DIV
0V
50µs/DIV 3576 G54
VIN3 = 3.8V
VOUT3 = 1.8V
IOUT3 = 100mA
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise specifi ed.
LTC3576/LTC3576-1
13
3576fb
PIN FUNCTIONS
CLPROG (Pin 1): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn or sourced from the
VBUS pins. A precise fraction, hCLPROG, of the VBUS cur-
rent is sent to the CLPROG pin when the PMOS switch of
the PowerPath switching regulator is on. The switching
regulator delivers power until the CLPROG pin reaches
1.18V in step-down mode and 1.15V in step-up mode.
When the switching regulator is in step-down mode,
CLPROG is used to regulate the average input current.
Several VBUS current limit settings are available via user
input which will typically correspond to the 500mA and
100mA USB specifi cations. When the switching regulator
is in step-up mode (USB on-the-go), CLPROG is used to
limit the average output current to 680mA. A multilayer
ceramic averaging capacitor or R-C network is required
at CLPROG for fi ltering.
LDO3V3 (Pin 2): 3.3V LDO Output Pin. This pin provides
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from VOUT
. It may be used for light loads
such as a watchdog microprocessor or real time clock.
A 1µF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
connecting it to VOUT
.
NTCBIAS (Pin 3): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
NTC (Pin 4): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a negative temperature coeffi cient
thermistor, which is typically co-packaged with the battery,
to determine if the battery is too hot or too cold to charge.
If the battery’s temperature is out of range, charging is
paused until it re-enters the valid range. A low drift bias
resistor is required from NTCBIAS to NTC and a thermistor
is required from NTC to ground. To disable NTC operation,
connect NTC to GND and leave NTCBIAS open.
OVGATE (Pin 5): Overvoltage Protection Gate Output.
Connect OVGATE to the gate pin of an external N-channel
MOS pass transistor. The source of the transistor should
be connected to VBUS and the drain should be connected
to the product’s DC input connector. In the absence of an
overvoltage condition, this pin is connected to an internal
charge pump capable of creating suffi cient overdrive to fully
enhance the pass transistor. If an overvoltage condition is
detected, OVGATE is brought rapidly to GND to prevent
damage to the LTC3576/LTC3576-1. OVGATE works in
conjunction with OVSENS to provide this protection.
OVSENS (Pin 6): Overvoltage Protection Sense Input.
OVSENS should be connected through a 6.2k resistor to
the input power connector and the drain of an external
N-channel MOS pass transistor. When the voltage on this
pin exceeds
VOVCUTOFF,
the OVGATE pin will be pulled
to GND to disable the pass transistor and protect the
LTC3576/LTC3576-1. The OVSENS pin shunts current
during an overvoltage transient in order to keep the pin
voltage at 6V.
FB1 (Pin 7): Feedback Input for Switching Regulator 1.
When regulator 1’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
value from the I2C serial port. See Table 4.
VIN1 (Pin 8): Power Input for Switching Regulator 1.
This pin will generally be connected to VOUT
. A 1µF MLCC
capacitor is recommended on this pin.
SW1 (Pin 9): Power Transmission Pin for Switching
Regulator 1.
EN1 (Pin 10): Logic Input. This logic input pin indepen-
dently enables switching regulator 1. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2µA internal pull-down
current source.
ENOTG (Pin 11): Logic Input. This logic input pin inde-
pendently enables the bidirectional switching regulator to
step up the voltage on VOUT and provide a 5V output on
VBUS for USB on-the-go applications. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2µA internal pull-down
current source.
LTC3576/LTC3576-1
14
3576fb
DVCC (Pin 12): Logic Supply for the I2C Serial Port. If the
serial port is not needed, it can be disabled by grounding
DVCC. When DVCC is grounded, the I2C bits are set to their
default values. See Table 3.
SCL (Pin 13): Clock Input Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to DVCC. If DVCC
is grounded, the SCL pin is equivalent to the C2, C4 and
C6 bits in the I2C serial port. SCL in conjunction with SDA
determine the operating modes of switching regulators 1,
2 and 3 when DVCC is grounded. See Tables 3 and 5. Has
a 2µA internal pull-down current source.
SDA (Pin 14): Data Input Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to DVCC. If DVCC
is grounded, the SDA pin is equivalent to the C3, C5 and
C7 bits in the I2C serial port. SDA in conjunction with SCL
determine the operating modes of switching regulators 1,
2 and 3 when DVCC is grounded. See Tables 3 and 5. Has
a 2µA internal pull-down current source.
NC (Pin 15): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to VIN3
in order to make the VIN3 PCB trace wider.
VIN3 (Pin 16): Power Input for Switching Regulator 3.
This pin will generally be connected to VOUT
. A 1µF MLCC
capacitor is recommended on this pin.
SW3 (Pin 17): Power Transmission Pin for Switching
Regulator 3.
NC (Pin 18): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to SW3
in order to make the SW3 PCB trace wider.
EN3 (Pin 19): Logic Input. This logic input pin indepen-
dently enables switching regulator 3. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2µA internal pull-down
current source.
FB3 (Pin 20): Feedback Input for Switching Regulator 3.
When regulator 3’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
value from the I2C serial port. See Table 4.
RST3 (Pin 21): Logic Output. This in an open-drain output
which indicates that switching regulator 3 has settled to
its fi nal value. It can be used as a power-on reset for the
primary microprocessor or to enable the other switching
regulators for supply sequencing.
EN2 (Pin 22): Logic Input. This logic input pin indepen-
dently enables switching regulator 2. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2µA internal pull-down
current source.
SW2 (Pin 23): Power Transmission Pin for Switching
Regulator 2.
VIN2 (Pin 24): Power Input for Switching Regulator 2.
This pin will generally be connected to VOUT
. A 1µF MLCC
capacitor is recommended on this pin.
FB2 (Pin 25): Feedback Input for Switching Regulator 2.
When regulator 2’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
value from the I2C serial port. See Table 4.
VC (Pin 26): Bat-Track External Switching Regulator
Control Output. This pin drives the VC pin of an external
Linear Technology step-down switching regulator. An
external P-channel MOSFET is sometimes required to
provide power to VOUT with its gate tied to the ACPR pin
(see the Applications Information section). In concert with
WALL and ACPR, it will regulate VOUT to maximize battery
charger effi ciency
WALL (Pin 27): External Power Source Sense Input. WALL
should be connected to the output of the external high
voltage switching regulator and to the drain of an external
P-channel MOSFET if used. It is used to determine when
power is applied to the external regulator. When power
is detected, ACPR is driven low and the USB input is au-
tomatically disabled. Pulling this pin above 4.3V enables
the VC pin.
PIN FUNCTIONS
LTC3576/LTC3576-1
15
3576fb
ACPR (Pin 28): External Power Source Present Output
(Active Low). ACPR indicates that the output of the external
high voltage step-down switching regulator is suitable for
use by the LTC3576/LTC3576-1. It should be connected to
the gate of an external P-channel MOSFET whose source
is connected to VOUT and whose drain is connected to
WALL. ACPR has a high level of VOUT and a low level of
GND. The USB bidirectional switcher is disabled when
ACPR is low.
PROG (Pin 29): Charge Current Program and Charge Cur-
rent Monitor Pin. Connecting a 1% resistor from PROG
to ground programs the charge current. If suffi cient input
power is available in constant-current mode, this pin servos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
IBAT =V
PROG
RPROG
• 1030
CHRG (Pin 30): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger.
Four possible charger states are represented by CHRG:
charging, not charging, unresponsive battery and battery
temperature out of range. In addition, CHRG is used to
indicate whether there is a short-circuit condition on VBUS
when the bidirectional switching regulator is in step-up
mode (on-the-go). CHRG is modulated at 35kHz and
switches between a low and a high duty cycle for easy
recognition by either humans or microprocessors. See
Table 1. CHRG requires a pull-up resistor and/or LED to
provide indication.
IDGATE (Pin 31): Ideal Diode Amplifi er Output. This pin
controls the gate of an optional external P-channel MOSFET
used as an ideal diode between VOUT and BAT. The external
ideal diode operates in parallel with the internal ideal diode.
The source of the P-channel MOSFET should be connected
to VOUT and the drain should be connected to BAT. If the
external ideal diode MOSFET is not used, IDGATE should
be left fl oating.
BAT (Pin 32): Single Cell Li-Ion Battery Pin. Depending on
available VBUS power, a Li-Ion battery on BAT will either
deliver power to VOUT through the ideal diode or be charged
from VOUT via the battery charger.
VOUT (Pin 33): Output Voltage of the Bidirectional
PowerPath Switching Regulator in step-down mode and
Input Voltage of the Battery Charger. The majority of the
portable product should be powered from VOUT
. The
LTC3576/LTC3576-1 will partition the available power
between the external load on VOUT and the internal bat-
tery charger. Priority is given to the external load and any
extra power is used to charge the battery. An ideal diode
from BAT to VOUT ensures that VOUT is powered even if
the load exceeds the allotted power from VBUS or if the
VBUS power source is removed. In on-the-go mode, this
pin delivers power to VBUS via the SW pin. VOUT should
be bypassed with a low impedance ceramic capacitor.
VBUS (Pins 34, 35): Power Pins. These pins deliver power
to VOUT via the SW pin by drawing controlled current from
a DC source such as a USB port or DC output wall adapter.
In on-the-go mode these pins provide power to external
loads. Tie the two VBUS pins together at the part and bypass
with a low impedance multilayer ceramic capacitor.
SW (Pin 36): The SW pin transfers power between VBUS
and VOUT via the bidirectional switching regulator. See
the Applications Information section for a discussion of
inductance value and current rating.
ILIM0, ILIM1 (Pins 37, 38): I LIM0 and ILIM1 control the current
limit of the PowerPath switching regulator. See Table 1.
Both the ILIM0 and ILIM1 pins are logically ORed with their
corresponding bits in the I2C serial port. See Tables 3 and 6.
Each has a 2µA internal pull-down current source.
Exposed Pad (Pin 39): Ground. The Exposed Pad should
be connected to a continuous ground plane on the second
layer of the printed circuit board by several vias directly
under the LTC3576/LTC3576-1.
PIN FUNCTIONS
LTC3576/LTC3576-1
16
3576fb
BLOCK DIAGRAM
16
20
39
+
+
–
+
–
ENABLE
VIN3
SW3
FB3
GND 3576 BD
37
ILIM0
30
CHRG
1
CLPROG
3
NTCBIAS
4
NTC
6
OVSENS
VC
5
OVGATE
38
ILIM1
11
ENOTG
10
EN1
22
EN2
19
EN3
12
DVCC
14
SDA
13
SCL
1A 2.25MHz
BUCK
REGULATOR
17
24
25
ENABLE
VIN2
SW2
FB2
400mA 2.25MHz
BUCK
REGULATOR
23
8
7
ENABLE
VIN1
29 PROG
32 BAT
15mV
0.3V
3.6V
IDEAL
1.18V
OR 1.15V
+
–
5.1V
SW1
FB1
21 RST3
400mA 2.25MHz
BUCK
REGULATOR
2.25MHz
BIDIRECTIONAL
PowerPath
SWITCHING
REGULATOR
9
D/A
D/A
D/A
4
4
4
I2C PORT
ILIM
DECODE
LOGIC
CC/CV
CHARGER
3.3V LDO
CHARGE
STATUS
OVP
27
26
28
WALL
DETECT
VC
CONTROL
31 IDGATE
33 VOUT
SW
ACPR
WALL
+
–
+
–
+–
BATTERY
TEMPERATURE
MONITOR
SUSPEND LDO
500µA/2.5mA
36
LDO3V3
2
35
VBUS
34
VBUS
LTC3576/LTC3576-1
17
3576fb
TIMING DIAGRAM
tSU,DAT
tHD,DAT
SDA
SCL
tHD,STA
tSU,STA
tHD,STA tSU,STO
3208 F05
tBUF
tLOW
tHIGH
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
trtf
tSP
I2C WRITE PROTOCOL
ACK
123
WRITE ADDRESS R/W
456789123456789123456789
00 010 01 0
00010010 A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
ACK
STOPSTART
SDA
SCL
ACK
SUB-ADDRESS INPUT DATA BYTE
3576 I2C
LTC3576/LTC3576-1
18
3576fb
OPERATION
Introduction
The LTC3576/LTC3576-1 are highly integrated power man-
agement ICs designed to make optimal use of the power
available from a variety of sources, while minimizing power
dissipation and easing thermal budgeting constraints.
They include a high effi ciency bidirectional PowerPath
switching regulator, a controller for an external high volt-
age step-down switching regulator, a battery charger, an
ideal diode, an always-on LDO, an overvoltage protection
circuit and three general purpose step-down switching
regulators. The entire chip is controlled by either direct
digital control or by an I2C serial port or both.
The innovative PowerPath architecture ensures that the
application is powered immediately after external voltage is
applied, even with a completely dead battery, by prioritizing
power to the application.
When acting as a step-down converter, the LTC3576/
LTC3576-1’s bidirectional switching regulator takes
power from USB, wall adapters, or other 5V sources and
provides power to the application and effi ciently charges
the battery using Bat-Track. Because power is conserved
the LTC3576/LTC3576-1 allow the load current on VOUT to
exceed the current drawn by the USB port making maxi-
mum use of the allowable USB power for battery charging.
For USB compatibility the switching regulator includes
a precision average input current limit. The PowerPath
switching regulator and battery charger communicate to
ensure that the average input current never exceeds the
USB specifi cations.
Additionally, the bidirectional switching regulator can also
operate as a 5V synchronous step-up converter taking
power from VOUT and delivering up to 500mA to VBUS
without the need for any additional external components.
This enables systems with USB dual-role transceivers to
function as USB on-the-go dual-role devices. True output
disconnect and average output current limit features are
included for short-circuit protection.
For automotive, fi rewire, and other high voltage applica-
tions, the LTC3576/LTC3576-1 provide Bat-Track control of
an external LTC step-down switching regulator to maximize
battery charger effi ciency and minimize heat production.
When power is available from both the USB and an auxiliary
input, the auxiliary input is given priority.
The LTC3576/LTC3576-1 contain both an internal 180mΩ
ideal diode as well as an ideal diode controller for use
with an optional external P-channel MOSFET. The ideal
diode(s) from BAT to VOUT guarantee that ample power
is always available to VOUT even if there is insuffi cient or
absent power at VBUS or WALL.
An always-on LDO provides a regulated 3.3V from avail-
able power at VOUT. Drawing very little quiescent current,
this LDO will be on at all times and can be used to supply
20mA.
The LTC3576/LTC3576-1 feature an overvoltage protection
circuit which is designed to work with an external N-chan-
nel MOSFET to prevent damage to their inputs caused by
accidental application of high voltage.
To prevent battery drain when a device is connected to a
suspended USB port, an LDO from VBUS to VOUT provides
either low power or high power USB suspend current to
the application.
The three general purpose switching regulators can be
independently enabled either by direct digital control or
by operating the I2C serial port. Under I2C control, all
three switching regulators have adjustable set points so
that voltages can be reduced when high processor perfor-
mance is not needed. Along with constant frequency PWM
mode, all three switching regulators have automatic Burst
Mode operation and LDO modes for signifi cantly reduced
quiescent current under light load conditions.
LTC3576/LTC3576-1
19
3576fb
OPERATION
Bidirectional PowerPath Switching Regulator—
Step-Down Mode
The power delivered from VBUS to VOUT is controlled by
a 2.25MHz constant frequency bidirectional switching
regulator operating in step-down mode. VOUT drives the
combination of the external load (step-down switching
regulators 1, 2 and 3) and the battery charger. To meet the
maximum USB load specifi cation, the switching regulator
contains a measurement and control system that ensures
that the average input current remains below the level
programmed at CLPROG.
If the combined load does not cause the switching regu-
lator to reach the programmed input current limit, V
OUT
will track approximately 0.3V above the battery voltage.
By keeping the voltage across the battery charger at this
low level, power lost to the battery charger is minimized.
Figure 1 shows the power fl ow in step-down mode.
If the combined external load plus battery charge current
is large enough to cause the switching regulator to reach
the programmed input current limit, the battery charger
will reduce its charge current by precisely the amount
necessary to enable the external load to be satisfi ed. Even
if the battery charge current is programmed to exceed the
allowable USB current, the USB specifi cation for average
input current will not be violated; the battery charger will
reduce its current as needed. Furthermore, if the load cur-
rent at V
OUT
exceeds the programmed power from V
BUS
,
load current will be drawn from the battery via the ideal
diode(s) even when the battery charger is enabled.
The current out of CLPROG is a precise fraction of the V
BUS
current. When a programming resistor and an averaging
capacitor are connected from CLPROG to GND, the volt-
age on CLPROG represents the average input current of
the switching regulator. As the input current approaches
the programmed limit, CLPROG reaches 1.18V and power
delivered by the switching regulator is held constant.
+
–
+
+
–
0.3V
1.18V 3.6V
CLPROG
ISWITCH/N
+–
+
–
15mV
OmV
IDEAL
DIODE
PWM AND
GATE DRIVE
AVERAGE VBUS INPUT
CURRENT LIMIT
CONTROLLER
VBUS
VOLTAGE
CONTROLLER
VOUT VOLTAGE
CONTROLLER
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
+
–
5V
1
IDGATE 31
VOUT 33
SW 3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
SINGLE CELL
Li-Ion
3576 F01
36
BAT
USB INPUT
BATTERY POWER
HV INPUT
32
TO USB
OR WALL
ADAPTER
35
+
5OVGATE
VBUS
34 VBUS
6OVSENS
s2
6V
OVERVOLTAGE PROTECTION
TO AUTOMOTIVE,
FIREWIRE, ETC.
ACPR
+
–
BAT + 0.3V
3.6V
VOUT
4.3V
+
+
–
+
–
28
WALL
Bat-Track HV CONTROL
27
VC
26
SW
FB
VIN
VC
HIGH VOLTAGE
STEP-DOWN
SWITCHING
REGULATOR
+
–
+–
Figure 1. PowerPath Block Diagram—Power Available from USB/Wall Adapter
LTC3576/LTC3576-1
20
3576fb
OPERATION
The input current limit is programmed by the ILIM0 and
ILIM1 pins or by the I2C serial port. The input current limit
has fi ve possible settings ranging from the USB suspend
limit of 500µA up to 1A for wall adapter applications. Two
of these settings are specifi cally intended for use in the
100mA and 500mA USB applications. Refer to Table 1 for
current limit settings using the ILIM0 and ILIM1 pins and
Table 6 for current limit settings using the I2C port.
Table 1. USB Current Limit Settings Using ILIM0 and ILIM1
ILIM1 ILIM0 USB SETTING
00
1× Mode (USB 100mA Limit)
01
10× Mode (Wall 1A Limit)
1 0 Low Power Suspend (USB 500µA Limit)
11
5× Mode (USB 500mA Limit)
When the switching regulator is activated, the average
input current will be limited by the CLPROG programming
resistor according to the following expression:
IVBUS =IVBUSQ +VCLPROG
RCLPROG
•h
CLPROG +1
()
where I
VBUSQ
is the quiescent current of the LTC3576/
LTC3576-1, V
CLPROG
is the CLPROG servo voltage in
current limit, R
CLPROG
is the value of the programming
resistor and h
CLPROG
is the ratio of the measured cur-
rent at V
BUS
to the sample current delivered to CLPROG.
Refer to the Electrical Characteristics table for values of
h
CLPROG
, V
CLPROG
and I
VBUSQ
. Given worst-case circuit
tolerances, the USB specifi cation for the average input
current in 100mA or 500mA mode will not be violated,
provided that R
CLPROG
is 3.01k or greater.
While not in current limit, the switching regulator’s
Bat-Track feature will set V
OUT
to approximately 300mV
above the voltage at BAT. However, if the voltage at BAT
is below 3.3V, and the load requirement does not cause
the switching regulator to exceed its current limit, V
OUT
will regulate at a fi xed 3.6V as shown in Figure 2. This
instant-on operation will allow a portable product to run
immediately when power is applied without waiting for the
battery to charge. If the load does exceed the current limit
at V
BUS
, V
OUT
will range between the no-load voltage and
slightly below the battery voltage, indicated by the shaded
region of Figure 2.
BAT (V)
2.4
4.5
4.2
3.9
3.6
3.3
3.0
2.7
2.4 3.3 3.9
3576 F02
2.7 3.0 3.6 4.2
VOUT (V)
NO LOAD
300mV
Figure 2. VOUT vs BAT
For very low-battery voltages, the battery charger acts like
a load and, due to limited input power, its current will tend
to pull V
OUT
below the 3.6V instant-on voltage. To prevent
V
OUT
from falling below this level, an undervoltage circuit
automatically detects that V
OUT
is falling and reduces the
battery charge current as needed. This reduction ensures
that load current and voltage are always prioritized while
allowing as much battery charge current as possible. See
Battery Charger Over Programming in the Applications
Information section.
The voltage regulation loop is compensated by the ca-
pacitance on V
OUT
. A 10µF MLCC capacitor is required
for loop stability. Additional capacitance beyond this value
will improve transient response.
An internal undervoltage lockout circuit monitors VBUS and
keeps the switching regulator off until VBUS rises above
4.30V and is about 200mV above the battery voltage.
Hysteresis on the UVLO turns off the regulator if VBUS
falls below 4V or to within 50mV of the battery voltage.
When this happens, system power at VOUT will be drawn
from the battery via the ideal diode(s).
Bidirectional PowerPath Switching Regulator—
Step-Up Mode
For USB on-the-go applications, the bidirectional
PowerPath switching regulator acts as a step-up converter
to deliver power from VOUT to VBUS. The power from VOUT
can come from the battery or the output of the external
LTC3576/LTC3576-1
21
3576fb
OPERATION
high voltage switching regulator. As a step-up converter,
the bidirectional switching regulator produces 5V on
VBUS and is capable of delivering at least 500mA. USB
on-the-go can be enabled by either the external control
pin, ENOTG, or via I2C. Figure 3 shows the power fl ow
in step-up mode.
An undervoltage lockout circuit monitors VOUT and pre-
vents step-up conversion until VOUT rises above 2.8V. To
prevent backdriving of VBUS when input power is available,
the VBUS undervoltage lockout circuit prevents step-up
conversion if VBUS is greater than 4.3V at the time step-up
mode is enabled. The switching regulator is also designed
to allow true output disconnect by eliminating body diode
conduction of the internal PMOS switch. This allows VBUS
to go to zero volts during a short-circuit condition or while
shut down, drawing zero current from VOUT
.
The voltage regulation loop is compensated by the capaci-
tance on VBUS. A 4.7µF MLCC is required for loop stability.
Additional capacitance beyond this value will improve
transient response. The VBUS voltage has approximately
3% load regulation up to an output current of 500mA. At
light loads, the switching regulator goes into Burst Mode
operation. The regulator will deliver power to VBUS until it
reaches 5.1V after which the NMOS and PMOS switches
shut off. The regulator delivers power again to VBUS once
it falls below 5.1V.
The switching regulator features both peak inductor and
average output current limit. The peak current mode
architecture limits peak inductor current on a cycle-by-
cycle basis. The peak current limit is equal to VBUS/2 to
a maximum of 1.8A so that in the event of a sudden short
circuit, the current limit will fold back to a lower value.
In step-up mode, the voltage on CLPROG represents the
average output current of the switching regulator when
a programming resistor and an averaging capacitor are
connected from CLPROG to GND. With a 3.01k resistor
on CLPROG, the bidirectional switching regulator has an
output current limit of 680mA. As the output current ap-
+
–
+
+
–
0.3V
1.15V 3.6V
CLPROG
ISWITCH/N
+–
+
–
15mV
OmV
IDEAL
DIODE
PWM AND
GATE DRIVE
AVERAGE VBUS OUTPUT
CURRENT LIMIT
CONTROLLER
VBUS
VOLTAGE
CONTROLLER
VOUT VOLTAGE
CONTROLLER
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
+
–
5V
1
IDGATE 31
VOUT 33
SW 3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
SINGLE CELL
Li-Ion
3576 F03
36
BAT 32
TO USB
CABLE 35
+
5OVGATE
VBUS
34 VBUS
6OVSENS
TO AUTOMOTIVE,
FIREWIRE, ETC.
ACPR
BAT + 0.3V
3.6V
VOUT
4.3V
+
+
–
+
–
28
WALL
Bat-Track HV CONTROL
27
VC
6V
26
SW
FB
VIN
VC
HIGH VOLTAGE
STEP-DOWN
SWITCHING
REGULATOR
+
–
s2
OVERVOLTAGE PROTECTION
+
–
+–
BATTERY POWER
HV INPUT
Figure 3. PowerPath Block Diagram—USB On-the-Go
LTC3576/LTC3576-1
22
3576fb
OPERATION
proaches this limit CLPROG servos to 1.15V and VBUS falls
rapidly to VOUT
. When VBUS is close to VOUT there may not
be suffi cient negative slope on the inductor current when
the PMOS switch is on to balance the rise in the inductor
current when the NMOS switch is on. This will cause the
inductor current to run away and the voltage on CLPROG
to rise. When CLPROG reaches 1.2V the switching of the
synchronous PMOS is terminated and VOUT is applied
statically to its gate. This ensures that the inductor current
will have suffi cient negative slope during the time current
is fl owing to the output. The PMOS will resume switching
when CLPROG drops down to 1.15V.
The LTC3576/LTC3576-1 maintain voltage regulation even
if VOUT is above VBUS. This is achieved by disabling the
PMOS switch. The PMOS switch is enabled when VBUS
rises above VOUT + 180mV and is disabled when it falls
below VOUT + 70mV to prevent the inductor current from
running away when not in current limit. Since the PMOS
no longer acts as a low impedance switch in this mode,
there will be more power dissipation within the IC. This
will cause a sharp drop in effi ciency.
If VBUS is less than 4V and the PMOS switch is disabled
for more than 7.2ms a short-circuit fault will be declared
and the part will shut off. The CHRG pin will blink at 35kHz
with a duty cycle that varies between 12% and 88% at a
4Hz rate. See Table 2. To re-enable step-up mode, the
ENOTG pin or, with ENOTG grounded, the B0 bit in the
I2C port must be cycled low and then high.
Bat-Track Auxiliary High Voltage Switching Regulator
Control
The WALL, ACPR and
VC
pins can be used in conjunction
with an external high voltage step-down switching regula-
tor such as the LT
®
3480 or the LT3653 to minimize heat
production when operating from higher voltage sources,
as shown in Figures 1 and 3. Bat-Track control circuitry
regulates the external switching regulator’s output voltage
to the larger of (BAT + 300mV) or 3.6V. This maximizes
battery charger effi ciency while still allowing instant-on
operation when the battery is deeply discharged.
The feedback network of the high voltage regulator should
be set to generate an output voltage between 4.5V and
5.5V. When high voltage is applied to the external regulator,
WALL will rise toward this programmed output voltage.
When WALL exceeds approximately 4.3V, ACPR is brought
low and the Bat-Track control of the LTC3576/LTC3576-1
overdrives the local VC control of the external high volt-
age step-down switching regulator. Therefore, once the
Bat-Track control is enabled, the output voltage is set in-
dependent of the switching regulator feedback network.
Bat-Track control provides a signifi cant effi ciency advantage
over the simple use of a 5V switching regulator output to
drive the battery charger. With a 5V output driving VOUT
,
battery charger effi ciency is approximately:
ηTOTAL =η
BUCK •VBAT
5V
where
ηBUCK
is the effi ciency of the high voltage switching
regulator and 5V is the output voltage of the switching
regulator. With a typical switching regulator effi ciency of
87% and a typical battery voltage of 3.8V, the total bat-
tery charger effi ciency is approximately 66%. Assuming
a 1A charge current, 1.7W of power is dissipated just to
charge the battery!
With Bat-Track, battery charger effi ciency is approxi-
mately:
ηTOTAL =η
BUCK •VBAT
VBAT +0.3V
With the same assumptions as above, the total battery
charger effi ciency is approximately 81%. This example
works out to less than 1W of power dissipation, or almost
60% less heat.
See the Typical Applications section for complete circuits
using the LT3480 and the LT3653 with Bat-Track control.
Ideal Diode(s) from BAT to VOUT
The LTC3576/LTC3576-1 each have an internal ideal diode as
well as a controller for an optional external ideal diode. Both
the internal and the external ideal diodes are always on and
will respond quickly whenever V
OUT
drops below BAT.
If the load current increases beyond the power allowed
from the switching regulator, additional power will be
pulled from the battery via the ideal diode(s). Further-
more, if power to V
BUS
(USB or wall adapter) is removed,
LTC3576/LTC3576-1
23
3576fb
OPERATION
then all of the application power will be provided by the
battery via the ideal diodes. The ideal diode(s) will be fast
enough to keep V
OUT
from drooping with only the stor-
age capacitance required for the switching regulator. The
internal ideal diode consists of a precision amplifi er that
activates a large on-chip P-channel MOSFET whenever
the voltage at V
OUT
is approximately 15mV (V
FWD
) below
the voltage at BAT. Within the amplifi er’s linear range, the
small-signal resistance of the ideal diode will be quite low,
keeping the forward drop near 15mV. At higher current
levels, the MOSFET will be in full conduction.
To supplement the internal ideal diode, an external
P-channel MOSFET may be added from BAT to V
OUT
. The
IDGATE pin of the LTC3576/LTC3576-1 drives the gate of
the external P-channel MOSFET for automatic ideal diode
control. The source of the external P-channel MOSFET
should be connected to V
OUT
and the drain should be con-
nected to BAT. Capable of driving a 1nF load, the IDGATE
pin can control an external P-channel MOSFET transistor
having an on-resistance of 30mΩ or lower.
Suspend LDO
If the LTC3576/LTC3576-1 are confi gured for USB suspend
mode, the bidirectional switching regulator is disabled and
the suspend LDO provides power to the VOUT pin (presum-
ing there is power available to VBUS). This LDO will prevent
the battery from running down when the portable product
has access to a suspended USB port. Regulating at 4.6V,
this LDO only becomes active when the switching converter
is disabled (suspended). The suspend LDO sends a scaled
copy of the V
BUS
current to the CLPROG pin, which will
servo to approximately 100mV in this mode. To remain
compliant with the USB specifi cation, the input to the LDO
is current limited so that it will not exceed the low power
or high power suspend specifi cation. If the load on V
OUT
exceeds the suspend current limit, the additional current
will come from the battery via the ideal diode(s).
3.3V Always-On LDO Supply
The LTC3576/LTC3576-1 include a low quiescent current
low dropout regulator that is always powered. This LDO
can be used to provide power to a system pushbutton
controller, standby microcontroller or real time clock. De-
signed to deliver up to 20mA, the always-on LDO requires
at least a 1F low impedance ceramic bypass capacitor
for compensation. The LDO is powered from VOUT, and
therefore will enter dropout at loads less than 20mA as
VOUT falls near 3.3V. If the LDO3V3 output is not used, it
should be disabled by connecting it to VOUT
.
Battery Charger
The LTC3576/LTC3576-1 include a constant-current/con-
stant-voltage battery charger with automatic recharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection and thermistor sensor input
for out-of-temperature charge pausing.
Battery Preconditioning
When a battery charge cycle begins, the battery charger
fi rst determines if the battery is deeply discharged. If the
battery voltage is below V
TRKL
, typically 2.85V, an automatic
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates via the CHRG pin that the battery
was unresponsive.
Once the battery voltage is above 2.85V, the charger begins
charging in full power constant-current mode. The cur-
rent delivered to the battery will try to reach 1030/R
PROG
.
Depending on available input power and external load
conditions, the battery charger may or may not be able
to charge at the full programmed rate. The external load
will always be prioritized over the battery charge current.
FORWARD VOLTAGE (mV) (BAT – VOUT)
0
CURRENT (mA)
600
1800
2000
2200
120 240 300
3576 F04
200
1400
1000
400
1600
0
1200
800
60 180 360 480420
VISHAY Si2333
OPTIONAL EXTERNAL
IDEAL DIODE
LTC3576/
LTC3576-1
IDEAL DIODE
ON
SEMICONDUCTOR
MBRM120LT3
Figure 4. Ideal Diode V-I Characteristics
LTC3576/LTC3576-1
24
3576fb
OPERATION
Likewise, the USB current limit programming will always
be observed and only additional power will be available to
charge the battery. When system loads are light, battery
charge current will be maximized.
Charge Termination
The battery charger has a built-in safety timer. When the
voltage on the battery reaches the pre-programmed fl oat
voltage, the battery charger will regulate the battery volt-
age and the charge current will decrease naturally. Once
the battery charger detects that the battery has reached
the fl oat voltage, the four hour safety timer is started.
After the safety timer expires, charging of the battery will
discontinue and no more current will be delivered.
Automatic Recharge
After the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that the
battery is always topped off, a charge cycle will automatically
begin when the battery voltage falls below the recharge
threshold which is typically 100mV less than the charger’s
fl oat voltage. In the event that the safety timer is running
when the battery voltage falls below the recharge threshold,
it will reset back to zero. To prevent brief excursions below
the recharge threshold from resetting the safety timer, the
battery voltage must be below the recharge threshold for
more than 1ms. The charge cycle and safety timer will
also restart if the VBUS UVLO cycles low and then high
(e.g., VBUS is removed and then replaced), or if the battery
charger is cycled on and off by the I2C port.
Charge Current
The charge current is programmed using a single resis-
tor from PROG to ground. 1/1030th of the battery charge
current is sent to PROG which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
1030 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equation:
ICHG =V
PROG
RPROG
• 1030
In either the constant-current or constant-voltage charging
modes, the voltage at the PROG pin will be proportional to
the actual charge current delivered to the battery. There-
fore, the actual charge current can be determined at any
time by monitoring the PROG pin voltage and using the
following equation:
IBAT =V
PROG
RPROG
•1030
In many cases, the actual battery charge current, IBAT
, will
be lower than ICHG due to limited input power available and
prioritization with the system load drawn from VOUT
.
The Battery Charger Flow Chart illustrates the battery
charger’s algorithm.
Charge Status Indication
The CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG which
include charging, not charging, unresponsive battery and
battery temperature out of range.
The signal at the CHRG pin can be easily recognized as
one of the above four states by either a human or a mi-
croprocessor. An open-drain output, the CHRG pin can
drive an indicator LED through a current limiting resistor
for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either low for charging,
high for not charging, or it is switched at high frequency
(35kHz) to indicate the two possible faults, unresponsive
battery and battery temperature out of range.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When
charging is complete, i.e., the BAT pin reaches the fl oat
voltage and the charge current has dropped to one-tenth
of the programmed value, the CHRG pin is released (Hi-Z).
If a fault occurs, the pin is switched at 35kHz. While
switching, its duty cycle is modulated between a high
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
LTC3576/LTC3576-1
25
3576fb
OPERATION
Battery Charger Flow Chart
CLEAR EVENT TIMER
NTC OUT OF RANGE
CHRG CURRENTLY
HIGH-Z
INDICATE
NTC FAULT
AT CHRG
BATTERY STATE
CHARGE AT
1030V/RPROG RATE
PAUSE EVENT TIMER
PAUSE EVENT TIMER
CHARGE WITH
FIXED VOLTAGE
(VFLOAT)
RUN EVENT TIMER
CHARGE AT
100V/RPROG (C/10 RATE)
RUN EVENT TIMER
ASSERT CHRG LOW
POWER ON/
ENABLE CHARGER
TIMER > 30 MINUTES TIMER > 4 HOURS
BAT > 2.85V BAT < VRECHRG
IBAT < C/10
NO
NO YES
YES
YES
YES
YES
YES
NO
NO
BAT > VFLOAT – EBAT < 2.85V
2.85V < BAT < VFLOAT – E
NO
NO
NONO
INHIBIT CHARGING STOP CHARGING
INDICATE BATTERY
FAULT AT CHRG
BAT RISING
THROUGH
VRECHRG
BAT FALLING
THROUGH
VRECHRG
CHRG HIGH-Z CHRG HIGH-Z
3576 FLOW
NO
YES
YES
INHIBIT CHARGING
YES
LTC3576/LTC3576-1
26
3576fb
OPERATION
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
The CHRG pin does not respond to the C/10 threshold
if the LTC3576/LTC3576-1 is in VBUS current limit. This
prevents false end of charge indications due to insuffi cient
power available to the battery charger.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. CHRG Signal
STATUS FREQUENCY
MODULATION
(BLINK) FREQUENCY DUTY CYCLES
Charging 0Hz 0Hz (Low-Z) 100%
Not Charging 0Hz 0Hz (Hi-Z) 0%
NTC Fault 35kHz 1Hz at 50% 6%, 94%
Bad Battery
or On-The-Go
Short-Circuit
Fault
35kHz 4Hz at 50% 12%, 88%
An NTC fault is represented by a 35kHz pulse train whose
duty cycle alternates between 6% and 94% at a 1Hz rate. A
human will easily recognize the 1Hz rate as a “slow” blink-
ing which indicates the out-of-range battery temperature
while a microprocessor will be able to decode either the
6% or 94% duty cycles as an NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pin gives the bad battery fault indication. For this fault, a
human would easily recognize the 4Hz “fast” blink of the
LED while a microprocessor would be able to decode either
the 12% or 88% duty cycles as a bad battery fault.
Note that the LTC3576/LTC3576-1 are 3-terminal
PowerPath products where system load is always priori-
tized over battery charging. Due to excessive system load,
there may not be suffi cient power to charge the battery
beyond the trickle charge threshold voltage within the bad
battery timeout period. In this case, the battery charger
will falsely indicate a bad battery. System software may
then reduce the load and reset the battery charger to try
again.
In addition to charge status, the CHRG pin is also used
to indicate whether there is a short-circuit condition on
VBUS when the bidirectional switching regulator is in on-
the-go mode. When a short-circuit condition is detected,
CHRG will blink with the same modulation frequency and
duty cycle as a bad battery fault. If the charger is on at the
same time that on-the-go is enabled, a 4Hz modulation of
12% and 88% duty cycles on CHRG could indicate a bad
battery or a short-circuit fault on VBUS. System software
should turn off the charger or on-the-go to determine
which fault has occurred.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
NTC Thermistor
The battery temperature is measured by placing a nega-
tive temperature coeffi cient (NTC) thermistor close to the
battery pack.
To use this feature connect the NTC thermistor, R
NTC
, be-
tween the NTC pin and ground and a bias resistor, R
NOM
,
from NTCBIAS to NTC. R
NOM
should be a 1% 200ppm
resistor with a value equal to the value of the chosen NTC
thermistor at 25°C (R25).
The LTC3576/LTC3576-1 pauses charging when the re-
sistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k for a 100k thermistor.
For a Vishay Curve 1 thermistor, this corresponds to ap-
proximately 40°C. If the battery charger is in constant
voltage (fl oat) mode, the safety timer also pauses until the
thermistor indicates a return to a valid temperature. As the
temperature drops, the resistance of the NTC thermistor
rises. The LTC3576/LTC3576-1 are also designed to pause
charging when the value of the NTC thermistor increases
to 3.25 times the value of R25. For a Vishay Curve 1
100k thermistor, this resistance, 325k, corresponds to
approximately 0°C. The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscilla-
tion about the trip point. Grounding the NTC pin disables
all NTC functionality.
LTC3576/LTC3576-1
27
3576fb
OPERATION
Thermal Regulation
To prevent thermal damage to the LTC3576/LTC3576-1 or
surrounding components, an internal thermal feedback
loop will automatically decrease the programmed charge
current if the die temperature rises to 105°C. This thermal
regulation technique protects the LTC3576/LTC3576-1
from excessive temperature due to high power operation
or high ambient thermal conditions, and allows the user
to push the limits of the power handling capability with
a given circuit board design. The benefi t of the LTC3576/
LTC3576-1 thermal regulation loop is that charge current
can be set according to actual conditions rather than
worst-case conditions for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Overvoltage Protection
The LTC3576/LTC3576-1 can protect itself from the inadver-
tent application of excessive voltage to VBUS or WALL with
just two external components: an N-channel MOSFET and
a 6.2k resistor. The maximum safe overvoltage magnitude
will be determined by the choice of the external MOSFET
and its associated drain breakdown voltage.
The overvoltage protection module consists of two pins.
The fi rst, OVSENS, is used to measure the externally ap-
plied voltage through an external resistor. The second,
OVGATE, is an output used to drive the gate pin of the
external MOSFET. When OVSENS is below 6V, an internal
charge pump will drive OVGATE to approximately 1.88 ×
OVSENS. This will enhance the N-channel MOSFET and
provide a low impedance connection to VBUS or WALL
which will, in turn, power the LTC
3576/LTC3576-1
. If
OVSENS should rise above 6V due to a fault or use of
an incorrect wall adapter, OVGATE will be pulled to GND
disabling the external MOSFET and therefore protecting
downstream circuitry. When the voltage drops below 6V
again, the external MOSFET will be re-enabled.
When USB on-the-go is enabled, the bidirectional switch-
ing regulator powers up the overvoltage protection circuit
through the body diode of the external MOSFET, thus pro-
viding protection to the part even when VBUS is sourcing
power. When high voltage is applied to the drain of the
external MOSFET, VBUS will remain at 5V. Once the high
voltage is removed, the drain of the external MOSFET
will return to 5V.
The charge pump output on OVGATE has limited output
drive capability. Care must be taken to avoid leakage on
this pin as it may adversely affect operation.
See the Applications Information section for resistor power
dissipation rating calculations, a table of recommended
components, and examples of dual-input and reverse
input protection.
I2C Interface
The LTC3576/LTC3576-1 may receive commands from a
host (master) using the standard 2-wire I2C interface. The
Timing Diagram shows the timing relationship of the sig-
nals on the bus. The two bus lines, SDA and SCL, must be
HIGH when the bus is not in use. External pull-up resistors
or current sources, such as the LTC1694 I2C accelerator,
are required on these lines. The LTC3576/LTC3576-1are
receive-only slave devices. The I2C control signals, SDA
and SCL are scaled internally to the DVCC supply. DVCC
should be connected to the same power supply as the
microcontroller generating the I2C signals.
The I2C port has an undervoltage lockout on the DVCC
pin. When DVCC is below approximately 1V, the I2C serial
port is cleared and switching regulators 1, 2 and 3 are
set to full scale.
Bus Speed
The I2C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
operation when addressed from an I2C compliant master
device. It also contains input fi lters designed to suppress
glitches should the bus become corrupted.
Start and Stop Conditions
A bus master signals the beginning of a communication
to a slave device by transmitting a START condition. A
START condition is generated by transitioning SDA from
high to LOW while SCL is HIGH. When the master has
fi nished communicating with the slave, it issues a STOP
condition by transitioning SDA from LOW to HIGH while
SCL is high. The bus is then free for communication with
another I2C device.
LTC3576/LTC3576-1
28
3576fb
OPERATION
Byte Format
Each byte sent to the LTC3576/LTC3576-1 must be eight bits
long followed by an extra clock cycle for the acknowledge
bit. The data should be sent to the LTC3576/LTC3576-1
with the most signifi cant bit (MSB) fi rst.
Acknowledge
The acknowledge signal is used for handshaking between
the master and the slave. An acknowledge (active low)
generated by the slave (LTC3576/LTC3576-1) lets the mas-
ter know that the latest byte of information was received.
The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (HIGH) during
the acknowledge clock cycle. The slave-receiver must pull
down the SDA line during the acknowledge clock pulse
so that it remains a stable LOW during the HIGH period
of this clock pulse.
Slave Address
The address byte consists of the 7-bit address and the
read/write (R/W) bit. The LTC3576/LTC3576-1 respond to
only one 7-bit address which has been factory programmed
to 0001001. The R/W bit is the least signifi cant bit of the
address byte. It must be 0 for the LTC3576/LTC3576-1 to
recognize the address since they are write only devices.
Thus the address byte is 0x12. If the correct seven bit ad-
dress is given but the R/W bit is 1, the LTC3576/LTC3576-1
will not respond.
Sub-Addressed Writing
The LTC3576/LTC3576-1 have four command registers
for control input. They are accessed by the I2C port via a
sub-addressed writing system.
Each write to the LTC3576/LTC3576-1 consists of three
bytes. The fi rst byte is always the LTC3576/LTC3576-1’s
write address. The second byte represents the LTC3576/
LTC3576-1’s sub-address. The sub-address acts as
pointer to direct the subsequent data byte within the
LTC3576/LTC3576-1. The third byte consists of the data to
be written to the location pointed to by the sub-address.
The LTC
3576/LTC3576-1
contain four sub-addresses at
locations 0x00, 0x01, 0x02 and 0x03.
Bus Write Operation
The master initiates communication with the LTC3576/
LTC3576-1 with a START condition and a 7-bit address
followed by the R/W bit = 0. If the address matches that
of the LTC3576/LTC3576-1, the LTC3576/LTC3576-1 return
an acknowledge. The master should then deliver the sub-
address. Again the LTC3576/LTC3576-1 acknowledge and
the cycle is repeated for the data byte. The data byte is
transferred to an internal holding latch upon the return of its
acknowledge by the LTC3576/LTC3576-1. This procedure
must be repeated for each sub-address that requires new
data. After one or more data bytes have been transferred
to the LTC3576/LTC3576-1, the master may terminate the
communication with a STOP condition. Alternatively, a
repeated START condition can be initiated by the master
and another chip on the I2C bus can be addressed. This
cycle can continue indefi nitely and the LTC3576/LTC3576-1
remembers the last input of valid data that it received.
Once all chips on the bus have been addressed and sent
valid data, a global STOP condition can be sent and the
LTC3576/LTC3576-1 will update their command latches
with the data that they have received.
In certain circumstances the data on the I2C bus may be-
come corrupted. In these cases, the LTC3576/LTC3576-1
respond appropriately by preserving only the last set
of complete data that they have received. For example,
assume the LTC3576/LTC3576-1 have been successfully
addressed and are receiving data when a STOP condition
mistakenly occurs. The LTC3576/LTC3576-1 will ignore this
STOP condition and will not respond until a new START
condition, correct address and sub-address, new set of
data and STOP condition are transmitted.
Likewise, with only one exception, if the LTC3576/
LTC3576-1 were previously addressed and sent valid data
but not updated with a STOP, they will respond to any
STOP that appears on the bus, independent of the num-
ber of repeated STARTs that have occurred. If a repeated
START is given and the LTC3576/LTC3576-1 successfully
acknowledge their address and sub-address, they will not
respond to a STOP until a full byte of the new data has
been received and acknowledged.
LTC3576/LTC3576-1
29
3576fb
OPERATION
Input Data
Table 3 illustrates the four data bytes that may be written
to the LTC3576/LTC3576-1.
The fi rst byte at sub-address 0 controls the servo volt-
age for switching regulators 1 and 2. The second byte at
sub-address 1 controls the servo voltage of switching
regulator 3 and the enable signals for all three switching
regulators, as well as the enable signal for the PowerPath
switching regulator to power up VBUS for USB on-the-go.
The servo voltages are decoded in Table 4. The default
servo voltage is 0.8V.
Table 3. I2C Serial Port Mapping*
A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
Switching Regulator 1 Voltage
(See Table 4) Switching Regulator 2 Voltage
(See Table 4) Switching Regulator 3 Voltage
(See Table 4)
ENABLE 3
ENABLE 2
ENABLE 1
ENABLE OTG
Reset Value 1 1 1 1111111110000
C7 C6 C5 C4 C3 C2 C1 C0 D7 D6 D5 D4 D3 D2 D1 D0
Switching
Regulator 1
Modes
(See Table 5)
Switching
Regulator 2
Modes
(See Table 5)
Switching
Regulator 3
Modes
(See Table 5)
Input Current
Limit
(See Table 6)
DISABLE BATTERY
CHARGER
HIGH POWER
SUSPEND
Unused
Reset Value 0 0 0 0000000000000
*The A7-A0 and B7-B4 bits default to 1 and all other bits default to 0 when the chip is powered and DVCC = 0.
Table 4. Switching Regulator Servo Voltage
A7 A6 A5 A4 Switching Regulator 1 Servo Voltage
A3 A2 A1 A0 Switching Regulator 2 Servo Voltage
B7 B6 B5 B4 Switching Regulator 3 Servo Voltage
0 0 0 0 0.425
0 0 0 1 0.450
0 0 1 0 0.475
0 0 1 1 0.500
0 1 0 0 0.525
0 1 0 1 0.550
0 1 1 0 0.575
0 1 1 1 0.600
1 0 0 0 0.625
1 0 0 1 0.650
1 0 1 0 0.675
1 0 1 1 0.700
1 1 0 0 0.725
1 1 0 1 0.750
1 1 1 0 0.775
1 1 1 1 0.800
LTC3576/LTC3576-1
30
3576fb
OPERATION
The third data byte at sub-address 2 controls the operating
modes of each switching regulator as well as the input
current limit settings. Each switching regulator can be
independently set to one of three operating modes listed
in Table 5.
Table 5. General Purpose Switching Regulator Modes
C7 (SDA)* C6 (SCL)* Switching Regulator 1 Mode
C5 (SDA)* C4 (SCL)* Switching Regulator 2 Mode
C3 (SDA)* C2 (SCL)* Switching Regulator 3 Mode
0 X Pulse-Skipping Mode
1 0 LDO Mode
1 1 Burst Mode Operation
*SDA and SCL take on this context only when DVCC = 0V.
The input current limit settings are decoded according
to Table 6. This table indicates the maximum current
that will be drawn from the VBUS pin in the event that the
load at VOUT (battery charger plus system load) exceeds
the power available. Any additional power will be drawn
from the battery. The start-up state for the input current
limit setting is 00 representing the low power 100mA
USB setting.
Table 6. USB Current Limit Settings
D6
C1
(ILIM1)*
C0
(ILIM0)* USB SETTING
X0 0
1× Mode (USB 100mA Limit)
X0 1
10× Mode (Wall 1A Limit)
0 1 0 Low Power Suspend (USB 500µA Limit)
1 1 0 High Power Suspend (USB 2.5mA Limit)
X1 1
5× Mode (USB 500mA Limit)
*ILIM1 and ILIM0 can only be used to enable the low power suspend mode
and are logically ORed with C1 and C0, respectively.
The fourth and fi nal byte of input data at sub-address 3
provides bits for disabling the battery charger and enabling
the high power suspend mode current limit of 2.5mA.
Disabling the I2C Port
The I2C serial port can be disabled by grounding the DVCC
pin. In this mode, the LTC3576/LTC3576-1 are controlled
through the individual logic input pins EN1, EN2, EN3,
ENOTG, ILIM0, ILIM1, SDA and SCL. Some functionality is
not available in this mode such as the programmability of
switching regulators 1, 2 and 3’s output voltage, the battery
charger disable feature and the high power suspend mode.
In this mode, the programmable switching regulators have
a fi xed servo voltage of 0.8V. Because the SDA and SCL
pins have no other context when DVCC is grounded, these
pins are re-mapped to control the switching regulator
mode bits C2 to C7. SCL maps to C2, C4 and C6 while
SDA maps to C3, C5 and C7.
RST3 Pin
The RST3 pin is an open-drain output used to indicate that
switching regulator 3 has been enabled and has reached
its fi nal voltage. RST3 remains low impedance until regula-
tor 3 reaches 92% of its regulation value.
A 230ms delay is included to allow a system microcontroller
ample time to reset itself. RST3 may be used as a power-
on reset to the microprocessor powered by regulator 3
or may be used to enable regulators 1 and/or 2 for supply
sequencing. RST3 is an open-drain output and requires
a pull-up resistor to the output voltage of regulator 3 or
another appropriate power source.
Shutdown Mode
The bidirectional USB switching regulator in step-down
mode is enabled whenever V
BUS
is above VUVLO and the
LTC3576/LTC3576-1are not in one of the two USB suspend
modes (500µA or 2.5mA). When power is available from
both the USB and auxiliary inputs, the auxiliary input is given
priority and the USB switching regulator is disabled.
The ideal diode(s) are enabled at all times and cannot be
disabled.
LTC3576/LTC3576-1
31
3576fb
OPERATION
Step-Down Switching Regulators
The LTC3576/LTC3576-1 contain three general purpose
2.25MHz step-down constant-frequency current mode
switching regulators. Two regulators provide up to 400mA
and a third switching regulator can provide up to 1A.
All three switching regulators can be programmed for
a minimum start-up output voltage of 0.8V and can be
used to power a microcontroller core, microcontroller
I/O, memory, disk drive or other logic circuitry. All three
switching regulators have I2C programmable set points for
on-the-fl y power savings. They also support 100% duty
cycle operation (low dropout mode) when their input volt-
age drops very close to their output voltage. To suit a variety
of applications, selectable mode functions can be used to
trade off noise for effi ciency. Three modes are available to
control the operation of the LTC3576/LTC3576-1’s general
purpose switching regulators. At moderate to heavy loads,
the pulse skip mode provides the lowest noise switching
solution. At lighter loads, Burst Mode operation or LDO
mode may be selected. The switching regulators include
soft-start to limit inrush current when powering on, short-
circuit current protection and switch node slew limiting
circuitry to reduce radiated EMI. No external compensa-
tion components are required. The operating mode of the
regulators may be set by either I2C control or by manual
control of the SDA and SCL pins if the I2C port is not used.
Each converter may be individually enabled by either their
external control pins EN1, EN2, EN3 or by the I2C port. All
three switching regulators have individual programmable
feedback servo voltages via I2C control. The switching
regulator input supplies VIN1, VIN2 and VIN3 will generally
be connected to the system load pin VOUT
.
Step-Down Switching Regulator Operating Modes
The LTC3576/LTC3576-1’s general purpose switching
regulators include three possible operating modes to meet
the noise/power needs of a variety of applications.
In pulse-skipping mode, an internal latch is set at the start
of every cycle which turns on the main P-channel MOSFET
switch. During each cycle, a current comparator compares
the peak inductor current to the output of an error amplifi er.
The output of the current comparator resets the internal
latch which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectifi er
to turn on. The N-channel MOSFET synchronous rectifi er
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifi er
drops to zero. Using this method of operation, the error
amplifi er adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the switching regulator requiring only a single
ceramic output capacitor for stability. At light loads in PWM
mode, the inductor current may reach zero on each pulse
which will turn off the N-channel MOSFET synchronous
rectifi er. In this case, the switch node (SW) goes high
impedance and the switch node voltage will “ring”. This
is discontinuous mode operation, and is normal behavior
for a switching regulator. At very light loads in pulse-skip-
ping mode, the switching regulators will automatically skip
pulses as needed to maintain output regulation.
At high duty cycles (VOUTx > VINx /2) it is possible for the
inductor current to reverse, causing the regulator to operate
continuously at light loads. This is normal and regulation is
maintained, but the supply current will increase to several
mA due to continuous switching.
LTC3576/LTC3576-1
32
3576fb
OPERATION
In Burst Mode operation, the switching regulator automati-
cally switches between fi xed frequency PWM operation and
hysteretic control as a function of the load current. At light
loads, the regulator operates in hysteretic mode and uses
a constant current algorithm to control the inductor cur-
rent. While in Burst Mode operation, the output capacitor
is charged to a voltage slightly higher than the regulation
point. The step-down switching regulator then goes into
sleep mode, during which the output capacitor provides
the load current. In sleep mode, most of the regulator’s
circuitry is powered down, conserving battery power.
When the output voltage drops below a pre-determined
value, the switching regulator circuitry is powered on and
another burst cycle begins. The duration for which the
regulator operates in sleep mode depends on the load
current. The sleep time decreases as the load current
increases. Burst Mode operation provides a signifi cant
improvement in effi ciency at light loads at the expense
of higher output ripple when compared to pulse-skipping
mode. At heavy loads Burst Mode operation functions in
the same manner as pulse-skipping mode.
Finally, the switching regulators have an LDO mode that
gives a DC option for regulating their output voltages. In
LDO mode, the switching regulators are converted to linear
regulators and deliver continuous power from their SWx
pins through their respective inductors. This mode gives
the lowest possible output noise as well as low quiescent
current at light loads.
The step-down switching regulators allow on-the-fl y mode
transitions, providing seamless transition between modes
even under load. This allows the user to switch back and
forth between modes to reduce output ripple or increase
low current effi ciency as needed.
Step-Down Switching Regulator Dropout Operation
It is possible for a switching regulator’s input voltage,
VINx, to approach its programmed output voltage (e.g., a
battery voltage of 3.4V with a programmed output voltage
of 3.3V). When this happens, the PMOS switch duty cycle
increases until it is turned on continuously at 100%. In this
dropout condition, the respective output voltage equals the
regulator’s input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
Step-Down Switching Regulator Low Supply Operation
The LTC3576/LTC3576-1 incorporate an undervoltage
lockout circuit on VOUT which shuts down the general
purpose switching regulators when VOUT drops below
VOUT(UVLO). This UVLO prevents unstable operation.
Step-Down Switching Regulator Soft-Start Operation
Soft-start is accomplished by gradually increasing the
peak inductor current for each switching regulator over a
500s period. This allows each output to rise slowly, help-
ing minimize the battery surge current. A soft-start cycle
occurs whenever a given switching regulator is enabled,
or after a fault condition has occurred (thermal shutdown
or UVLO). A soft-start cycle is not triggered by changing
operating modes. This allows seamless output operation
when transitioning between Burst Mode operation, pulse-
skipping mode or LDO mode.
Step-Down Switching Regulator Switching
Slew Rate Control
The step-down switching regulators contain new patent
pending circuitry to limit the slew rate of the switch node
(SWx). This new circuitry is designed to transition the
switch node over a period of a couple of nanoseconds,
signifi cantly reducing radiated EMI and conducted supply
noise.
Step-Down Switching Regulator in Shutdown
The step-down switching regulators are in shutdown when
not enabled for operation. In shutdown, all circuitry in
the step-down switching regulator is disconnected from
the switching regulator input supply leaving only a few
nanoamperes of leakage current. The step-down switching
regulator outputs are individually pulled to ground through
a 10k resistor on their SWx pins when in shutdown.
LTC3576/LTC3576-1
33
3576fb
APPLICATIONS INFORMATION
Bidirectional PowerPath Switching Regulator
CLPROG Resistor and Capacitor Selection
As described in the Bidirectional Switching Regula-
tor—Step-Down Mode section, the resistor on the
CLPROG pin determines the average VBUS input current
limit when the switching regulator is set to either the 1×
mode (USB 100mA), the 5× mode (USB 500mA) or the
10× mode. The VBUS input current will be comprised of
two components, the current that is used to drive V
OUT
and the quiescent current of the switching regulator. To
ensure that the USB specifi cation is strictly met, both
components of the input current should be considered.
The Electrical Characteristics table gives the typical values
for quiescent currents in all settings as well as current limit
programming accuracy. To get as close to the 500mA or
100mA specifi cations as possible, a precision resistor
should be used. Recall that:
I
VBUS = IVBUSQ + VCLPROG/RCLPPROG • (hCLPROG +1).
An averaging capacitor is required in parallel with the
resistor so that the switching regulator can determine the
average input current. This capacitor also provides the
dominant pole for the feedback loop when current limit
is reached. To ensure stability, the capacitor on CLPROG
should be 0.1µF or larger.
Bidirectional PowerPath Switching Regulator
Inductor Selection
Because the input voltage range and output voltage range
of the PowerPath switching regulator are both fairly nar-
row, the LTC3576/LTC3576-1 were designed for a specifi c
inductance value of 3.3µH. Some inductors which may be
suitable for this application are listed in Table 7.
Table 7. Recommended PowerPath Inductors for the LTC3576
INDUCTOR
TYPE
L
(μH)
MAX
IDC
(A)
MAX
DCR
(Ω)
SIZE IN mm
(L × W × H) MANUFACTURER
LPS4018 3.3 2.2 0.08 3.9 × 3.9 × 1.7 Coilcraft
www.coilcraft.com
D53LC
DB318C 3.3
3.3 2.26
1.55 0.034
0.070 5 × 5 × 3
3.8 × 3.8 × 1.8
Toko
www.toko.com
WE-TPC
Type M1 3.3 1.95 0.065 4.8 × 4.8 × 1.8 Wurth Electronik
www.we-online.com
CDRH6D12
CDRH6D38 3.3
3.3 2.2
3.5 0.063
0.020 6.7 × 6.7 × 1.5
7 × 7 × 4
Sumida
www.sumida.com
Bidirectional PowerPath Switching Regulator VBUS
and VOUT Bypass Capacitor Selection
The type and value of capacitors used with the LTC3576/
LTC3576-1 determine several important parameters such
as regulator control-loop stability and input voltage ripple.
Because the LTC3576/LTC3576-1 use a bidirectional
switching regulator between VBUS and VOUT, the VBUS
current waveform contains high frequency components.
It is strongly recommended that a low equivalent series
resistance (ESR) multilayer ceramic capacitor (MLCC) be
used to bypass VBUS. Tantalum and aluminum capacitors
are not recommended because of their high ESR. The value
of the capacitor on VBUS directly controls the amount of
input ripple for a given load current. Increasing the size
of this capacitor will reduce the input ripple.
The inrush current limit specifi cation for USB devices is
calculated in terms of the total number of Coulombs needed
to charge the VBUS bypass capacitor to 5V. The maximum
inrush charge for USB on-the-go devices is 33µC. This
places a limit of 6.5µF of capacitance on VBUS assuming
a linear capacitor. However, most ceramic capacitors have
a capacitance that varies with bias voltage. The average
capacitance needs to be less than 6.5µF over a 0V to 5V bias
voltage range to meet the inrush current limit specifi cation.
A 10µF capacitor in a 0805 package, such as the Murata
GRM21BR71A106KE51L would be a suitable VBUS bypass
capacitor. If more capacitance is required for better noise
performance and stability it should be connected directly to
the VBUS pin when using the overvoltage protection circuit.
This extra capacitance will be soft-connected over several
milliseconds to limit inrush current and avoid excessive
transient voltage drops on VBUS.
To prevent large V
OUT
voltage steps during transient load
conditions, it is also recommended that an MLCC be used
to bypass V
OUT
. The output capacitor is used in the com-
pensation of the switching regulator. At least 10µF with
low ESR are required on V
OUT
. Additional capacitance will
improve load transient performance and stability.
MLCCs typically have exceptional ESR performance.
MLCCs combined with a tight board layout and an unbroken
ground plane will yield very good performance and low
EMI emissions.
LTC3576/LTC3576-1
34
3576fb
APPLICATIONS INFORMATION
There are MLCCs available with several types of dielectrics
each having considerably different characteristics. For
example, X7R MLCCs have the best voltage and tempera-
ture stability. X5R MLCCs have apparently higher packing
density but poorer performance over their rated voltage
and temperature ranges. Y5V MLCCs have the highest
packing density, but must be used with caution, because
of their extreme nonlinear characteristic of capacitance
versus voltage. The actual in-circuit capacitance of a
ceramic capacitor should be measured with a small AC
signal and DC bias as is expected in-circuit. Many vendors
specify the capacitance versus voltage with a 1V
RMS
AC
test signal and, as a result, over state the capacitance that
the capacitor will present in the application. Using similar
operating conditions as the application, the user must
measure or request from the vendor the actual capacitance
to determine if the selected capacitor meets the minimum
capacitance that the application requires.
Step-Down Switching Regulator Output Voltage
Programming
All three switching regulators have I2C programmable
set points and can be programmed for start-up output
voltages of at least 0.8V. The full-scale output voltage for
each switching regulator is programmed using a resistor
divider from the switching regulator output connected to
the FBx pins such that:
VOUTx =VFBx R1
R2 +1
⎛
⎝
⎜⎞
⎠
⎟
where VFBx ranges from 0.425V to 0.8V. See Figure 5.
Typical values for R1 are in the range of 40k to 1M. The
capacitor CFB cancels the pole created by feedback resistors
and the input capacitance of the FBx pin and also helps
to improve transient response for output voltages much
greater than 0.8V. A variety of capacitor sizes can be used
for CFB but a value of 10pF is recommended for most ap-
plications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Step-Down Switching Regulator Inductor Selection
Many different sizes and shapes of inductors are avail-
able from numerous manufacturers. Choosing the right
inductor from such a large selection of devices can be
overwhelming, but following a few basic guidelines will
make the selection process much simpler.
The general purpose step-down converters are designed to
work with inductors in the range of 2H to 10H. For most
applications a 4.7H inductor is suggested for the lower
current switching regulators 1 and 2 and 2H is recom-
mended for the higher current switching regulator 3. Larger
value inductors reduce ripple current which improves out-
put ripple voltage. Lower value inductors result in higher
ripple current and improved transient response time. To
maximize effi ciency, choose an inductor with a low DC
resistance. For a 1.2V output, effi ciency is reduced about
2% for 100m series resistance at 400mA load current,
and about 2% for 300m series resistance at 100mA load
current. Choose an inductor with a DC current rating at
least 1.5 times larger than the maximum load current to
ensure that the inductor does not saturate during normal
operation. If output short circuit is a possible condition,
the inductor should be rated to handle the maximum peak
current specifi ed for the step-down converters. Different
core materials and shapes will change the size/current
and price/current relationship of an inductor. Toroid or
shielded pot cores in ferrite or Permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. Inductors that are very thin or
have a very small volume typically have much higher
core and DCR losses, and will not give the best effi ciency.
The choice of which style inductor to use often depends
more on the price vs size, performance and any radiated
EMI requirements than on what the LTC3576/LTC3576-1
require to operate.
VINx
LTC3576/
LTC3576-1
L
SWx
R1 COUT
CFB
VOUTx
R2
3576 F05
FBx
GND
Figure 5. Buck Converter Application Circuit
LTC3576/LTC3576-1
35
3576fb
The inductor value also has an effect on Burst Mode op-
eration. Lower inductor values will cause the Burst Mode
operation switching frequency to increase.
Table 8 shows several inductors that work well with the
LTC3576/LTC3576-1’s general purpose regulators. These
inductors offer a good compromise in current rating, DCR
and physical size. Consult each manufacturer for detailed
information on their entire selection of inductors.
Table 8. Recommended Inductors
INDUCTOR
TYPE
L
(μH)
MAX
IDC
(A)
MAX
DCR
(Ω)
SIZE IN mm
(L × W × H) MANUFACTURER
DE2818C
D312C
DE2812C
4.7
3.3
4.7
3.3
2.2
4.7
3.3
2.0
1.25
1.45
0.79
0.90
1.14
1.2
1.4
1.8
0.072
0.053
0.24
0.20
0.14
1.13*
0.10*
0.067*
3.0 × 2.8 × 1.8
3.0 × 2.8 × 1.8
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
Toko
www.toko.comm
CDRH3D16
CDRH2D11
CLS4D09
4.7
3.3
2.2
4.7
3.3
2.2
4.7
0.9
1.1
1.2
0.5
0.6
0.78
0.75
0.11
0.085
0.072
0.17
0.123
0.098
0.19
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
4.9 × 4.9 × 1.0
Sumida
www.sumida.com
SD3118
SD3112
SD12
SD10
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
1.3
1.59
2.0
0.8
0.97
1.12
1.29
1.42
1.80
1.08
1.31
1.65
0.162
0.113
0.074
0.246
0.165
0.14
0.117*
0.104*
0.075*
0.153*
0.108*
0.091*
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
Cooper
www.cooperet.com
LPS3015 4.7
3.3
2.2
1.1
1.3
1.5
0.2
0.13
0.11
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
Coilcraft
www.coilcraft.com
*Typical DCR
Step-Down Switching Regulator Input/Output Bypass
Capacitor Selection
Low ESR (equivalent series resistance) MLCCs should
be used at each switching regulator output as well as at
each switching regulator input supply (VINx). Only X5R
or X7R ceramic capacitors should be used because they
retain their capacitance over wider voltage and temperature
ranges than other ceramic types. A 10F output capaci-
APPLICATIONS INFORMATION
tor is suffi cient for most applications. For good transient
response and stability the output capacitor should retain
at least 4F of capacitance over operating temperature and
bias voltage. Each switching regulator input supply should
be bypassed with a 1F capacitor. Consult with capacitor
manufacturers for detailed information on their selection
and specifi cations of ceramic capacitors. Many manufac-
turers now offer very thin (<1mm tall) ceramic capacitors
ideal for use in height-restricted designs. Table 9 shows a
list of several ceramic capacitor manufacturers.
Table 9. Recommended Ceramic Capacitor Manufacturers
AVX www.avxcorp.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay Siliconix www.vishay.com
TDK www.tdk.com
Overvoltage Protection
VBUS can be protected from overvoltage damage with two
additional components, a resistor R1 and an N-channel
MOSFET MN1, as shown in Figure 6. Suitable choices for
MN1 are listed in Table 10.
Table 10. Recommended N-channel MOSFETs for the
Overvoltage Protection Circuit
PART NUMBER BVDSS RON PACKAGE
Si1472DH 30V 82mΩ SC70-6
Si2302ADS 20V 60mΩ SOT-23
Si2306BDS 30V 65mΩ SOT-23
Si2316BDS 30V 80mΩ SOT-23
IRLML2502 20V 35mΩ SOT-23
FDN372S 30V 50m SOT-23
NTLJS4114N 30V 35mΩ WDFN6
R1 is a 6.2k resistor and must be rated for the power dis-
sipated during maximum overvoltage. In an overvoltage
condition the OVSENS pin will be clamped at 6V. R1 must
be sized appropriately to dissipate the resultant power.
For example, a 1/10W 6.2k resistor can have at most
√PMAX • 6.2k = 25V applied across its terminals. With
the 6V at OVSENS, the maximum overvoltage magnitude
that this resistor can withstand is 31V. A 1/4W 6.2k resistor
raises this value to 45V. OVSENS’s absolute maximum
current rating of 10mA imposes an upper limit of 68V
protection.
LTC3576/LTC3576-1
36
3576fb
transforms the voltage at V
BUS
to a voltage just above
the level at BAT, while limiting power to less than the
amount programmed at CLPROG. The charger should be
programmed (with the PROG pin) to deliver the maximum
safe charging current without regard to the USB specifi -
cations. If there is insuffi cient current available to charge
the battery at the programmed rate, it will reduce charge
current until the system load on V
OUT
is satisfi ed and the
V
BUS
current limit is satisfi ed. Programming the charger
for more current than is available will not cause the aver-
age input current limit to be violated. It will merely allow
the battery charger to make use of all available power to
charge the battery as quickly as possible, and with minimal
dissipation within the charger.
Battery Charger Stability Considerations
The LTC3576/LTC3576-1’s battery charger contains both a
constant-voltage and a constant-current control loop. The
constant-voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1µF
from BAT to GND.
High value, low ESR MLCCs reduce the constant-voltage
loop phase margin, possibly resulting in instability. Up
to 22µF may be used in parallel with a battery, but larger
capacitors should be decoupled with 0.2Ω to 1Ω of series
resistance.
Furthermore, a 100µF MLCC in series with a 0.3Ω resistor
from BAT to GND is required to prevent oscillation when
the battery is disconnected.
In constant-current mode, the PROG pin is in the feed-
back loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
APPLICATIONS INFORMATION
R1
USB/WALL
ADAPTER
3576 F06
C1
MN1
VBUS
OVSENS
OVGATE
LTC3576/
LTC3576-1
Figure 6. Overvoltage Protection Figure 8. Dual Polarity Voltage Protection
R1
C1
D1
V1
V2
D2
M1
M2
3576 F07
WALL
OVSENS
OVGATE
LTC3576/
LTC3576-1
VBUS
GND
Figure 7. Dual-Input Overvoltage Protection
I
t is possible to protect both VBUS and WALL from
overvoltage damage with several additional components,
as shown in Figure 7. Schottky diodes D1 and D2 pass the
larger of V1 and V2 to R1 and OVSENS. If either V1 or V2
exceeds 6V plus VF (Schottky), OVGATE will be pulled to
GND and both the WALL and USB inputs will be protected.
Each input is protected up to the drain-source breakdown,
BVDSS, of MN1 and MN2. R1 must also be rated for the
power dissipated during maximum overvoltage.
Reverse Voltage Protection
The LTC3576/LTC3576-1 can also be easily protected
against the application of reverse voltages, as shown in
Figure 8. D1 and R1 are necessary to limit the maximum
V
GS
seen by MP1 during
positive
overvoltage events. D1’s
breakdown voltage must be safely below MP1’s BVGS. The
circuit shown in Figure 8 offers forward voltage protection
up to MN1’s BVDSS and reverse voltage protection up to
MP1’s BVDSS.
Battery Charger Over Programming
The USB high power specifi cation allows for up to 2.5W
to be drawn from the USB port. The LTC3576/LTC3576-1’s
bidirectional switching regulator in step-down mode
R2R1
USB/WALL
ADAPTER
3576 F08
C1D1
MN1MP1
VBUS POSITIVE PROTECTION UP TO BVDSS OF MN1
VBUS NEGATIVE PROTECTION UP TO BVDSS OF MP1
VBUS
OVSENS
OVGATE
LTC3576/
LTC3576-1
LTC3576/LTC3576-1
37
3576fb
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger
is stable with program resistor values as high as 25k.
However, additional capacitance on this node reduces the
maximum allowed program resistor. The pole frequency at
the PROG pin should be kept above 100kHz. Therefore, if
the PROG pin has a parasitic capacitance, C
PROG
, the fol-
lowing equation should be used to calculate the maximum
resistance value for R
PROG
:
RPROG ≤1
2π• 100kHz • CPROG
Alternate NTC Thermistors and Biasing
The LTC3576/LTC3576-1 provide temperature qualifi ed
charging if a grounded thermistor and a bias resistor
are connected to NTC. By using a bias resistor whose
value is equal to the room temperature resistance of the
thermistor (R25) the upper and lower temperatures are
pre-programmed to approximately 40°C and 0°C respec-
tively assuming a Vishay Curve 1 thermistor.
The upper and lower temperature thresholds can be ad-
justed by either a modifi cation of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modifi ed but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustment resistor, both the upper and the lower tempera-
ture trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay Curve 1 resistance-temperature
characteristic.
In the explanation below, the following notation is used.
R25 = Value of the Thermistor at 25°C
R
NTC|COLD
= Value of thermistor at the cold trip point
R
NTC|HOT
= Value of the thermistor at the hot trip
point
r
COLD
= Ratio of R
NTC|COLD
to R25
r
HOT
= Ratio of R
NTC|HOT
to R25
R
NOM
– Primary thermistor bias resistor
(see Figure 9)
R1 = Optional temperature range adjustment resistor
(see Figure 10)
APPLICATIONS INFORMATION
Figure 9. Standard NTC Confi guration Figure 10. Modifi ed NTC Confi guration
–
+
–
+
RNOM
100k
RNTC
100k
NTC
NTCBIAS
0.1V
NTC_ENABLE
3576 F09
LTC3576/LTC3576-1
NTC BLOCK
TOO_COLD
TOO_HOT
0.765 • NTCBIAS
0.349 • NTCBIAS
–
+
3
4
T–
+
–
+
RNOM
105k
RNTC
100k
R1
12.7k
NTC
NTCBIAS
0.1V
NTC_ENABLE
3576 F10
LTC3576/LTC3576-1
NTC BLOCK
TOO_COLD
TOO_HOT
0.765 • NTCBIAS
0.349 • NTCBIAS
–
+
3
4
T
LTC3576/LTC3576-1
38
3576fb
The trip points for the LTC3576/LTC3576-1’s temperature
qualifi cation are internally programmed at 0.349 • NTCBIAS
for the hot threshold and 0.765• NTCBIAS for the cold
threshold.
Therefore, the hot trip point is set when:
RNTC HOT
RNOM +RNTC HOT
• NTCBIAS =0.349 • NTCBIAS
And the cold trip point is set when:
RNTC COLD
RNOM +RNTC COLD
• NTCBIAS =0.765 • NTCBIAS
Solving these equations for R
NTC|COLD
and R
NTC|HOT
results in the following:
R
NTC|HOT
= 0.536 • R
NOM
and
R
NTC|COLD
= 3.25 • R
NOM
By setting R
NOM
equal to R25, the above equations result
in r
HOT
= 0.536 and r
COLD
= 3.25. Referencing these ratios
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
By using a bias resistor, R
NOM
, different in value from
R25, the hot and cold trip points can be moved in either
direction. The temperature span will change somewhat
due to the nonlinear behavior of the thermistor. The fol-
lowing equations can be used to calculate a new value for
the bias resistor:
RNOM =rHOT
0.536 •R25
RNOM =rCOLD
3.25 •R25
where r
HOT
and r
COLD
are the resistance ratios at the
de-
sired
hot and
cold trip points.
Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
From the Vishay Curve 1 R-T characteristics, r
HOT
is
0.2488 at 60°C. Using the above equation, R
NOM
should
be set to 46.4k. With this value of R
NOM
, r
COLD
is 1.436
and the cold trip point is about 16°C. Notice that the span
is now 44°C rather than the previous 40°C. This is due to
the decrease in “temperature gain” of the thermistor as
absolute temperature increases.
The upper and lower temperature trip points can be inde-
pendently programmed by using an additional bias resistor
as shown in Figure 10. The following formulas can be used
to compute the values of R
NOM
and R1:
RNOM =rCOLD –r
HOT
2.714 •R25
R1=0.536 • RNOM –r
HOT •R25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
RNOM =3.266 – 0.4368
2.714 • 100k =104.2k
the nearest 1% value is 105k:
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The fi nal solution is shown
in Figure 10 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
Hot Plugging and USB Inrush Current Limiting
The overvoltage protection circuit provides inrush current
limiting due to the long time it takes for OVGATE to fully
enhance the N-channel MOSFET. This prevents the current
from building up in the cable too quickly thus dampen-
ing out any resonant overshoot on VBUS. It is possible to
observe voltage overshoot on V
BUS
when connecting the
LTC3576/LTC3576-1 to a lab power supply if the overvoltage
protection circuit is not used. This overshoot is caused by
the inductance of the long leads from the power supply to
V
BUS
. Twisting the wires together from the supply to V
BUS
can greatly reduce the parasitic inductance of these long
leads keeping the voltage at V
BUS
to safe levels. USB cables
are generally manufactured with the power leads in close
proximity, and thus have fairly low parasitic inductance.
APPLICATIONS INFORMATION
LTC3576/LTC3576-1
39
3576fb
Hot Plugging and USB On-the-Go
If there is more than 4.3V on VBUS when on-the-go is
enabled, the bidirectional switching regulator will not try
to drive VBUS. If USB on-the-go is enabled and an external
supply is then connected to VBUS, one of three things will
happen depending on the properties of the external sup-
ply. If the external supply has a regulation voltage higher
than 5.1V, the bidirectional switching regulator will stop
switching and VBUS will be held at the regulation voltage
of the external supply. If the external supply has a lower
regulation voltage and is capable of only sourcing current
then VBUS will be regulated to 5.1V. The external supply
will not source current to VBUS.
For a supply that can also sink current and has a regula-
tion voltage less than 5.1V, the bidirectional switching
regulator will source current into the external supply in an
attempt to bring VBUS up to 5.1V. As long as the external
supply holds VBUS to more than 4V or VOUT + 70mV, the
bidirectional switching regulator will source up to 680mA
into the supply. If VBUS is held to a voltage that is less than
4V and VOUT + 70mV then the short circuit timer will shut
off the switching regulator after 7.2ms. The CHRG pin will
then blink indicating a short circuit current fault.
VBUS Bypass Capacitance and USB On-The-Go
Session Request Protocol
When two on-the-go devices are connected, one will be the
A device and the other will be the B device depending on
whether the device is connected to a micro A or micro B
plug. The A device provides power to the B device and
starts as the host. To prolong battery life, the A device can
power down VBUS when the bus is not being used. If the A
device has powered down VBUS, the B device can request
the A device to power up VBUS and start a new session us-
ing the session request protocol (SRP). The SRP consists
of data-line pulsing and VBUS pulsing. The B device must
fi rst pulse the D+ or D– data line. The B device must then
pulse VBUS only if the A device does not respond to the
data-line pulse. The A device is required to respond to only
one of the pulsing methods. A devices that never power
down VBUS are not required to respond to the SRP.
APPLICATIONS INFORMATION
For VBUS pulsing, the limit on the VBUS capacitance on
the A device allows a B device to differentiate between
a powered down on-the-go device and a powered down
standard host. The B device will send out a pulse of current
that will raise VBUS to a voltage between 2.1V and 5.25V if
connected to an on-the-go A device which must have no
more than 6.5µF. An on-the-go A device must drive VBUS
as soon as the current pulse raises VBUS above 2.1V if the
device is capable of responding to VBUS pulsing.
This same current pulse must not raise VBUS any higher
than 2V when connected to a standard host which must
have at least 96µF. The 96µF for a standard host represents
the minimum capacitance with VBUS between 4.75V and
5.25V. Since the SRP pulse must not drive VBUS greater
than 2V, the capacitance seen at these voltage levels can be
greater than 96µF, especially if MLCCs are used. Therefore,
the 96µF represents a lower bound on the standard host
bypass capacitance for determining the amplitude and
duration of the current pulse. More capacitance will only
decrease the maximum level that VBUS will rise to for a
given current pulse.
Figure 11 shows an on-the-go device using the LTC3576/
LTC3576-1 acting as the A device. Additional capacitance
can be placed on the VBUS pin of the LTC3576/LTC3576-1
when using the overvoltage protection circuit. A B device
may not be able to distinguish between a powered down
LTC3576/LTC3576-1 with overvoltage protection and a
powered down standard host because of this extra ca-
pacitance. In addition, if the SRP pulse raises VBUS above
its UVLO threshold of 4.3V the LTC3576/LTC3576-1 will
assume input power is available and will not attempt to
drive VBUS. Therefore, it is recommended that an on-
the-go device using the LTC3576/LTC3576-1 respond to
data-line pulsing.
When an on-the-go device using the LTC3576/LTC3576-1
becomes the B device, as in Figure 12, it must send out
a data line pulse followed by a VBUS pulse to request a
session from the A device. The on-the-go device designer
can choose how much capacitance will be placed on the
VBUS pin of the LTC3576/LTC3576-1 and then generate
a VBUS pulse that can distinguish between a powered
LTC3576/LTC3576-1
40
3576fb
down on-the-go A device and a powered down standard
host. A suitable pulse can be generated because of the
disparity in the bypass capacitances of an on-the-go A
device and a standard host even if there is somewhat
more than 6.5µF capacitance connected to the VBUS pin
of the LTC3576/LTC3576-1.
Board Layout Considerations
The Exposed Pad on the backside of the LTC3576/
LTC3576-1 package must be securely soldered to the PC
board ground. This is the primary ground pin in the pack-
age, and it serves as the return path for both the control
circuitry and the N-channel MOSFET switches.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitor, inductor, and
output capacitor be as close to the LTC3576/LTC3576-1
as possible and that there be an
unbroken
ground plane
under the LTC3576/LTC3576-1 and all of their external
APPLICATIONS INFORMATION
ON-THE-GO
POWER
MANAGER
ON-THE-GO
TRANSCEIVER
B DEVICE 3576 F11
A DEVICE
D+
D–
OVSENS
OVGATE
VBUS
CB
<6.5µF
CA
<6.5µF
WITHOUT OVP
OVP
(OPTIONAL)
ON-THE-GO
TRANSCEIVER
LTC3576/
LTC3576-1
ENOTG
Figure 11. LTC3576/LTC3576-1 as the A Device
STANDARD
USB HOST OR
ON-THE-GO
POWER
MANAGER
STANDARD OR
ON-THE-GO
TRANSCEIVER
A DEVICE 3576 F12
B DEVICE
D+
D–
OVSENS
OVGATE
VBUS
CA
<6.5µF FOR OTG DEVICES
>96µF FOR STANDARD HOST
CB
<6.5µF
WITHOUT OVP
OVP
(OPTIONAL)
ON-THE-GO
TRANSCEIVER
LTC3576/
LTC3576-1
ENOTG
Figure 12. LTC3576/LTC3576-1 as the B Device
high frequency components. High frequency currents,
such as the VBUS, VIN1, VIN2 and VIN3 currents tend to fi nd
their way on the ground plane along a mirror path directly
beneath the incident path on the top of the board. If there
are slits or cuts in the ground plane due to other traces
on that layer, the current will be forced to go around the
slits. If high frequency currents are not allowed to fl ow
back through their natural least-area path, excessive
voltage will build up and radiated emissions will occur
(see Figure 13). There should be a group of vias directly
under the grounded backside leading directly down to an
internal ground plane. To minimize parasitic inductance,
the ground plane should be as close as possible to the
top plane of the PC board (layer 2).
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
LTC3576/LTC3576-1
41
3576fb
the ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
it with V
OUT
connected metal, which should generally be
less than one volt higher than IDGATE.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3576/LTC3576-1:
1. The Exposed Pad of the package (Pin 39) should
connect directly to a large ground plane to minimize
thermal and electrical impedance.
2. The traces connecting VBUS, VIN1, VIN2, VIN3 and
VIN of the external step-down switching regulator
to their respective decoupling capacitors should be
as short as possible. The GND side of these capaci-
tors should connect directly to the ground plane of
the part. These capacitors provide the AC current to
the internal power MOSFETs and their drivers. It is
critical to minimize inductance from these capacitors
to the LTC3576/LTC3576-1 and external step-down
switching regulator.
3. Connections between the step-down switching regu-
lator (both internal and external) inductors and their
respective output capacitors should be kept as short
Figure 13. Higher Frequency Ground Current Follow Their
Incident Path. Slices in the Ground Plane Create Large Loop
Areas. The Large Loop Areas Increase the Inductance of the
Path Leading to Higher System Noise
APPLICATIONS INFORMATION
3576 F13
as possible. Use area fi lls whenever possible. This
also applies to the PowerPath switching regulator
inductor and the output capacitor on VOUT
. The GND
side of the output capacitors should connect directly
to the thermal ground plane of the part.
4. The switching power traces connecting SW, SW1,
SW2, SW3 and the switch node of the external step-
down switching regulator to their respective induc-
tors should be minimized to reduce radiated EMI and
parasitic coupling. Due to the large voltage swing
of the switching nodes, sensitive nodes such as the
feedback nodes (FB1, FB2 and FB3) should be kept
far away or shielded from the switching nodes or
poor performance could result.
5. Keep the feedback pin traces (FB1, FB2, FB3 and FB
of the external step-down switching regulator) as
short as possible. Minimize any parasitic capacitance
between the feedback traces and any switching node
(i.e., SW, SW1, SW2, SW3 and logic signals). If nec-
essary shield the feedback nodes with a GND trace
6. Connect VIN1, VIN2 and VIN3 to VOUT through a short
low impedance trace.
LTC3576/LTC3576-1
42
3576fb
TYPICAL APPLICATIONS
Minimum Parts Count USB Power Manager with Low-Battery Start-Up and USB On-the-Go
+
VBUS SW
35 36
VBUS VOUT
34
DVCC
12
13, 14
OVGATE
C1
10µF
0805
1µF
C2
0.1µF
0402
C3
22µF
0805
USB,
WALL ADAPTER
USB
ON-THE-GO
OVSENS
6
NTCBIAS
3
PROG
29
CLPROG
1
LDO3V3
2
CHRG
30
3.01k
1.02M
1.76V TO 3.3V
400mA
1.61V TO 3.03V
400mA
0.8V TO 1.51V
1A
324k
10pF
Li-Ion
1µF
TO OTHER
LOADS
1µF
1µF
10µF
1k
NTC
4
5
EN1
10
EN2
22
EN3
ENOTG
11
ILIM0
37
ILIM1
38
19
33
IDGATE 31
VIN1
8
SW1 9
FB1 7
BAT 32
26 27 28
VCWALL
LTC3576/LTC3576-1
L1
3.3µH
L2
4.7µH
ACPR
1.02M
365k
10pF
10µF
VIN2
24
SW2 23
FB2
I2C
25
L3
4.7µH
751k
806k
C1: MURATA GRM21BR7A106KE51L
C3: TAIYO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
L4: TOKO 1098AS-2R0M
10k
3576 TA02
10pF
10µF
VIN3
16
SW3 17
FB3 20
RST3 21
L4
2µH
MEMORY
PUSHBUTTON
MICROCONTROLLER
MICROPROCESSOR
I/O
CORE POR
LTC3576/LTC3576-1
43
3576fb
TYPICAL APPLICATIONS
High Effi ciency USB/Automotive Power Manager with Overvoltage Protection,
Reverse-Voltage Protection, Low-Battery Start-Up and USB On-the-Go
+
VBUS SW
35 36
M4
M5
VBUS VOUT
34
DVCC
12
13, 14
OVGATE
C1
22µF
0805
4.7µF
22µF
0.47µF
D1
1µF
C2
0.1µF
0402
C3
22µF
0805
Li-Ion
USB,
WALL
ADAPTER
OVSENS
6
NTCBIAS
3
PROG
29
CLPROG
1
LDO3V3
2
3.01k
1.02M
2.2k
1.76V TO 3.3V
400mA
1.61V TO 3.03V
400mA
0.8V TO 1.51V
1A
324k
10pF 1µF
TO OTHER
LOADS
1µF
1µF
10µF
1k
T
100k
R2
100k
R1
6.2k
NTC
4
5
EN1
10
EN2
22
EN3
ENOTG
11
ILIM0
37
ILIM1
38
19
33
IDGATE 31
VIN1
8
CHRG 30
SW1 9
FB1 7
BAT 32
26
9
7
10
5
4
11 1 6
2
3
8
27 28
VCWALL
LTC3576/LTC3576-1
L2
3.3µH
L1
6.8µH
L3
4.7µH
ACPR
1.02M
365k
10pF
10µF
VIN2
24
SW2 23
FB2
I2C
25
L4
4.7µH
751k
806k
C1, C3: TAYIO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS240L
L1: TAIYO YUDEN NP06DZB6R8M
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
M1,M2,M4, M5: SILICONIX Si2333DS
M3: ON SEMICONDUCTOR NTLJS4114N
R1: 1/10W RESISTOR
R2: CURVE 1
10k
3576 TA03
10pF
10µF
VIN3
16
SW3 17
FB3 20
RST3 21
L5
2µH
MEMORY
PUSHBUTTON
MICROCONTROLLER
MICROPROCESSOR
I/O
CORE POR
VC
PG
40.2k
M2
M1
M3
68nF
AUTOMOTIVE
FIREWIRE, ETC.
150k
GND BD SYNC
FB
499k 100k
RT
RUN/SS LT3480
VIN BOOST
SW
USB
ON-THE-GO
LTC3576/LTC3576-1
44
3576fb
TYPICAL APPLICATIONS
High Effi ciency USB/Automotive Power Manager with Overvoltage Protection, USB On-the-Go, Pushbutton Start,
Automatic Supply Sequencing and 10 Second Push-and-Hold Hard Shutdown
+
VBUS SW
35 36
M2
M3
VBUS VOUT
34
OVGATE
C1
22µF
0805
4.7µF
22µF
0.47µF
D1
C2
0.1µF
0402
10µF
10µF
C3
22µF
0805
Li-Ion
USB,
WALL
ADAPTER
OVSENS
6
NTCBIAS
3
PROG
29
CLPROG
1
14
13
12
38
37
11
3.01k
1µF
1µF1k
1.02M
2.2k
1.76V TO 3.3V
400mA
0.8V TO 1.51V
1A
1.61V TO 3.03V
400mA
SEND I2C CODE: “0s1201F8”
324k
10pF 1µF
TO OTHER
LOADS
1µF
1µF
10µF
1k
T
100k
R2
100k
R1
6.2k
NTC
4
5
EN3
SDA
ENOTG
ILIM0
ILIM1
33
IDGATE 31
VIN1
8
CHRG 30
SW1 9
FB1 7
BAT 32
26
9
7
10
5
4
11 1 6
2
3
8
27 28
VCWALL
LTC3576/LTC3576-1
L2
3.3µH
L1
6.8µH
L3
4.7µH
ACPR
751k 10k
806k
10pF
10µF
VIN3
EN2
16
SW3
SCL
DVCC
2LDO3V3
17
22
EN1 10
FB3 20
L5
2µH
1.02M
365k
5.1k 5.1k
C1, C3: TAYIO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS240L
L1: TAIYO YUDEN NP06DZB6R8M
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
M1: ON SEMICONDUCTOR NTLJS4114N
M2, M3: SILICONIX Si2333DS
M4: 2N7002
R1: 1/10W RESISTOR
R2: CURVE 1
3576 TA04
10pF
10µF
VIN2 24
SW2 23
FB2 25
RST3 21
L4
4.7µH
MEMORY
CORE
POR
I/O
SDA
SCL
VC
PG
40.2k
M1
68nF
AUTOMOTIVE
FIREWIRE, ETC.
150k
GND BD SYNC
FB
499k 100k
RT
RUN/SS LT3480
VIN BOOST
SW
4.7k
10k
1M
M4
USB
ON-THE-GO
LTC3576/LTC3576-1
45
3576fb
TYPICAL APPLICATIONS
High Effi ciency USB/Automotive Power Manager with Current Limiting and
Overvoltage Protection on Both Inputs, Low-Battery Start-Up and USB On-the-Go
+
VBUS SW
35 36
VBUS VOUT
34
DVCC
12
13, 14
OVGATE
C1
22µF
0805
4.7µF
22µF
0.47µF
1µF
C2
0.1µF
0402
C3
22µF
0805
Li-Ion
USB,
WALL
ADAPTER
OVSENS
6
NTCBIAS
3
PROG
29
CLPROG
1
LDO3V3
2
CHRG
30
3.01k
1.02M
1.76V TO 3.3V
400mA
1.61V TO 3.03V
400mA
0.8V TO 1.51V
1A
324k
10pF 1µF
TO OTHER
LOADS
1µF
1µF
10µF
1k
T
100k
R2
100k
R1
6.2k
NTC
4
5
EN1
10
EN2
22
EN3
ENOTG
11
ILIM0
37
ILIM1
38
19
33
IDGATE 31
VIN1
8
SW1 9
FB1 7
BAT 32
26
4
3
1
92
7
8
6
D1
5
2728
VCWALL
LTC3576/LTC3576-1
L2
3.3µH
L1
4.7µH
L3
4.7µH
ACPR
1.02M
365k
10pF
10µF
VIN2
24
SW2 23
FB2
I2C
25
L4
4.7µH
751k
806k
C1, C3: TAYIO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS140
L1: COILCRAFT MSS6132-472MLC
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
M1: FAIRCHILD FDN327S
R1: 1/10W RESISTOR
R2: CURVE 1
10k
3576 TA05
10pF
10µF
VIN3
16
SW3 17
FB3 20
RST3 21
L5
2µH
MEMORY
PUSHBUTTON
MICROCONTROLLER
MICROPROCESSOR
I/O
CORE POR
VC
34.2k
M1
AUTOMOTIVE
FIREWIRE, ETC. 7.5V TO 36V
TRANSIENTS TO 60V
GND HVOK
ISENSE
VOUT
ILIM
LT3653
VIN BOOST
SW
USB
ON-THE-GO
LTC3576/LTC3576-1
46
3576fb
TYPICAL APPLICATIONS
High Effi ciency USB/Wall Power Manager with Dual Overvoltage Protection,
Reverse-Voltage Protection, Low-Battery Start-Up and USB On-The-Go
+
VBUS SW
35 36
M5
M6
VBUS
VC
VOUT
34
DVCC
12
13, 14
C2
22µF
0805
C1
22µF
0805
1µF
C3
0.1µF
0402
C4
22µF
0805
Li-Ion
USB
OVSENS
6
NTCBIAS
3
PROG
29
CLPROG
1
LDO3V3
2
3.01k
1.02M
2.2k
1.76V TO 3.3V
400mA
1.61V TO 3.03V
400mA
0.8V TO 1.51V
1A
324k
10pF 1µF
TO OTHER
LOADS
1µF
1µF
10µF
1k
T
100k
R2
100k
R1
6.2k
NTC
4
26
EN1
10
EN2
22
EN3
ENOTG
11
ILIM0
37
ILIM1
38
19
33
IDGATE 31
VIN1
8
CHRG 30
SW1 9
FB1 7
BAT 32
27528
WALLOVGATE
LTC3576/LTC3576-1
L1
3.3µH
L2
4.7µH
ACPR
1.02M
365k
10pF
10µF
VIN2
24
SW2 23
FB2
I2C
25
L3
4.7µH
751k
806k
C1, C2, C4: TAYIO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
L4: TOKO 1098AS-2R0M
M1, M2, M5, M6: SILICONIX Si2333DS
M3, M4: FAIRCHILD FDN327S
R1: 1/10W RESISTOR
R2: CURVE 1
10k
3576 TA07
10pF
10µF
VIN3
16
SW3 17
FB3 20
RST3 21
L4
2µH
MEMORY
PUSHBUTTON
MICROCONTROLLER
MICROPROCESSOR
I/O
CORE POR
M2
M1
M4
M3
5V WALL
ADAPTER
USB
ON-THE-GO
LTC3576/LTC3576-1
47
3576fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
UFE Package
38-Lead Plastic QFN (4mm × 6mm)
(Reference LTC DWG # 05-08-1750 Rev B)
4.00 p 0.10 2.40 REF
6.00 p 0.10
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 p 0.10
3837
1
2
BOTTOM VIEW—EXPOSED PAD
4.40 REF
0.75 p 0.05
R = 0.115
TYP
R = 0.10
TYP
PIN 1 NOTCH
R = 0.30 OR
0.35 s 45o
CHAMFER
0.20 p 0.05
0.40 BSC
0.200 REF
0.00 – 0.05
(UFE38) QFN 0708 REV B
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 p0.05
0.20 p0.05
0.40 BSC
2.40 REF
4.40 REF
5.10 p 0.05
6.50 p 0.05
2.65 p 0.05
3.10 p 0.05
4.50 p 0.05
PACKAGE OUTLINE
2.65 p 0.10
4.65 p 0.10
4.65 p 0.05
LTC3576/LTC3576-1
48
3576fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
LT 0809 REV B • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
+
VBUS SW
35 36
VBUS VOUT
34
OVGATE
C1
22µF
0805 C2
22µF
0805
C3
0.1µF
0402
Li-Ion
OVSENS
6
LDO3V3
1µF 300k
2
ENOTG
11
3.01k 1k
TO OTHER
LOADS
M2
6.2k
TO USB
TRANSCEIVER
5
33
PROG
BAT 32
29
CLPROG 1
26 28 27
VCWALL
LTC3576/LTC3576-1
VBUS POWERS UP WHEN ID PIN HAS LESS THAN 10 TO GND (MICRO-A PLUG CONNECTED)
L2
3.3µH
ACPR
3576 TA06
M1
J1
MICRO-AB
VBUS
D–
D+
ID
GND
C1, C2: TAIYO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS140
J1: HIROSE ZX62-AB-5PA
L1: COILCRAFT MSS6132-472MLC
L2: COILCRAFT LPS4018-332LM
M1: FAIRCHILD FDN372S
M2: SILICONIX Si2333DS
4.7µF
22µF
0.47µF
4
3
1
92
7
8
6
D1
5
L1
4.7µH
VC
34.2k
AUTOMOTIVE
FIREWIRE, ETC. 7.5V TO 36V
TRANSIENTS TO 60V
GND HVOK
ISENSE
VOUT
ILIM
LT3653
VIN BOOST
SW
USB
ON-THE-GO
Firewire/Automotive Battery Charger with Automatic USB On-the-Go and Overvoltage Protection
PART NUMBER DESCRIPTION COMMENTS
Power Management
LTC3555/LTC3555-1
LTC3555-3
Switching USB Power Manager with Li-Ion/Polymer
Chargers Plus Triple Buck DC/DC Maximizes Available Power from USB Port, Bat-Track, 1.5A Max Charge
Current, 180m Ideal Diode with <50m Option, 3.3V/25mA Always-On
LDO, Two 400mA and One 1A Buck Regulators, Instant-On Operation
(LTC3555-1), Instant-On Operation and 4.1V Float Votlage (LTC3555-3),
4mm × 5mm 28-Pin QFN Package
LTC3556
Switching USB Power Manager with Li-Ion/Polymer
Charger Plus Dual Buck Plus Buck-Boost DC/DC Maximizes Available Power from USB Port, Bat-Track, Instant-On
Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m
Option, 3.3V/25mA Always-On LDO, Two 400mA Buck Regulators,
One 1A Buck-Boost Regulator, 4mm × 5mm 28-Pin QFN Package
LTC3586
Switching USB Power Manager with Li-Ion/Polymer
Charger Plus Dual Buck Plus Buck-Boost Plus Boost
DC/DC
Maximizes Available Power from USB Port, Bat-Track, Instant-On
Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m
Option, 3.3V/25mA Always-On LDO, Two 400mA Synchronous Buck
Regulators, One 1A Buck-Boost Regulator, One 600mA Boost Regulator,
4mm × 6mm 38-Pin QFN Package
LTC4098/LTC4098-1
Switching USB Power Manager and Battery Chargers
with Overvoltage Protection Maximizes Available Power from USB Port, Bat-Track, Instant-On
Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m
Option, Controller for External High Voltage Buck Regulator, Protection
Against Transients of Up to 60V, 3.3V/25mA Always-On LDO,4.1V Float
Voltage (LTC4098-1), 4mm × 3mm 14-Pin DFN Package