UPD24 Series
• SIP SSR
• Single Channel Ratings of 15A and 25A @ 280 VAC
• PCB Mount Pack age or Panel Mount quick connect terminals (F option)
• SCR output for heavy industr ial loads
• Zero-crossing (resistive loads) or random-fire (inductive loads) output
• Low Leakage (snubberless) output
PRODUCT SELECTION
Control Voltage 15A 15A 25A 25A
3-32 VDC UPD2415 UPD2415-10 UPD2425 UPD2425-10
AVAILABLE OPTIONS
OUTPUT SPECIFICATIONS (1)
Description UPD2415 UPD2415-10 UPD2425 UPD2425-10
Operating Voltage (47-440Hz) [Vrms] 24-280 24-280 24-280 24-280
Maximum Load Current [Arms](3) 15 15 25 25
Transient Overvoltage [Vpk] 600 600 600 600
Maximum 1 Cycle Surge Current (50/60Hz) [Apk] 115/120 115/120 239/250 239/250
Maximum On-State Voltage Drop @ Rated Current [Vpk] 1.4 1.4 1.4 1.4
Thermal Resistance Junction to Case [°C/W] 1.2 1.2 0.7 0.7
Maximum I² t for fusing (50/60Hz, 1/2 cycle) [A² sec] 66/60 66/60 285/259 285/259
Maximum Off-State Leakage Current @ Rated Voltage [mArms] 0.1 0.1 0.1 0.1
Minimum Off-State dv/dt @ Maximum Rated Voltage [V/µsec] (2) 500 500 500 500
Minimum Power Factor (with Maximum Load) 0.5 0.5 0.5 0.5
INPUT SPECIFICATIONS (1)
Description UPD2415 UPD2415-10 UPD2425 UPD2425-10
Control Voltage Range 3-32 VDC 3-32 VDC 3-32 VDC 3-32 VDC
Must Turn On Voltage 3.0 VDC 3.0 VDC 3.0 VDC 3.0 VDC
Must Turn Off Voltage 1.0 VDC 1.0 VDC 1.0 VDC 1.0 VDC
Typical Input Current @ 12 VDC 10 mAdc 10 mAdc 10 mAd c 10 mA dc
Nominal Input Impedance See note 4 See note 4 See note 4 See note 4
Maximum Turn-On Time [msec] 1/2 Cycle 0.02 1/2 Cycle 0.02
Maximum Turn-Off Time [msec] 1/2 Cycle 1/2 Cycle 1/2 Cycle 1/2 Cycle
GENERAL SPECIFICATIONS
Description Parameters
Dielectric Strength, Input/Output/Base (50/60Hz) 2500 Vrms
Minimum Insulation Resistance (@ 500 VDC) 109 Ohm
Maximum Capacitance, Input/Output 10 pF
Ambient Operating Temperature Range -40 to 80°C
Ambient Storage Temperature Range -40 to 125°C
Weight (typical) 1.5 oz. (42.5g)
GENERAL NOTES
1) All parameters at 25°C and per section unless otherwise specified.
2) Off-state dv/dt test method per EIA/NARM standard RS-443, paragraph 13.11.1
3) Heat sinking required, see following pages for derating curves.
4) Input circuit incorporates active current limiter.
MECHANICAL SPECIFICATIONS
WIRING DIAGRAM
THERMAL DERATE INFORMATION
THERMAL DERATE INFORMATION
AGENCY APPROVALS
Designed in accordance with the requirements of IEC 62314
Rev. 082812
ANNEX - ENVIROMENTAL INFORMATION
