5-356
ClockWorks™
SY10H641A
SY100H641A
The SY10/100H641A are single supply, low skew
translating 1:9 clock drivers. Devices in the Synergy H600
translator series utilize the 28-lead PLCC for optimal
power pinning, signal flow-through and electrical
performance.
The devices feature a 24mA TTL output stage with
AC performance specified into a 50pF load capacitance.
A latch is provided on-chip. When LEN is LOW (or left
open, in which case it is pulled LOW by the internal pull-
downs), the latch is transparent. A HIGH on the enable
pin (EN) forces all outputs LOW.
The 10H version is compatible with MECL 10KH ECL
logic levels. The 100H version is compatible with 100K
levels.
DESCRIPTION
SYNERGY
SEMICONDUCTOR
FEATURES
ClockWorks™
SY10H641A
SY100H641A
Input frequencies up to 80MHz
PECL-to-TTL version of popular ECLinPS E111
Guaranteed low skew specification
Latched input
Differential ECL internal design
VBB output for single-ended operation
Single +5V supply
Reset/enable
Extra TTL and ECL power/ground pins
Choice of ECL compatibility: MECL 10KH (10Hxxx)
or 100K (100Hxxx)
ESD protection of 2000V
Fully compatible with Motorola MC10H641/100H641
Available in 28-pin PLCC package
© 1999 Micrel-Synergy
SINGLE SUPPLY 1:9
PECL-TO-TTL
18
17
16
15
14
13
12
567891011
26
27
28
1
2
3
4
TOP VIEW
PLCC
25 24 23 22 21 20 19
V
T
Q
7
V
T
Q
8
G
T
Q
6
G
T
G
T
Q
5
V
T
Q
4
V
T
Q
3
G
T
Q
2
Q
1
V
T
Q
0
G
T
G
T
V
T
V
BB
D
V
E
LEN
G
E
D
EN
Rev.: D Amendment: /0
Issue Date: February, 1999
PIN CONFIGURATIONBLOCK DIAGRAM
D
Q0
Q1
Q2
Q3
VBB
EN
DQ4
Q5
Q6
Q7
Q8
LEN
DQ
PECL Input
TTL Outputs
Pin Function
GTTTL Ground (0V)
VTTTL VCC (+5.0V)
VEECL VCC (+5.0V)
GEECL Ground (0V)
D, D Signal Input (PECL)
VBB VBB Reference Output (PECL)
Q0 - Q8Signal Outputs (TTL)
EN Enable Input (PECL)
LEN Latch Enable Input (PECL)
PIN NAMES
5-357
ClockWorks™
SY10H641A
SY100H641A
D LEN EN Q
LL LL
HL LH
XH LQ0
XX HL
VCC AND CLOAD
Ranges to meet duty cycle requirement: 0°C TA 85°C. Output duty cycle measured relative to 1.5V.
Symbol Parameter Min. Typ. Max. Unit Condition
PW1 Ranges of VCC and CL to meet min. VCC 4.75 5.0 5.25 V All Outputs
pulse width (HIGH or LOW) at CL10 50 pF
fOUT 40MHz PW11 ns
PW2 Ranges of VCC and CL to meet min. VCC 4.875 5.0 5.125 V All Outputs
pulse width (HIGH or LOW) at CL15 27 pF
fOUT 50MHz PW9.0 ns
TRUTH TABLE
Symbol Rating Value Unit
VE (ECL) Power Supply –0.5 to +7.0 V
VT (TTL) Voltage –0.5 to +7.0
VI (ECL) Input Voltage 0.0 to VEV
VOUT (TTL) Disabled 3-State 0.0 to VTV
Output
IOUT (ECL) Output Current mA
- Continuous 50
- Surge 100
Tstore Storage Temperature –65 to +150 ˚C
TAOperating Temperature 0 to +85 ˚C
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Do not exceed.
TTL DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V ± 5%
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
VOH Output HIGH Voltage 2.5 2.5 2.5 V IOH = –15mA
VOL Output LOW Voltage 0.5 0.5 0.5 V IOL = 24mA
IOS Output Short Circuit Current –100 –225 –100 –225 –100 –225 mA VOUT = 0V
DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V ± 5%
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
IEE Power Supply Current ECL 30 30 30 mA VE Pin
ICCH TTL 30 30 30 Total all VT pins
ICCL —37 —37 37
SYNERGY
SEMICONDUCTOR
5-358
ClockWorks™
SY10H641A
SY100H641A
VT = VE = 5.0V ± 5%
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
IIH Input HIGH Current 225 175 175 µA—
IIL Input LOW Current 0.5 0.5 0.5 µA—
VIH Input HIGH Voltage(1) 3.835 4.120 3.835 4.120 3.835 4.120 V VE = 5.0V
VIL Input LOW Voltage(1) 3.190 3.525 3.190 3.525 3.190 3.525 V VE = 5.0V
VBB Output Reference Voltage(1) 3.620 3.740 3.620 3.740 3.620 3.740 V VE = 5.0V
NOTE:
1. VIH, VIL and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = +5.0V.
10H ECL DC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V ± 5%
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
IIH Input HIGH Current 225 175 175 µA—
IIL Input LOW Current 0.5 0.5 0.5 µA—
VIH Input HIGH Voltage(1) 3.830 4.160 3.870 4.190 3.940 4.280 V VE = 5.0V
VIL Input LOW Voltage(1) 3.050 3.520 3.050 3.520 3.050 3.555 V VE = 5.0V
VBB Output Reference Voltage(1) 3.620 3.730 3.650 3.750 3.690 3.810 V VE = 5.0V
NOTE:
1. VIH, VIL and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = +5.0V.
100H ECL DC ELECTRICAL CHARACTERISTICS
AC ELECTRICAL CHARACTERISTICS
VT = VE = 5.0V ± 5%
TA = 0°CTA = +25°CTA = +85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
tPLH Propagation Delay 5.0 6.0 5.0 6.0 5.0 6.0 ns CL = 50pF
tPHL D to Output
tskpp Part-to-Part Skew(1,4) 0.5 0.5 0.5 ns CL = 50pF
tskew++ Within-Device Skew(2,4) 0.3 0.3 0.3 ns CL = 50pF
tskew– – Within-Device Skew(3,4) 0.3 0.3 0.3 ns CL = 50pF
tPLH Propagation Delay 4.9 6.9 4.9 6.9 5.0 7.0 ns CL = 50pF
tPHL LEN to Output
tPLH Propagation Delay 5.0 7.0 4.9 6.9 5.0 7.0 ns CL = 50pF
tPHL EN to Output
trOutput Rise/Fall Time 1.7 1.7 1.7 ns CL = 50pF
tf0.8V to 2.0V 1.6 1.6 1.6
fMAX Maximum Input Frequency(5,6) 80 80 80 MHz CL = 50pF
Pulse Width 1.5 1.5 1.5 ns
Recovery Time 1.25 1.25 1.25 ns
tSSet-up Time 0.5 (typ.) 0.5 (typ.) 0.5 (typ.) ns
tHHold Time 0.5 (typ.) 0.5 (typ.) 0.5 (typ.) ns
NOTES:
1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common
power supply voltage.
2. Within-Device Skew considering HIGH-to-HIGH transitions at common
power supply voltage.
3. Within-Device Skew considering LOW-to-LOW transitions at common
power supply voltage.
4. All skew parameters are guaranteed but not tested.
5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing.
6. The fMAX value is specified as the minimum guaranteed maximum
frequency. Actual operational maximum frequency may be greater.
SYNERGY
SEMICONDUCTOR
5-359
ClockWorks™
SY10H641A
SY100H641A
TTL SWITCHING CIRCUIT
ECL/TTL PROPAGATION DELAY — SINGLE ENDED
V
IN
V
OUT
50%
1.5V
T
pd++
T
pd– –
ECL/TTL WAVEFORMS: RISE AND FALL TIMES
V
OUT
T
rise
T
fall
2.0V
0.8V
Ordering Package Operating
Code Type Range
SY10H641AJC J28-1 Commercial
SY10H641AJCTR J28-1 Commercial
SY100H641AJC J28-1 Commercial
SY100H641AJCTR J28-1 Commercial
LOGIC DIAGRAMPRODUCT ORDERING CODE
SYNERGY
SEMICONDUCTOR
PULSE
GENERATOR IN OUT
PECL
VEVT
TTL
DEVICE
UNDER
TEST
CH A
OSCILLOSCOPE
CH B
50 COAX
450
USE 0.1µF CAPACITORS
FOR DECOUPLING.
USE OSCILLOSCOPE
INTERNAL 50 LOAD
FOR TERMINATION.
50 COAX 50 COAX
5-360
ClockWorks™
SY10H641A
SY100H641A
SYNERGY
SEMICONDUCTOR
28 LEAD PLASTIC LEADED CHIP CARRIER (J28-1)