THS4271EVM-UG Unity Gain User's Guide DEVICE EVM TITLE USER'S GUIDE DESCRIPTION SHUTDOWN THS4271 THS4271EVM-UG THS4271 Unity Gain EVM Noninverting unity gain configuration only No THS4271 THS4271EVM THS4271/75EVM Configurable for gains +2/-1 No THS4275 THS4275EVM THS4271/75EVM Configurable for gains +2/-1 Yes October 2002 High Performance Linear Products SLOU147 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive. Should this evaluation kit not meet the specifications indicated in the EVM User's Guide, the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Please read the EVM User's Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact the TI application engineer. Persons handling the product must have electronics training and observe good laboratory practice standards. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2002, Texas Instruments Incorporated EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the specified input and output ranges described in the EVM User's Guide. The input supply voltage (VS) should be no greater than 7.5 V for dual supply (VS should be no greater than 15 V for single supply operation). The differential input signal (VID) should be no greater than 3 V. The output current (IO) should be no greater than 100 mA. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 60C. The EVM is designed to operate properly with certain components above 60C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2002, Texas Instruments Incorporated Information About Cautions and Warnings Preface Read This First Information About Cautions and Warnings This book may contain cautions and warnings. This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment. This is an example of a warning statement. A warning statement describes a situation that could potentially cause harm to you. The information in a caution or a warning is provided for your protection. Please read each caution and warning carefully. FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. iii Trademarks This EVM contains components that can potentially be damaged by electrostatic discharge. Always transport and store the EVM in its supplied ESD bag when not in use. Handle using an antistatic wristband. Operate on an antistatic work surface. For more information on proper handling, refer to SSYA008. Related Documentation From Texas Instruments The URL's below are correct as of the date of publication of this manual. Texas Instruments applications apologizes if they change over time. - THS4271/THS4275 data sheet (SLOS397) - Application report (SLMA002), PowerPAD Thermally Enhanced Package, http://www-s.ti.com/sc/psheets/slma004/slma002.pdf - Application report (SLMA004), PowerPAD Made Easy, http://www-s.ti.com/sc/psheets/slma004/slma004.pdf - Application report (SSYA008), Electrostatic Discharge (ESD), http://www-s.ti.com/sc/psheets/ssya008/ssya008.pdf - Application report (SLOA102), High Speed PCB Layout Tips, http://www-s.ti.com/sc/psheets/sloa102/sloa102.pdf Trademarks PowerPAD is a trademark of Texas Instruments. iv Contents Contents 1 Introduction and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Evaluation Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2 Using the EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 3 EVM Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3.1 Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 4 EVM Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 Figures 1-1 2-1 3-1 3-2 4-1 Schematic of the THS4271EVM-UG Unity Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test Equipment Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noninverting Gain Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Board Layout Views . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2-1 3-1 3-2 4-2 Tables 4-1 THS4271EVM-UG Unity Gain Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 v Chapter 1 Introduction and Description This EVM provides a platform for testing the THS4271 in 8-pin LLP (DRB) package in a noninverting, unity gain mode. It contains the high-speed op amp, a number of passive components, and various features and footprints that enable the user to experiment, test, and verify various operational amplifier circuit implementations. The THS4271 unity gain EVM was developed to reduce peaking caused by lead inductance in the feedback path, which proved to be excessive in a more general layout. This EVM is designed to minimize peaking in the unity gain configuration. Each pad and trace on a PCB has an inductance associated with it, when in conjunction with the inductance associated with the package may cause peaking in the frequency response, hence, cause the device to become unstable. Minimizing the inductance in the feedback path is critical for reducing the peaking of the frequency response in unity gain. The recommended maximum inductance allowed in the feedback path is 4 nH. This can be calculated by using the following equation: L(nH) + K ln 2 ) 0.223 W ) T ) 0.5 W)T Where: W = Width of trace + Length of the trace T = Thickness of the trace K = 5.08 nH/inch K = 0.2 nH/mm for Getek 4.2 epoxy polyphenylene oxide resin. Dimensions are in inches unless otherwise specified. Introduction and Description 1-1 Evaluation Schematic 1.1 Evaluation Schematic As delivered, the EVM has a fully functional example circuit--just add power supplies, a signal source, and monitoring instrument. See Figure 1-1 for a complete schematic diagram. EVM features include: - Wide operating supply voltage range: single supply 4.5 V to dual supply 7.5 V operation (see the device data sheet). Single supply operation is obtained by connecting both J6 (GND) and J7 (VS-) to ground. - Nominal 50- input impedance (R4). Termination can be configured according to the application requirement. - 50- impedance traces on Vin+, and the Vin- to Vout connection (see Figure 4-1--the vias provide the impedance) - Convenient GND test point (TP1). - 453- series matching resistor (R6)--produces a 500- load in combination with resistor R7. 500 is the standard data sheet load impedance. - Power supply ripple rejection capacitors (C1 and C2). - Decoupling capacitors (C3, C4, C5, C6). - Power PADt heatsinking capability. - A good example of high-speed amplifier PCB design and layout. Figure 1-1. Schematic of the THS4271EVM-UG Unity Gain Vs+ 7 2 3 + J2 Vin+ R4 49.9 W U1 6 R6 THS4271 453 W J4 Vout R7 49.9 W 4 Vs- J7 Vs- J6 GND FB2 FB1 Vs- C5 100 pF 1-2 J5 Vs+ TP1 C6 0.1 mF + Vs+ C1 22 mF + C2 22 mF C3 0.1 mF C4 100 pF Chapter 2 Using the EVM Figure 2-1 shows how to connect power supplies, signal source and monitoring instrument. It is recommended that the user connect the EVM as shown to avoid damage to the EVM or the op amp installed on the board. Figure 2-1. Test Equipment Connections Using the EVM 2-1 Chapter 3 EVM Applications Example applications are presented in this chapter. These applications demonstrate the most popular circuits, but many other circuits can be constructed. The purpose of the EVM board is for the user to experiment with different circuits, exploring new and creative design techniques, which is the function of an evaluation board. 3.1 Default Configuration Figure 3-1. Default Configuration Vs+ J2 Vin+ 7 2 3 + R4 49.9 W 4 U1 6 R6 J4 Vout 453 W R7 49.9 W VsNote: This schematic reflects the default THS4271EVM-UG unity gain configuration. Power supply decoupling not shown. The EVM output provides a 500- load to the output of the EVM to provide optimum performance (per the data sheet). The load is implemented as a 453- resistor (R6) in series with the output to J4 (Vout), and a 49.9- output load resistor (R7) from J4 to ground. The gain measured from J2 to the ouput of the amplifier (pin 6) is 1. However, the interaction between R6 and R7 causes the output at J4 to be attenuated by 10:1. When the EVM is monitored with a high input impedance instrument, R7 can remain on the board--however, when the EVM is monitored with an instrument that has an input impedance of 50 , it is recommended that R7 be removed. If the user provides an external load, R7 may be removed, and R6 replaced with a 0- jumper as shown in Figure 3-2. The EVM then provides a voltage gain of 1 (0 dB) at the output connector J4. EVM Applications 3-1 Default Configuration Changing R6 to 49.9 allows the EVM to connect to a 50- load. This amplifier is designed to attain optimum performance driving 500- loads, but 100- loads can be driven. See the data sheet for device characteristics. Figure 3-2. Noninverting Gain Stage Vs+ J2 Vin+ 7 2 3 U1 6 + R4 49.9 W 4 Vs- Note: 3-2 Power supply decoupling not shown. R6 0 J4 Vout Chapter 4 EVM Hardware Description This chapter describes the EVM hardware. It includes the EVM parts list, and printed-circuit board layout. Table 4-1. THS4271EVM-UG Unity Gain Bill of Materials Item Description SMD Size Reference Designator PCB QTY Manufacturer's Part Number Distributor's Part Number 1 Bead, ferrite, 3A, 80 1206 FB1, FB2 2 (Steward) HI1206N800R-00 (Digi-Key) 240-1010-1-ND 2 Capacitor, 22 F, tantalum, 25 V, 10% D C1, C2 2 (AVX) TAJD226K025R (Garrett) TAJD226K025R 3 Capacitor, 100 pF, ceramic, 5%, 150 V AQ12 C4, C5 2 (AVX) AQ12EM101JAJME (TTI) AQ12EM101JAJME 4 Capacitor, 0.1 F, ceramic, X7R, 50 V 0805 C3, C6 2 (AVX) 08055C104KAT2A (Garrett) 08055C104KAT2A 5 Resistor, 49.9 , 1/8 W, 1% 0805 R7 1 (PHYCOMP) 9C08052A49R9FKHFT (Garrett) 9C08052A49R9FKHFT 6 Resistor, 453 , 1/8 W, 1% 0805 R6 1 (PHYCOMP) 9C08052A4530FKHFT (Garrett) 9C08052A4530FKHFT 7 Resistor, 49.9 , 1/4 W, 1% 1206 R4 1 (PHYCOMP) 9C12063A49R9FKRFT (Garrett) 9C12063A49R9FKRFT 8 9 Test point, black TP1 (Allied) 839-3601 J5, J6, J7 1 3 (Keystone) 5001 Jack, banana receptacle, 0.25" diameter hole (HH Smith) 101 (Newark) 35F865 10 Connector, edge, SMA PCB jack J2, J4 2 (Johnson) 142-0701-801 (Allied) 528-0238 11 Standoff, 4-40 hex, 0.625" length 4 (Keystone) 1808 (Newark) 89F1934 12 13 14 Screw, Phillips, 4-40, .250" 4 1 1 SHR-0440-016-SN IC, THS4271 Board, printed-circuit U1 (TI) THS4271DRB (TI) Edge #6443547 Rev.A EVM Hardware Description 4-1 Figure 4-1. Board Layout Views 4-2 Top Layer 2 - Ground Layer 3 - Power Bottom Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments: THS4271EVM-UG