DS89C21 www.ti.com SNLS091C - JUNE 1998 - REVISED APRIL 2013 DS89C21 Differential CMOS Line Driver and Receiver Pair Check for Samples: DS89C21 FEATURES DESCRIPTION * The DS89C21 is a differential CMOS line driver and receiver pair, designed to meet the requirements of TIA/EIA-422-A (RS-422) electrical characteristics interface standard. The DS89C21 provides one driver and one receiver in a minimum footprint. The device is offered in an 8-pin SOIC package. 1 2 * * * * * * Meets TIA/EIA-422-A (RS-422) and CCITT V.11 Recommendation LOW POWER Design--15 mW Typical Guaranteed AC Parameters: - Maximum Driver Skew 2.0 ns - Maximum Receiver Skew 4.0 ns Extended Temperature Range: -40C to +85C Available in SOIC Packaging Operates over 20 Mbps Receiver OPEN Input Failsafe Feature The CMOS design minimizes the supply current to 6 mA, making the device ideal for use in battery powered or power conscious applications. The driver features a fast transition time specified at 2.2 ns, and a maximum differential skew of 2 ns making the driver ideal for use in high speed applications operating above 10 MHz. The receiver can detect signals as low as 200 mV, and also incorporates hysteresis for noise rejection. Skew is specified at 4 ns maximum. The DS89C21 is compatible with TTL and CMOS levels (DI and RO). Connection Diagram See Package Number D (R-PDSO-G8) Truth Table Driver Input Outputs DI DO H H DO* L L L H Truth Table Receiver Inputs Output RI-RI* RO VDIFF +200 mV H VDIFF -200 mV L OPEN (1) (1) H Non-terminated 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1998-2013, Texas Instruments Incorporated DS89C21 SNLS091C - JUNE 1998 - REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage (VCC) 7V -1.5V to VCC + 1.5V Driver Input Voltage (DI) Driver Output Voltage (DO, DO *) -0.5V to +7V Receiver Input Voltage--V CM (RI, RI*) 14V Differential Receiver Input 14V * Voltage--VDIFF (RI, RI ) Receiver Output Voltage (RO) -0.5V to VCC +0.5V Receiver Output Current (RO) 25 mA Storage Temperature Range -65C to +150C (TSTG) Lead Temperature (TL) +260C (Soldering 4 sec.) Maximum Junction Temperature 150C Maximum Package Power Dissipation @+25C D Package 714 mW Derate D Package (1) (2) (3) 5.7 mW/C above +25C Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that the devices should be operated at these limits. The tables of Electrical Characteristics specify conditions for device operation. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. ESD Rating: HBM (1.5 k, 100 pF) all pins 2000V.EIAJ (0, 200 pF) 250V Recommended Operating Conditions Min Max Supply Voltage (VCC) 4.50 5.50 V Operating Temperature (TA) -40 +85 C 500 ns Input Rise or Fall Time (DI) 2 Submit Documentation Feedback Units Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS89C21 DS89C21 www.ti.com SNLS091C - JUNE 1998 - REVISED APRIL 2013 Electrical Characteristics (1) (2) Over recommended supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter Conditions Pin Min DI Typ Max Units 2.0 VCC V GND 0.8 V 10 A -1.5 V 6.0 V DRIVER CHARACTERISTICS VIH Input Voltage HIGH VIL Input Voltage LOW IIH, IIL Input Current V IN = VCC, GND, 2.0V, 0.8V VCL Input Clamp Voltage I IN = -18 mA VOD1 Unloaded Output Voltage No Load VOD2 Differential Output Voltage R L = 100 VOD2 Change in Magnitude of V OD2 0.05 DO, DO* 4.2 2.0 3.0 5.0 V 400 mV for Complementary Output States VOD3 Differential Output Voltage R L = 150 2.1 3.1 V VOD4 Differential Output Voltage R L = 3.9 k 4.0 6.0 VOC Common Mode Voltage R L = 100 2.0 3.0 V VOC Change in Magnitude of V OC 2.0 400 mV V for Complementary Output States IOSD Output Short Circuit Current V OUT = 0V IOFF Output Leakage Current VCC = 0V -115 -150 mA VOUT = +6V -30 0.03 +100 A VOUT = -0.25V -0.08 -100 A -200 25 +200 mV 20 50 RECEIVER CHARACTERISTICS VTL, VTH Differential Thresholds V IN = +7V, 0V, -7V VHYS Hysteresis V CM = 0V RIN Input Impedance V IN = -7V, +7V, Other = 0V IIN Input Current Other Input = 0V, VIN = +10V VCC = 5.5V and VIN = +3.0V VCC = 0V VIN = +0.5V RI, RI* 5.0 VIN = -3V 0 VIN = -10V VOH Output HIGH Voltage IOH = -6 mA VOL Output LOW Voltage I OL = +6 mA, VDIFF = -1V IOSR Output Short Circuit Current V OUT = 0V VDIFF = +1V 9.5 +1.0 0 VDIFF = OPEN 3.8 3.8 -25 k +1.5 mA +0.22 mA -0.04 mA -0.41 -1.25 RO mV mA -2.5 4.9 mA V 4.9 V 0.08 0.3 V -85 -150 mA 3.0 6 mA 3.8 12 mA DRIVER AND RECEIVER CHARACTERISTICS ICC Supply Current No Load DI = VCC or GND DI = 2.4V or 0.5V (1) (2) VCC Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise specified. All typicals are given for VCC = 5.0V and T A = 25C. Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS89C21 3 DS89C21 SNLS091C - JUNE 1998 - REVISED APRIL 2013 Switching Characteristics www.ti.com (1) (2) Over recommended supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units 2 4.9 10 ns 2 4.5 10 ns 0.4 2.0 ns 2.2 9 ns 2.1 9 ns 6 18 30 ns 6 17.5 30 ns 0.5 4.0 ns 2.5 9 ns 2.1 9 ns DIFFERENTIAL DRIVER CHARACTERISTICS tPLHD Propagation Delay LOW to HIGH RL = 100 tPHLD Propagation Delay HIGH to LOW CL = 50 pF tSKD Skew, |tPLHD-t PHLD| tTLH Transition Time LOW to HIGH tTHL Transition Time HIGH to LOW (Figure 2 Figure 3) (Figure 2 Figure 4) RECEIVER CHARACTERISTICS tPLH Propagation Delay LOW to HIGH CL = 50 pF tPHL Propagation Delay HIGH to LOW VDIFF = 2.5V tSK Skew, |tPLH-t PHL| VCM = 0V tr Rise Time tf Fall Time (1) (2) (Figure 5 Figure 6) (Figure 7) All typicals are given for VCC = 5.0V and T A = 25C. f = 1 MHz, tr and tf 6 ns. Parameter Measurement Information Figure 1. VOD and VOC Test Circuit f = 1 MHz, tr and tf 6 ns. Figure 2. Driver Propagation Delay Test Circuit 4 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS89C21 DS89C21 www.ti.com SNLS091C - JUNE 1998 - REVISED APRIL 2013 Figure 3. Driver Differential Propagation Delay Timing Figure 4. Driver Differential Transition Timing f = 1 MHz, tr and tf 6 ns. Figure 5. Receiver Propagation Delay Test Circuit Figure 6. Receiver Propagation Delay Timing Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS89C21 5 DS89C21 SNLS091C - JUNE 1998 - REVISED APRIL 2013 www.ti.com Figure 7. Receiver Rise and Fall Times 6 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS89C21 DS89C21 www.ti.com SNLS091C - JUNE 1998 - REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C * Page Changed layout of National Data Sheet to TI format ............................................................................................................ 6 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS89C21 7 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) DS89C21TM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 DS89C 21TM DS89C21TMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 DS89C 21TM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2018 TAPE AND REEL INFORMATION *All dimensions are nominal Device DS89C21TMX/NOPB Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 5.4 2.0 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2018 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS89C21TMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .010 [0.25] C A B .150-.157 [3.81-3.98] NOTE 4 .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A (.041) [1.04] TYPICAL 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X METAL SOLDER MASK OPENING EXPOSED METAL .0028 MAX [0.07] ALL AROUND SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. 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