W29N01HZ/W
Release Date: November, 9th, 2016
2 Revision A
Table of Contents
1. GENERAL DESCRIPTION ............................................................................................................... 6
2. FEATURES ....................................................................................................................................... 6
3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 7
3.1 Pin assignment 48 pin TSOP1 (x8) ...................................................................................... 7
3.2 Pin assignment 48 ball VFBGA (x8) ..................................................................................... 8
3.3 Pin assignment 63 ball VFBGA ............................................................................................ 9
3.4 Pin Descriptions .................................................................................................................. 10
4. PIN DESCRITPIONS ...................................................................................................................... 11
4.1 Chip Enable (#CE) .............................................................................................................. 11
4.2 Write Enable (#WE) ............................................................................................................ 11
4.3 Read Enable (#RE) ............................................................................................................ 11
4.4 Address Latch Enable (ALE) .............................................................................................. 11
4.5 Command Latch Enable (CLE) .......................................................................................... 11
4.6 Write Protect (#WP) ............................................................................................................ 11
4.7 Ready/Busy (RY/#BY) ........................................................................................................ 11
4.8 Input and Output (I/Ox) ....................................................................................................... 11
5. BLOCK DIAGRAM .......................................................................................................................... 12
6. MEMORY ARRAY ORGANIZATION .............................................................................................. 13
6.1 Array Organization (x8) ...................................................................................................... 13
6.2 Array Organization (x16) .................................................................................................... 14
7. MODE SELECTION TABLE ........................................................................................................... 15
8. COMMAND TABLE......................................................................................................................... 16
9. DEVICE OPERATIONS .................................................................................................................. 17
9.1 READ operation .................................................................................................................. 17
9.1.1 PAGE READ (00h-30h)......................................................................................................... 17
9.1.2 RANDOM DATA OUTPUT (05h-E0h) ................................................................................... 18
9.1.3 READ ID (90h) ...................................................................................................................... 18
9.1.4 READ PARAMETER PAGE (ECh) ....................................................................................... 19
9.1.5 READ STATUS (70h)............................................................................................................ 21
9.2 PROGRAM operation ......................................................................................................... 23
9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................ 23
9.2.2 SERIAL DATA INPUT (80h) .................................................................................................. 23
9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 24
9.3 COPY BACK operation....................................................................................................... 25
9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 25
9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................ 25
9.4 BLOCK ERASE operation .................................................................................................. 27
9.4.1 BLOCK ERASE (60h-D0h) .................................................................................................... 27
9.5 RESET operation ................................................................................................................ 28
9.5.1 RESET (FFh) ........................................................................................................................ 28
9.6 WRITE PROTECT .............................................................................................................. 29
10. ELECTRICAL CHARACTERISTICS............................................................................................... 31
10.1 Absolute Maximum Ratings (1.8V) ..................................................................................... 31