August 2010 Doc ID 13296 Rev 12 1/40
1
STLM75
Digital temperature sensor and thermal watchdog
Features
■Measures temperatures from –55°C to +125°C
(–67°F to +257°F)
–±0.5°C (typ) accuracy
–±2°C (max) accuracy from –25°C to +100°C
■Low operating current: 125 µA (typ)
■No external components required
■2-wire I2C/SMBus-compatible serial interface
– Supports bus time-out feature
– Selectable bus address allows connection
of up to eight devices on the bus
■Wide power supply range-operating voltage
range: 2.7 V to 5.5 V
■Conversion time is 150 ms (max)
■Programmable temperature threshold and
hysteresis set points
■Pin- and software-compatible with LM75 (drop-
in replacement)
■Power-up defaults permit standalone operation
as a thermostat
■Shutdown mode to minimize power
consumption
■Output pin (open drain) can be configured for
interrupt or comparator/thermostat mode (dual
purpose event pin)
■Packages:
–SO8
– MSOP8 (TSSOP8)
SO8
MSOP8
(TSSOP8)
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Contents STLM75
2/40 Doc ID 13296 Rev 12
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Temperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.1 SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.2 SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.3 OS/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.4 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.5 A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.6 VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3 Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5 Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6 Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.7 Temperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.8 Bus timeout feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.1 Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.2 Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.3 Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1.4 Overlimit temperature register (TOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1.5 Hysteresis temperature register (THYS) . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.2 Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.1 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.2 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STLM75 Contents
Doc ID 13296 Rev 12 3/40
3.4.3 Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.4 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.5 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.5 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.6 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
List of tables STLM75
4/40 Doc ID 13296 Rev 12
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 2. Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 3. Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4. Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5. Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6. Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 7. Temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 8. TOS and THYS register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. STLM75 serial bus slave addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 11. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 12. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 13. AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 14. SO8 – 8-lead plastic small outline package mechanical data. . . . . . . . . . . . . . . . . . . . . . . 33
Table 15. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 16. Carrier tape dimensions for SO8 and MSOP8 (TSSOP8) packages . . . . . . . . . . . . . . . . . 35
Table 17. Reel dimensions for 12 mm carrier tape - SO8 and MSOP8 (TSSOP8) packages . . . . . . 36
Table 18. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
STLM75 List of figures
Doc ID 13296 Rev 12 5/40
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Connections (SO8 and MSOP8/TSSOP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Typical 2-wire interface connections diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. OS output temperature response diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7. Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 8. Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS) . . . . . . . . . . . . 24
Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 24
Figure 11. Typical 1-byte READ from the configuration register with preset pointer . . . . . . . . . . . . . . 24
Figure 12. Typical pointer set followed by an immediate READ from the configuration register . . . . . 25
Figure 13. Configuration register WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 14. TOS and THYS WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 15. Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 16. Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 17. SO8 – 8-lead plastic small outline package mechanical drawing . . . . . . . . . . . . . . . . . . . . 33
Figure 18. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 19. Carrier tape for SO8 and MSOP8 (TSSOP8) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 20. Reel schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 21. Device topside marking information (SO8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 22. Device topside marking information (MSOP8/TSSOP8). . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Description STLM75
6/40 Doc ID 13296 Rev 12
1 Description
The STLM75 is a high-precision digital CMOS temperature sensor IC with a sigma-delta
temperature-to-digital converter and an I2C-compatible serial digital interface. It is targeted
for general applications such as personal computers, system thermal management,
electronics equipment, and industrial controllers, and is packaged in the industry standard
8-lead TSSOP and SO8 packages.
The device contains a band gap temperature sensor and 9-bit ADC which monitor and
digitize the temperature to a resolution up to 0.5 °C. The STLM75 is typically accurate to
(±3 °C - max) over the full temperature measurement range of –55 °C to 125 °C with ±2 °C
accuracy in the –25 °C to +100 °C range. The STLM75 is pin-for-pin and software
compatible with the LM75B.
The STLM75 is specified for operating at supply voltages from 2.7 V to 5.5 V. Operating at
3.3 V, the supply current is typically (125 µA).
The on-board sigma-delta analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in degrees centigrade; for Fahrenheit
applications a lookup table or conversion routine is required.
The STLM75 is factory-calibrated and requires no external components to measure
temperature.
1.1 Serial communications
The STLM75 has a simple 2-wire I2C-compatible digital serial interface which allows the
user to access the data in the temperature register at any time. It communicates via the
serial interface with a master controller which operates at speeds up to 400 kHz. Three pins
(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8
devices on the same bus without address conflict.
In addition, the serial interface gives the user easy access to all STLM75 registers to
customize operation of the device.
STLM75 Description
Doc ID 13296 Rev 12 7/40
1.2 Temperature sensor output
The STLM75 temperature sensor has a dedicated open drain overlimit signal/interrupt
(OS/INT) output which features a thermal alarm function. This function provides a user-
programmable trip and turn-off temperature. It can operate in either of two selectable
modes:
●Comparator mode, and
●Interrupt mode.
At power-up the STLM75 immediately begins measuring the temperature and converting
the temperature to a digital value.
The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (TOS) READ/WRITE register), and the hysteresis temperature (which is stored in
the 16-bit (THYS) READ/WRITE register). If the measured value exceeds these limits, the
OS/INT pin is activated (see Figure 3 on page 8 and Table 2 on page 14).
Note: See Pin descriptions on page 9 for details.
Figure 1. Logic diagram
1. SDA and OS/INT are open drain.
AI11899
SDA(1)
VDD
STLM75
GND
SCL
OS/INT(1)
A0
A1
A2
Description STLM75
8/40 Doc ID 13296 Rev 12
Figure 2. Connections (SO8 and MSOP8/TSSOP8)
1. SDA and OS/INT are open drain.
Figure 3. Functional block diagram
Table 1. Signal names
Pin Sym Type/direction Description
1SDA
(1)
1. SDA and OS/INT are open drain.
Input/output Serial data input/output
2 SCL Input Serial clock input
3OS
/INT(1) Output Overlimit signal/interrupt alert output
4 GND Supply ground Ground
5A
2Input Address2 input
6A
1Input Address1 input
7A
0Input Address0 input
8V
DD Supply power Supply voltage (2.7 V to 5.5 V)
1
A2
GND
A1
A0
SCL
SDA(1) VDD
OS/INT(1)
AI11841
2
3
4
8
7
6
5
AI11833a
Temperature
Sensor and
Analog-to-Digital
Converter (ADC)
Σ-Δ
A1
A0
VDD
A2
GND
Configuration Register
SDA
SCL
OS/INT
2-wire I2C Interface
Pointer Register
Control and Logic
Comparator
Temperature Register
THYS Set Point Register
TOS Set Point Register
STLM75 Description
Doc ID 13296 Rev 12 9/40
1.3 Pin descriptions
See Figure 1 on page 7 and Table 1 on page 8 for a brief overview of the signals connected
to this device.
1.3.1 SDA (open drain)
This is the serial data input/output pin for the 2-wire serial communication port.
1.3.2 SCL
This is the serial clock input pin for the 2-wire serial communication port.
1.3.3 OS/INT (open drain)
This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up
resistor. In Interrupt mode, it outputs a pulse whenever the measured temperature exceeds
the programmed threshold (TOS). It behaves as a thermostat, toggling to indicate whether
the measured temperature is above or below the threshold and hysteresis (THYS).
1.3.4 GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5 A2, A1, A0
A2, A1, and A0 are selectable address pins for the 3 LSBs of the I2C interface address.
They can be set to VDD or GND to provide 8 unique address selections.
1.3.6 VDD
This is the supply voltage pin, and ranges from +2.7 V to +5.5 V.
Operation STLM75
10/40 Doc ID 13296 Rev 12
2 Operation
After each temperature measurement and analog-to-digital conversion, the STLM75 stores
the temperature as a 16-bit two’s complement number (see Table 5: Register pointers
selection summary on page 17) in the 2-byte temperature register (see Table 7 on page 18).
The most significant bit (S) indicates if the temperature is positive or negative:
●for positive numbers S = 0, and
●for negative numbers S = 1.
The most recently converted digital measurement can be read from the temperature register
at any time. Since temperature conversions are performed in the background, reading the
temperature register does not affect the operation in progress.
The temperature data is provided by the 9 MSBs (bits 15 through 7). Bits 6 through 0 are
unused. Table 3 on page 15 gives examples of the digital output data and corresponding
temperatures. The data is compared to the values in the TOS and THYS registers, and then
the OS is updated based on the result of the comparison and the operating mode.
The alarm fault tolerance is controlled by the FT1 and FT0 bits in the configuration register.
They are used to set up a fault queue. This prevents false tripping of the OS/INT pin when
the STLM75 is used in a noisy environment (see Table 3 on page 15).
The active state of the OS output can be changed via the polarity bit (POL) in the
configuration register. The power-up default is active-low.
If the user does not wish to use the thermostat capabilities of the STLM75, the OS output
should be left floating.
Note: If the thermostat is not used, the TOS and THYS registers can be used for general storage of
system data.
STLM75 Operation
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2.1 Applications information
STLM75 digital temperature sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pull-
up resistors on SCL, SDA, and OS/INT outputs. A 0.1 µF bypass capacitor on VDD is
recommended. The sensing device of STLM75 is the chip itself. The typical interface
connection for this type of digital sensor is shown in Figure 4 on page 11.
Intended applications include:
●System thermal management
●Computers/disk drivers
●Electronics/test equipment
●Power supply modules
●Consumer products
●Battery management
●Fax/printers management
●Automotive
Figure 4. Typical 2-wire interface connections diagram
1. SDA and OS/INT are open drain.
AI12200
Pull-up
VDD
O.S./INT(1)
VDD
VDD
Master
Device
0.1μF
STLM75
SCL
GND
SDA(1)
Pull-up
VDD
10kΩ
10kΩ10kΩ
A0
A1
A2
I2C Address = 1001000 (1001A2A1A0)
Operation STLM75
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2.2 Thermal alarm function
The STLM75 thermal alarm function provides user-programmable thermostat capability and
allows the STLM75 to function as a standalone thermostat without using the serial interface.
The OS output is the alarm output. This signal is an open drain output, and at power-up, this
pin is configured with active-low polarity by default.
2.3 Comparator mode
In comparator mode, each time a temperature-to-digital (T-to-D) conversion occurs, the new
digital temperature is compared to the value stored in the TOS and THYS registers. If a fault
tolerance number of consecutive temperature measurements are greater than the value
stored in the TOS register, the OS output will be asserted.
For example, if the FT1 and FT0 bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed TOS to activate the OS output. Once the OS
output is active, it will remain active until the first time the measured temperature drops
below the temperature stored in the THYS register.
When the thermostat is in comparator mode, the OS can be programmed to operate with
any amount of hysteresis. The OS output becomes active when the measured temperature
exceeds the TOS value a consecutive number of times as defined by the FT1 and FT0 fault
tolerance (FT) bits in the configuration register. The OS then becomes inactive when the
temperature falls below the value stored in THYS register for a consecutive number of times
as defined by the fault tolerance bits (FT1 and FT0). Putting the device into shutdown mode
does not clear OS in comparator mode.
STLM75 Operation
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2.4 Interrupt mode
In interrupt mode, the OS output first becomes active when the measured temperature
exceeds the TOS value a consecutive number of times as determined by the FT value in the
configuration register. Once activated, the OS can only be cleared by either putting the
STLM75 into shutdown mode or by reading from any register (temperature, configuration,
TOS, or THYS) on the device. Once the OS has been deactivated, it will only be reactivated
when the measured temperature falls below the THYS value a consecutive number of times
equal to the FT value. Figure 5 illustrates typical OS output temperature response.
Note: The OS can only be cleared by putting the device into shutdown mode or reading any
register. Thus, this interrupt/clear process is cyclical between the TOS and THYS events (i.e.,
TOS, clear, THYS, clear, TOS, clear, THYS, clear, and so forth). These interrupt mode resets
of the OS/INT pin occur only when the STLM75 is read or placed into shutdown mode.
Otherwise, OS/INT would remain active independently for any event.
Figure 5. OS output temperature response diagram
1. These interrupt mode resets of O.S. occur only when STLM75 is read or placed in shutdown. Otherwise,
O.S. would remain active indefinitely for any event.
(1) (1) (1)
Operation STLM75
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2.5 Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS output will be activated. Fault tolerance refers to the number of
consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Ta b l e 2 . At power-up,
these bits both default to logic '0'.
Note: OS output will be asserted one tCONV after fault tolerance is met, provided that the error
condition remains.
2.6 Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STLM75 will go into a low-power standby state. The OS output will
be cleared if the thermostat is operating in Interrupt mode and the OS will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STLM75 to normal operation.
Table 2. Fault tolerance setting
FT1 FT0 STLM75 (consecutive faults) Comments
0 0 1 Power-up default
01 2
10 4
11 6
STLM75 Operation
Doc ID 13296 Rev 12 15/40
2.7 Temperature data format
Ta bl e 3 shows the relationship between the output digital data and the external temperature.
Temperature data for the temperature, TOS, and THYS registers is represented as a 9-bit,
two’s complement word.
The left-most bit in the output data stream contains temperature polarity information for
each conversion. If the sign bit is '0', the temperature is positive and if the sign bit is '1,' the
temperature is negative.
2.8 Bus timeout feature
The STLM75 supports an SMBus compatible timeout function which will reset the serial
I2C/SMBus interface if SDA is held low for a period greater than the timeout duration
between a START and STOP condition. If this occurs, the device will release the bus and
wait for another START condition.
Table 3. Relationship between temperature and digital output
Temperature
Digital output
Binary HEX
+125 °C 0 1111 1010 0FAh
+25 °C 0 0011 0010 032h
+0.5 °C 0 0000 0001 001h
0 °C 0 0000 0000 000h
–0.5 °C 1 1111 1111 1FFh
–25 °C 1 1100 1110 1CEh
–40 °C 1 1011 0000 1B0h
–55 °C 1 1001 0010 192h
Functional description STLM75
16/40 Doc ID 13296 Rev 12
3 Functional description
The STLM75 registers have unique pointer designations which are defined in Tabl e 5 o n
page 17. Whenever any READ/WRITE operation to the STLM75 register is desired, the user
must “point” to the device register to be accessed.
All of these user-accessible registers can be accessed via the digital serial interface at
anytime (see Serial interface on page 20), and they include:
●Command register/address pointer register
●Configuration register
●Temperature register
●Overlimit signal temperature register (TOS)
●Hysteresis temperature register (THYS)
3.1 Registers and register set formats
3.1.1 Command/pointer register
The most significant bits (MSBs) of the command register must always be zero. Writing a '1'
into any of these bits will cause the current operation to be terminated (bit 2 through bit 7
must be kept '0', see Ta b l e 4 ).
The command register retains pointer information between operations (see Ta bl e 5 ).
Therefore, this register only needs to be updated once for consecutive READ operations
from the same register. All bits in the command register default to '0' at power-up.
Table 4. Command/pointer register format
MSB LSB
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
000000P1P0
Pointer/register
select bits
STLM75 Functional description
Doc ID 13296 Rev 12 17/40
3.1.2 Configuration register
The configuration register is used to store the device settings such as device operation
mode, OS operation mode, OS polarity, and OS fault queue.
The configuration register allows the user to program various options such as thermostat
fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The
user has READ/WRITE access to all of the bits in the configuration register except the MSB
(Bit7), which is reserved as a “Read only” bit (see Ta b l e 6 ). The entire register is volatile and
thus powers-up in its default state only.
Table 5. Register pointers selection summary
Pointer
value
(H)
P1 P0 Name Description Width
(bits)
Type
(R/W)
Power-on
default Comments
00 0 0 TEMP Temperature
register 16 Read-
only N/A To store measured temperature data
01 0 1 CONF Configuration
register 8R/W 00
02 1 0 THYS
Hysteresis
register 16 R/W 4B00 Default = 75 °C
03 1 1 TOS
Overtemperature
shutdown 16 R/W 5000 Set point for overtemperature
shutdown (TOS) limit default = 80 °C
Table 6. Configuration register format
Byte
MSB LSB
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
STLM75 Reserved 0 0 FT1 FT0 POL M SD
Default00000000
Keys: SD = shutdown control bit FT1 = fault tolerance1 bit
M = thermostat mode(1) Bit 5 = must be set to '0'.
POL = output polarity(2) Bit 6 = must be set to '0'.
FT0 = fault tolerance0 bit Bit 7 = must be set to '0'. Reserved.
1. Indicates operation mode; 0 = comparator mode, and 1 = interrupt mode (see Comparator mode and Interrupt mode on
page 13).
2. The OS is active-low ('0').
Functional description STLM75
18/40 Doc ID 13296 Rev 12
3.1.3 Temperature register
The temperature register is a two-byte (16-bit) “Read only” register (see Table 7 on
page 18). Digital temperatures from the T-to-D converter are stored in the temperature
register in two’s complement format, and the contents of this register are updated each time
the T-to-D conversion is finished.
The user can read data from the temperature register at any time. When a T-to-D
conversion is completed, the new data is loaded into a comparator buffer to evaluate fault
conditions and will update the temperature register if a read cycle is not ongoing. If a READ
is ongoing, the previous temperature will be read. Accessing the STLM75 continuously
without waiting at least one conversion time between communications will prevent the
device from updating the temperature register with a new temperature conversion result.
Consequently, the STLM75 should not be accessed continuously with a wait time of less
than tCONV (max).
All unused bits following the digital temperature will be zero. The MSB position of the
temperature register always contains the sign bit for the digital temperature, and Bit14
contains the temperature MSB. All bits in the temperature register default to zero at power-
up.
Note: These are comparable formats to the LM75.
3.1.4 Overlimit temperature register (TOS)
The TOS register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable upper trip-point temperature for the thermal alarm in two’s complement
format (see Table 8 on page 19). This register defaults to 80 °C at power-up (i.e., 0101 0000
0000 0000).
The format of the TOS register is identical to that of the temperature register. The MSB
position contains the sign bit for the digital temperature and Bit14 contains the temperature
MSB.
For 9-bit conversions, the trip-point temperature is defined by the 9 MSBs of the TOS
register, and all remaining bits are “Don’t cares”.
Table 7. Temperature register format
Bytes HS byte LS byte
Bits
MSB TMSB TLSB LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
STLM75 TD8
(Sign)
TD7
(TMSB)
TD
6
TD
5
TD
4
TD
3
TD
2
TD
1
TD0
(TLSB) 000000 0
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TDx = temperature data bits
STLM75 Functional description
Doc ID 13296 Rev 12 19/40
3.1.5 Hysteresis temperature register (THYS)
THYS register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable lower trip-point temperature for the thermal alarm in two’s complement
format (see Ta b l e 8 ). This register defaults to 75 °C at power-up (i.e., 0100 1011 0000
0000).
The format of this register is the same as that of the temperature register. The MSB position
contains the sign bit for the digital temperature and bit14 contains the temperature MSB.
Note: These are comparable formats to the DS75 and LM75.
3.2 Power-up default conditions
The STLM75 always powers up in the following default states:
●Thermostat mode = comparator mode
●Polarity = active-low
●Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register)
●TOS = 80 °C
●THYS = 75 °C
●Register pointer = 00 (temperature register)
Note: After power-up these conditions can be reprogrammed via the serial interface.
Table 8. TOS and THYS register format
Bytes HS byte LS byte
Bits
MSB TMSB TLSB LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
STLM75 SB TMSB TD TD TD TD TD TD 9-bit
TLSB 000000 0
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature data
Functional description STLM75
20/40 Doc ID 13296 Rev 12
3.3 Serial interface
Writing to and reading from the STLM75 registers is accomplished via the two-wire serial
interface protocol which requires that one device on the bus initiates and controls all READ
and WRITE operations. This device is called the “master” device. The master device also
generates the SCL signal which provides the clock signal for all other devices on the bus.
These other devices on the bus are called “slave” devices. The STLM75 is a slave device
(see Ta b l e 9 ). Both the master and slave devices can send and receive data on the bus.
During operations, one data bit is transmitted per clock cycle. All operations follow a
repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.
Note: There are no unused clock cycles during any operation, so there must not be any breaks in
the data stream and ACKs/NACKs during data transfers. Consequently, having too few
clock cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit
register occurs. So, the entire word must be transferred out regardless of the superflous
trailing zeroes.
3.4 2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined:
●Data transfer may be initiated only when the bus is not busy.
●During data transfer, the data line must remain stable whenever the clock line is high.
●Changes in the data line, while the clock line is high, will be interpreted as control
signals.
Accordingly, the following bus conditions have been defined (see Figure 6 on page 21):
3.4.1 Bus not busy
Both data and clock lines remain high.
3.4.2 Start data transfer
A change in the state of the data line, from high to low, while the clock is high, defines the
START condition.
3.4.3 Stop data transfer
A change in the state of the data line, from low to high, while the clock is high, defines the
STOP condition.
Table 9. STLM75 serial bus slave addresses
MSB LSB
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
1 0 0 1 A2 A1 A0 R/W
STLM75 Functional description
Doc ID 13296 Rev 12 21/40
3.4.4 Data valid
The state of the data line represents valid data when after a start condition, the data line is
stable for the duration of the high period of the clock signal. The data on the line may be
changed during the low period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a start condition and terminated with a stop condition.
The number of data bytes transferred between the start and stop conditions is not limited.
The information is transmitted byte-wide and each receiver acknowledges with a ninth bit.
By definition a device that gives out a message is called “transmitter”, the receiving device
that gets the message is called “receiver”. The device that controls the message is called
“master”. The devices that are controlled by the master are called “slaves”.
Figure 6. Serial bus data transfer sequence
AI00587
DATA
CLOCK
DATA LINE
STABLE
DATA VALID
START
CONDITION
CHANGE OF
DATA ALLOWED
STOP
CONDITION
Functional description STLM75
22/40 Doc ID 13296 Rev 12
3.4.5 Acknowledge
Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse (see Figure 7). A slave receiver which is addressed is obliged to
generate an acknowledge after the reception of each byte that has been clocked out of the
slave transmitter.
The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable low during the high period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line high to enable the master to generate the
STOP condition.
Figure 7. Acknowledgement sequence
AI00601
DATA OUTPUT
BY RECEIVER
DATA OUTPUT
BY TRANSMITTER
SCL FROM
MASTER
START
CLOCK PULSE FOR
ACKNOWLEDGEMENT
12 89
MSB LSB
STLM75 Functional description
Doc ID 13296 Rev 12 23/40
3.5 READ mode
In this mode the master reads the STLM75 slave after setting the slave address (see
Figure 8). Following the WRITE mode control bit (R/W=0) and the acknowledge bit, the word
address 'An' is written to the on-chip address pointer.
There are two READ modes:
●Preset pointer locations (e.g. temperature, TOS and THYS registers), and
●Pointer setting (the pointer has to be set for the register that is to be read)
Note: The temperature register pointer is usually the default pointer.
These modes are shown in the READ mode typical timing diagrams (see Figure 9,
Figure 10, and Figure 11).
Figure 8. Slave address location
AI12226
R/W
SLAVE ADDRESS
START A
0 1 A2 A1 A010
MSB
LSB
Functional description STLM75
24/40 Doc ID 13296 Rev 12
Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS)
Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)
Figure 11. Typical 1-byte READ from the configuration register with preset pointer
AI12227
119199
1
Start
by
Master
Address Byte Most Significant Data Byte Least Significant Data Byte
ACK
by
STLM75
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
AI12228
119199
1
Repeat
Start
by
Master
Address Byte Most Significant Data Byte Least Significant Data Byte
ACK
by
STLM75
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
1199
1
Start
by
Master
Address Byte Pointer Byte
ACK
by
STLM75
ACK
by
STLM75
0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0
1199
1
Start
by
Master
Address Byte Data Byte
ACK
by
STLM75
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0
AI12229
STLM75 Functional description
Doc ID 13296 Rev 12 25/40
3.6 WRITE mode
In this mode the master transmitter transmits to the STLM75 slave receiver. Bus protocol is
shown in Figure 12. Following the START condition and slave address, a logic '0' (R/W = 0)
is placed on the bus and indicates to the addressed device that word address will follow and
is to be written to the on-chip address pointer.
These modes are shown in the WRITE mode typical timing diagrams (see Figure 12, and
Figure 13, and Figure 14).
Figure 12. Typical pointer set followed by an immediate READ from the
configuration register
Figure 13. Configuration register WRITE
AI12230
1919
Repeat
Start
by
Master
ACK
by
STLM75
No ACK
by
STLM75
Stop
Cond.
by
Master
1 0 0 1 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
R/W
Address Byte Data Byte
1199
1
Start
by
Master
Address Byte Pointer Byte
ACK
by
STLM75
ACK
by
STLM75
0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0
AI12231
119919
1
Start
by
Master
Address Byte Pointer Byte
ACK
by
STLM75
ACK
by
STLM75
ACK
by
STLM75
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 0 0 0 D4 D3 D2 D1 D0D1 D0
Configuration Byte
Functional description STLM75
26/40 Doc ID 13296 Rev 12
Figure 14. TOS and THYS WRITE
AI12232
1919
ACK
by
STLM75
ACK
by
STLM75
Stop
Cond.
by
Master
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte Least Significant Data Byte
1199
1
Start
by
Master
Address Byte Pointer Byte
ACK
by
STLM75
ACK
by
STLM75
0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0
STLM75 Typical operating characteristics
Doc ID 13296 Rev 12 27/40
4 Typical operating characteristics
Figure 15. Temperature variation vs. voltage
–60
–40
–20
0
20
40
60
80
100
120
140
23456
–20
0.5
85
110
Voltage (V)
Temperature (°C)
125
AI12258
Maximum ratings STLM75
28/40 Doc ID 13296 Rev 12
5 Maximum ratings
Stressing the device above the ratings listed in the absolute maximum ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 10. Absolute maximum ratings
Symbol Parameter Value Unit
TSTG Storage temperature (VCC off, VBAT off) –60 to 150 °C
TSLD(1) Lead solder temperature for 10 seconds 260 °C
VIO Input or output voltage VCC +0.5 V
VDD Supply voltage 7.0 V
VOUT Output voltage VDD + 0.5 V
IOOutput current 10 mA
PDPower dissipation 320 mW
θJA Thermal resistance SO8 128.4 °C/W
MSOP8 (TSSOP8) 216.3 °C/W
1. Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.
STLM75 DC and AC parameters
Doc ID 13296 Rev 12 29/40
6 DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics tables that
follow, are derived from tests performed under the measurement conditions summarized in
Ta bl e 1 1 . Designers should check that the operating conditions in their circuit match the
operating conditions when relying on the quoted parameters.
Table 11. Operating and AC measurement conditions
Parameter Conditions Unit
VDD supply voltage 2.7 to 5.5 V
Ambient operating temperature (TA) –55 to 125 °C
Input rise and fall times ≤ 5ns
Input pulse voltages 0.2 to 0.8VCC V
Input and output timing reference voltages 0.3 to 0.7VCC V
DC and AC parameters STLM75
30/40 Doc ID 13296 Rev 12
Table 12. DC and AC characteristics
Sym Description Test condition(1)
1. Valid for ambient operating temperature: TA = –55 to 125 °C; VDD = 2.7 V to 5.5 V (except where noted).
Min Typ(2)
2. Typical number taken at VDD = 3.0 V, TA = 25 °C
Max Unit
VDD Supply voltage TA = –55 to +125 °C 2.7 5.5 V
IDD
VDD supply current, active
temperature conversions VDD = 3.3 V 125 150 µA
VDD supply current,
communication only TA = 25 °C 70 100 µA
IDD1
Shutdown mode supply
current, serial port inactive TA = 25 °C 1.0 µA
Accuracy for corresponding
range 2.7 V ≤ VDD ≤ 5.5 V
–25 °C < TA < 100 ±0.5 ±2.0 °C
–55 °C < TA < 125 ±0.5 ±3.0 °C
Resolution 9-bit
temperature data
0.5 °C/LSB
9bits
tCONV Conversion time 9 150 ms
TOS Overtemperature shutdown Default value 80 °C
THYS Hysteresis Default value 75 °C
VOL1
OS saturation voltage
(VDD = 5V) 4 mA sink current 0.5 V
VIH Input logic high Digital pins
(SCL, SDA, A2-A0) 0.7 x VDD VDD + 0.5 V
VIL Input logic low Digital pins –0.45 0.3 x VDD V
VOL2 Output logic low (SDA) IOL2 = 3 mA 0.4 V
CIN Capacitance 5 pF
STLM75 DC and AC parameters
Doc ID 13296 Rev 12 31/40
Figure 16. Bus timing requirements sequence
Table 13. AC characteristics
Sym Parameter(1)(2)
1. Valid for ambient operating temperature: TA = –55 to 125 °C; VDD = 2.7 V to 5.5 V (except where noted).
2. Devices are tested at maximum clock frequency of 400 kHz.
Min Max Unit
fSCL SCL clock frequency 0 400 kHz
tBUF Time the bus must be free before a new transmission can start 1.3 µs
tFSDA and SCL fall time 300 ns
tHD:DAT(3)
3. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling
edge of SCL.
Data hold time 0 µs
tHD:STA
START condition hold time
(after this period the first clock pulse is generated) 600 ns
tHIGH Clock high period 600 ns
tLOW Clock low period 1.3 µs
tRSDA and SCL rise time 300 ns
tSU:DAT Data setup time 100 ns
tSU:STA
START condition setup time
(only relevant for a repeated start condition) 600 ns
tSU:STO STOP condition setup time 600 ns
tTIME-OUT SDA time low for reset of serial interface(4)
4. For SMBus compatibility, the STLM75 supports bus time-out. Holding the SDA line low for a time greater
than time-out will cause the STLM75 to reset the SDA to the idle state of serial bus communication (SDA
set to high).
75 325 ms
AI00589
SDA
P
tSU:STOtSU:STA
tHD:STA
SR
SCL
tSU:DAT
tF
tHD:DAT
tR
tHIGH
tLOW
tHD:STAtBUF
SP
Package mechanical data STLM75
32/40 Doc ID 13296 Rev 12
7 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
STLM75 Package mechanical data
Doc ID 13296 Rev 12 33/40
Figure 17. SO8 – 8-lead plastic small outline package mechanical drawing
Note: Drawing is not to scale.
SO-A
E1
8
ccc
b
e
A
D
c
1
E
h x 45˚
A2
k
0.25 mm
L
L1
A1
GAUGE PLANE
Table 14. SO8 – 8-lead plastic small outline package mechanical data
Sym
mm inches
Typ Min Max Typ Min Max
A1.750.069
A1 0.10 0.25 0.004 0.010
A2 1.25 0.049
b 0.28 0.48 0.011 0.019
c 0.17 0.23 0.007 0.009
ccc 0.10 0.004
D 4.90 4.80 5.00 0.193 0.189 0.197
E 6.00 5.80 6.20 0.236 0.228 0.244
E1 3.90 3.80 4.00 0.154 0.150 0.157
e1.27 0.050
h 0.25 0.50 0.010 0.020
k 0°8° 0°8°
L 0.40 0.127 0.016 0.050
L1 1.04 0.041
Package mechanical data STLM75
34/40 Doc ID 13296 Rev 12
Figure 18. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm)
package mechanical drawing
Note: Drawing is not to scale.
E3_ME
1
8
ccc
c
L
EE1
D
A2A
k
eb
4
5
A1
L1
L2
Table 15. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm)
package mechanical data
Sym
mm inches
Typ Min Max Typ Min Max
A1.100.043
A1 0.00 0.15 0.000 0.006
A2 0.85 0.75 0.95 0.034 0.030 0.037
b 0.22 0.40 0.009 0.016
c 0.08 0.23 0.003 0.009
D 3.00 2.80 3.20 0.118 0.110 0.126
E 4.90 4.65 5.15 0.193 0.183 0.203
E1 3.00 2.80 3.10 0.118 0.110 0.122
e0.65 0.026
L 0.60 0.40 0.80 0.024 0.016 0.032
L1 0.95 0.037
L2 0.25 0.010
k 0°8° 0°8°
ccc 0.10 0.004
STLM75 Package mechanical data
Doc ID 13296 Rev 12 35/40
Figure 19. Carrier tape for SO8 and MSOP8 (TSSOP8) packages
T
K0
P1
A0
B0
P2
P0
CENTER LINES
OF CAVITY
W
E
F
D
TOP COVER
TAPE
USER DIRECTION OF FEED
AM03073v1
Table 16. Carrier tape dimensions for SO8 and MSOP8 (TSSOP8) packages
Package W D E P0P2FA
0B0K0P1TUnit
Bulk
Qty
SO8 12.00
±0.30
1.50
+0.10/
–0.00
1.75
±0.10
4.00
±0.10
2.00
±0.10
5.50
±0.05
6.50
±0.10
5.30
±0.10
2.20
±0.10
8.00
±0.10
0.30
±0.05 mm 2500
MSOP8
(TSSOP8)
12.00
±0.30
1.50
+0.10/
–0.00
1.75
±0.10
4.00
±0.10
2.00
±0.10
5.50
±0.05
5.30
±0.10
3.40
±0.10
1.40
±0.10
8.00
±0.10
0.30
±0.05 mm 1000
Package mechanical data STLM75
36/40 Doc ID 13296 Rev 12
Figure 20. Reel schematic
Note: The dimensions given in Ta b l e 1 7 incorporate tolerances that cover all variations on critical
parameters
A
D
B
Full radius
Tape slot
In core for
Tape start
2.5mm min.width
G measured
At hub
C
N
40mm min.
Access hole
At slot location
T
AM04928v1
Table 17. Reel dimensions for 12 mm carrier tape - SO8 and MSOP8 (TSSOP8) packages
Package A
(max)
B
(min) CD
(min)
N
(min) GT
(max)
SO8 330 mm
(13-inch) 1.5 mm 13 mm
± 0.2 mm 20.2 mm 60 mm 12.4 mm
+ 2/–0 mm 18.4 mm
MSOP8
(TSSOP8)
180 mm
(7-inch) 1.5 mm 13 mm
± 0.2 mm 20.2 mm 60 mm 12.4 mm
+ 2/–0 mm 18.4 mm
STLM75 Part numbering
Doc ID 13296 Rev 12 37/40
8 Part numbering
Table 18. Ordering information scheme
For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.
Example: STLM75 M 2 F
Device type
STLM75
Package
M = SO8
DS = MSOP8 (TSSOP8)
Temperature range
2 = –55 to 125 °C
Shipping method
F = ECOPACK® package, tape & reel
E = ECOPACK® package, tube
Package marking information STLM75
38/40 Doc ID 13296 Rev 12
9 Package marking information
Figure 21. Device topside marking information (SO8)
1. Traceability codes
Figure 22. Device topside marking information (MSOP8/TSSOP8)
1. Traceability codes
xxxxx(1)
STLM75M2
AM04934v1
LM75
xxxx(1)
AM04935v1
STLM75 Revision history
Doc ID 13296 Rev 12 39/40
10 Revision history
Table 19. Document revision history
Date Revision Changes
23-Dec-2005 1 Initial release.
24-Feb-2006 2 Updated template, characteristics (Figure 1, 2, 3, 4, 5, ; Table 1, 6, 8,
11, 12, 13)
06-Mar-2006 3 Updated characteristics (Figure 5; Table 11, 12, 13)
28-Jul-2006 4 Updated figure 1 and 5
22-Jan-2007 5
Updated features (cover page), DC and AC characteristics (Ta b l e 1 2 ),
package mechanical data (Figure 17, Figure 14, Figure 18, Tabl e 1 5)
and part numbering (Tabl e 18 ).
01-Mar-2007 6
Updated cover page (package information); Section 2.3: Comparator
mode; Ta bl e 1 2 ; package mechanical data (Figure 18, and Ta b l e 1 5 );
and part numbering (Tabl e 18 ).
06-Jun-2007 7 Updated cover page, document status upgraded to full datasheet,
updated Ta b l e 1 3 .
07-Jul-2008 8 Minor text changes; added Section 2.8: Bus timeout feature; updated
Section 3.1.3: Temperature register.
18-Jul-2008 9 Updated cover page and Ta bl e 1 8 .
09-Apr-2009 10
Updated Features, Ta bl e 1 0 , 12, 13, text in Section 7: Package
mechanical data; added tape and reel information Figure 19, Ta b l e 1 6 ;
minor reformatting.
24-Mar-2010 11 Updated Section 2.3, Section 2.5; footnote 1 of Ta b l e 1 0 ; reformatted
document.
17-Aug-2010 12 Updated Ta b l e 1 6 ; added Figure 20, Tab l e 17 , Section 9: Package
marking information; minor textual changes.
STLM75
40/40 Doc ID 13296 Rev 12
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