BSZ060NE2LS For OptiMOSTM Power-MOSFET Product Summary Features * Optimized for high performance Buck converter (Server,VGA) VDS * Very Low FOMQOSS for High Frequency SMPS RDS(on),max * Low FOMSW for High Frequency SMPS * Excellent gate charge x R DS(on) product (FOM) 25 V VGS=10 V 6 mW VGS=4.5 V 8.1 ID 40 A * Very low on-resistance R DS(on) @ V GS=4.5 V PG-TSDSON-8 (fused leads) * 100% avalanche tested * Superior thermal resistance * N-channel * Qualified according to JEDEC1) for target applications * Pb-free lead plating; RoHS compliant * Halogen-free according to IEC61249-2-21 Type Package Marking BSZ060NE2LS PG-TSDSON-8 (fused leads) 060NE2L Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 C 40 V GS=10 V, T C=100 C 32 V GS=4.5 V, T C=25 C 40 V GS=4.5 V, T C=100 C 28 V GS=4.5 V, T A=25 C, R thJA=60 K/W 12 Unit A Pulsed drain current2) I D,pulse T C=25 C 160 Avalanche current, single pulse3) I AS T C=25 C 20 Avalanche energy, single pulse E AS I D=20 A, R GS=25 W 16 mJ Gate source voltage V GS 20 V 1) J-STD20 and JESD22 See figure 3 for more detailed information 3) See figure 13 for more detailed information 2) Rev. 2.2 page 1 2013-02-12 BSZ060NE2LS Maximum ratings, at T j=25 C, unless otherwise specified Parameter P tot Operating and storage temperature Value Symbol Conditions T C=25 C 26 T A=25 C, R thJA=60 K/W 2.1 T j, T stg W -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter Unit C 55/150/56 Values Symbol Conditions Unit min. typ. max. - - 4.9 - - 60 Thermal characteristics Thermal resistance, junction - case R thJC Device on PCB R thJA 6 cm2 cooling area4) K/W Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 25 - - Gate threshold voltage V GS(th) V DS=V GS, I D=250 A 1.2 - 2 Zero gate voltage drain current I DSS V DS=25 V, V GS=0 V, T j=25 C - 0.1 1 V DS=25 V, V GS=0 V, T j=125 C - 10 100 V A Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=20 A - 6.5 8.1 mW V GS=10 V, I D=20 A - 5.0 6.0 0.25 0.5 1.0 W 34 67 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=30 A 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. Rev. 2.2 page 2 2013-02-12 BSZ060NE2LS Parameter Input capacitance Values Symbol Conditions C iss V GS=0 V, V DS=12 V, f =1 MHz Unit min. typ. max. - 670 890 - 290 390 Output capacitance C oss Reverse transfer capacitance Crss - 31 - Turn-on delay time t d(on) - 2.5 - Rise time tr - 2.2 - Turn-off delay time t d(off) - 11 - Fall time tf - 1.8 - Gate to source charge Q gs - 1.9 2.6 Gate charge at threshold Q g(th) - 1.1 1.4 Gate to drain charge Q gd - 1.1 1.7 Switching charge Q sw - 2.0 2.8 Gate charge total Qg - 4.4 5.9 Gate plateau voltage V plateau - 2.9 - Gate charge total Qg V DD=12 V, I D=30 A, V GS=0 to 10 V - 9.1 12 Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 4.5 V - 3.8 5.1 Output charge Q oss V DD=12 V, V GS=0 V - 5.8 7.7 - - 25 - - 100 V DD=12 V, V GS=10 V, I D=30 A, R G=1.6 W pF ns Gate Charge Characteristics5) V DD=12 V, I D=30 A, V GS=0 to 4.5 V nC V nC Reverse Diode Diode continuous forward current IS A T C=25 C Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=20 A, T j=25 C - 0.87 1 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/s - 5 - nC 5) See figure 16 for gate charge parameter definition Rev. 2.2 page 3 2013-02-12 BSZ060NE2LS 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C) parameter: V GS 30 45 40 25 35 30 ID [A] Ptot [W] 20 15 10 4.5 V 10 V 25 20 15 10 5 5 0 0 0 40 80 120 160 0 40 80 TC [C] 120 160 TC [C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 10 limited by on-state resistance 1 s 0.5 102 10 s 0.2 1 100 s 0.1 ZthJC [K/W] ID [A] 10 ms 1 ms 101 DC 0.05 0.02 0.01 0.1 single pulse 100 10-1 0.01 10-1 100 101 102 VDS [V] Rev. 2.2 0 0 0 0 0 0 1 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2013-02-12 BSZ060NE2LS 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 C R DS(on)=f(I D); T j=25 C parameter: V GS parameter: V GS 160 12 10 V 5V 4.5 V 140 4V 10 3.2 V 120 3.5 V 8 80 RDS(on) [mW] ID [A] 100 3.5 V 4V 4.5 V 5V 6 8V 7V 10 V 60 4 3.2 V 40 3V 2 2.8 V 20 0 0 0 1 2 3 0 10 20 VDS [V] 30 40 50 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 C parameter: T j 100 140 120 80 100 60 ID [A] gfs [S] 80 40 60 40 20 20 150 C 25 C 0 0 0 1 2 3 4 5 VGS [V] Rev. 2.2 0 40 80 120 160 ID [A] page 5 2013-02-12 BSZ060NE2LS 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=30 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=250 A 10 2.5 8 2 6 1.5 VGS(th) [V] RDS(on) [mW] 9 Drain-source on-state resistance typ 4 2 1 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [C] 60 100 140 180 Tj [C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 100 10000 Ciss 1000 C [pF] 150 C 102 IF [A] Coss 25 C 10 100 Crss 101 1 10 0 5 10 15 20 25 VDS [V] Rev. 2.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD [V] page 6 2013-02-12 BSZ060NE2LS 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=30 A pulsed parameter: T j(start) parameter: V DD 100 12 12 V 10 5V 20 V 8 VGS [V] IAV [A] 25 C 100 C 10 6 125 C 4 2 1 0 1 10 100 1000 0 2 tAV [s] 4 6 8 10 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 28 V GS 27 Qg 26 VBR(DSS) [V] 25 24 V gs(th) 23 22 Q g(th) 21 Q sw Q gs 20 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [C] Rev. 2.2 page 7 2013-02-12 BSZ060NE2LS Package Outline Rev. 2.2 PG-TSDSON-8 (fused leads) page 8 2013-02-12 BSZ060NE2LS Published by Infineon Technologies AG 81726 Munich, Germany (c) 2010 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.2 page 9 2013-02-12