PS9402-E3-AX - RENESAS TECHNOLOGY

R08DS0014EJ0100 Rev.1.00 Page 1 of 22

Jun 22, 2012

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Preliminary Data Sheet

PS9402

2.5 A OUTPUT CURRENT, HIGH CMR, IGBT, POWER MOS FET GATE DRIVE, 16-PIN SSOP PHOTOCOUPLER

DESCRIPTION

The PS9402 is an optically coupled iso lator co n taining a GaAlA s LED on the inpu t side and a pho to diode, a signal

processing circuit and a power output transistor on the output side on one chip.

The PS9402 is designed specifically for high common mode transient immunity (CMR), high output current and high

switching speed.

The PS9402 includes desaturation detection and active miller clamping functions.

The PS9402 is suitable for driving IGBTs and Power MOS FETs.

The PS9402 is in a 16-pin plastic SSOP (Shrink Small O utline Package). And the PS9402 is able to high-density

(surface) mounting.

FEATURES

• Long creepage distance (8 mm MIN.)

• Large peak output current (2.5 A MAX., 2.0 A MIN.)

• High speed switching (tPLH, tPHL = 200 ns MAX.)

• UVLO (Under Voltage Lock Out) protecti on with hy st eresis

• Desaturation detection

• Miller clamping

• High common mode transient immunity (|CMH|, |CML| = 25 kV/

μ

s MIN.)

• Embossed tape product: PS9402-E3: 850 pcs/reel

• Pb-Free product

• Safety standards

• UL approved: No. E72422

• CSA approved: No. CA 101391 (

CA5A, CAN/CSA-C2 2.2 60065, 609 50

)

• DIN EN60747- 5-2 (VDE08 84 Part 2) approve d:

No. 40024069

(Option)

APPLICATIONS

• IGBT, Power MOS FET Gate Driver

• Industrial inverter

• Uninterruptible Power Supply (UPS)

R08DS0014EJ0100

Rev.1.00

Jun 22, 2012

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

PIN CONNECTION

(Top View)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 2 of 22

Jun 22, 2012

PACKAGE DIMENSIONS (UNIT: mm)

0.2±0.15

10.36±0.4

0.64 MIN.

7.49

+0.5

–0.1

3.5±0.2

0.71±0.3

10.31±0.5

1.27

0.46

±0.1

0.25 M

PHOTOCOUPLER CONSTRUCTION

Parameter Unit (MIN.)

Air Distance 8 mm

Outer Creepage Distance 8 mm

Isolation Distance 0.4 mm

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 3 of 22

Jun 22, 2012

BLOCK DIAGRAM (UNIT: mm)

UVLO

DESAT

SHIELD

CLAMP

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

IF UVLO (VCC2 − VEE) DESAT

(Pin 14: DESAT pin

input)

FAULT

(Pin 3: FAULT pin

output)

VO

OFF Not Active ( > VUVLO+) Not active High Low

ON Not Active ( > VUVLO+) Low ( < VDESATth) High High

ON Not Active ( > VUVLO+) High ( > VDESATth) Low (FAULT) Low

ON Active ( < VUVLO–) Not Active High Low

OFF Active ( < VUVLO–) Not Active High Low

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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 4 of 22

Jun 22, 2012

MARKING EXAMPLE

9402

R

NT231

No. 1 pin

Mark Type Number

Assembly Lot

Year Assembled

(Last 1 Digit)

231

T

N

Rank Code

In-house Code

(T: Pb-Free)

Week Assembled

Company Initial

ORDERING INFORMATION

Part Number Order Number Solder Plating

Specification Packing Style Safet y Standard

Approval Application

Part Number*1

PS9402 PS9402-AX Pb-Free 10 pcs (Tape 10 pcs cut) Standard products PS9402

PS9402-E3 PS9402-E3-AX (Ni/Pd/Au) Embossed Tape 850 (UL and CSA

pcs/reel Approved)

PS9402-V PS940 2-V-AX 10 pcs (Tape 10 pcs cut) DIN EN60747-5-2

PS9402-V-E3 PS9402-V-E3-AX Embossed Tape 850 (VDE0884 Part2)

pcs/reel Approved

(Option)

Note: *1. For the application of the Safety Standard, following part number should be used.

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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 5 of 22

Jun 22, 2012

ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified)

Parameter Symbol Ratings Unit

Forward Current *1 I

F 25 mA

Peak Transient Forward Current

( Pulse Width < 1

μ

s) IF (TRAN) 1.0 A

Reverse Voltage VR 5 V

Input Supply Voltage VCC1 0 to 5.5 V

Input IC Power Dissipation *2 P

I 80 mW

High Level Peak Output Current *3 I

OH (PEAK) 2.5 A

Low Level Peak Output Current *3 I

OL (PEAK) 2.5 A

FAULT Output Current IFAULT 8 mA

FAULT Pin Voltage VFAULT 0 to VCC1 V

Total Output Supply Voltag e (VCC2 − VEE) 0 to 33 V

Negative Output Supply Volta ge (VE − VEE) 0 to 15 V

Output Voltage VO 0 to VCC2 V

Peak Clamping Sinking Current IClamp 1.7 A

Miller Clamping Pin Voltage VClamp 0 to VCC2 V

DESAT Voltage VDESAT V

E to VE + 10 V

Output IC Power Dissipation *4 P

O 300 mW

Isolation Voltage *5 BV 5 000 Vr.m.s.

Operating Ambient Temperature TA −40 to +110 °C

Storage Temperature Tstg −55 to +125 °C

Notes: *1. Reduced to 0.52 mA/°C at TA = 85°C or more.

*2. Reduced to 1.6 mW/°C at TA = 75°C or more.

*3. Maximum pulse width = 10

μ

s, Maximum duty cycle = 0.2%

*4. Reduced to 5.5 mW/°C at TA = 70°C or more.

*5. AC voltage for 1 minute at TA = 25°C, RH = 60% between input and output.

Pins 1-8 shorted together, 9-16 shorted together.

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol MIN. MAX. Unit

Total Output Supply Voltag e (VCC2 − VEE) 15 30 V

Negative Output Supply Volta ge (VE − VEE) 0 15 V

Positive Output Supply Voltage (VCC2 − VE) 15 30 − (VE − VEE)V

Forward Current (ON) IF (ON) 8 12 mA

Forward Voltage (OFF) VF (OFF) −2 0.8 V

Operating Ambient Temperature TA −40 110 °C

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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 6 of 22

Jun 22, 2012

ELECTRICAL CHARACTERISTICS (DC) (at RECOMMENDED OPERATING CONDITIONS,

VEE = VE = GND, unless otherwise specified)

Parameter Symbol Conditions MIN. TYP. *1 MAX. Unit

FAULT Logic Lo w Output

Voltage VFAULTL I

FAULT = 1.1 mA, VCC1 = 5.5 V 0.1 V

FAULT Logic High Output

Current IFAULTH VFAULT = 5.5 V, VCC1 = 5.5 V,

TA = 25°C 0.5

μ

A

High Level Outp u t Current IOH V

O = (VCC2 − 4 V) *2 −0.5 −1.5 A

V

O = (VCC2 − 15 V) *3 −2.0

Low Level Output Current IOL V

O = (VEE + 2.5 V) *2 0.5 1.5 A

V

O = (VEE + 15 V) *3 2.0

Low Level Output Current

During Fault Condition IOLF V

O – VEE = 14 V 90 140 230 mA

High Level Output Voltage VOH I

O = 100 mA *4 V

CC2 − 3.0 VCC2 − 1.3 V

I

O = −650

μ

A *4 V

CC2 − 2.5 VCC2 − 0.8

Low Level Output Voltage VOL I

O = 100 mA 0.15 0.5 V

Clamp Pin Threshold Voltage VtClamp 2.0 V

Clamp Low Level Sinking

Current ICL V

tClamp = VEE + 2.5 V 0.35 1.5 A

High Level Supply Cu rrent ICC2H I

O = 0 mA 2 3 mA

Low Level Supply Current ICC2L I

O = 0 mA 2 3 mA

Blanking Capacitor C harging

Current ICHG V

DESAT = 2 V −0.13 −0.24 −0.33 mA

Blanking Capacitor D isch arging

Current IDSCHG V

DESAT = 7 V 10 30 mA

DESAT Th r e sho l d VDESATth V

CC2 − VE > VUVLO−, VO < 5 V 6.0 6.9 7.5 V

UVL O Threshold VUVLO+ V

O > 5 V 11.0 12.6 13.5 V

V

UVLO− V

O < 5 V 9.8 11.3 12.3

UVLO Hysteresis UVLOHYS (VUVLO+) − (VUVLO−) 0.4 1.3 V

Threshold Input Current

(L → H) IFLH I

O = 0 mA, VO > 5 V 1.5 5 mA

Threshold Input Voltage

(H → L) VFHL I

O = 0 mA, VO < 5 V 0.8 V

Input Forward Voltage VF I

F = 10 mA, TA = 25°C 1.2 1.56 1.8 V

Input Reverse Current IR V

R = 3 V, TA = 25°C 10

μ

A

Input Capacitance CIN f = 1 MHz, VF = 0 V 30 pF

Notes: *1. Typical values at TA = 25°C.

*2. Maximum pulse width = 50

μ

s, Maximum duty cycle = 0.5%

*3. Maximum pulse width = 10

μ

s, Maximum duty cycle = 0.2%

*4. VOH is measured with the DC load current in this testing (Maximum pulse width = 1 ms, Maximum duty cycle =

20%).

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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 7 of 22

Jun 22, 2012

SWITCHING CHARACTERISTICS (AC) (at RECOMMENDED OPERATING

CONDITIONS, VEE = VE = GND, unless otherwise specified)

Parameter Symbol Conditions MIN. TYP. *1 MAX. Unit

Propagation Delay Time (L → H) tPLH R

g = 10 Ω, Cg = 10 nF, 50 90 200 ns

Propagation Delay Time (H → L) tPHL f = 10 kHz, 50 110 200 ns

Pulse Width Distortion (PWD) |tPHL−tPLH| Duty Cycle = 50% *2, 20 100 ns

Propagation Delay Time

(Difference Between Any Two

Products)

tPHL−tPLH IF = 10 mA,

VCC2 = 30 V −100 100 ns

Rise Time tr 50 ns

Fall Time tf 50 ns

Common Mode Transient

Immunity at High Level Output *3 CMH TA = 25°C, IF = 10 mA,

VCC2 = 30 V, VCM = 1.5 kV,

CDESAT = 100 pF,

RF = 2.1 kΩ, VCC1 = 5 V

25 kV/

μ

s

Common Mode Transient

Immunity at Low Level Output *4 CML TA = 25°C, VF = 0 V,

VCC2 = 30 V,

VCM = 1.5 kV, RF = 2.1 kΩ,

VCC1 = 5 V

−25 kV/

μ

s

DESAT Sense to 90% VO Delay tDESAT

(90%) CDESAT = 100 pF,

RF = 2.1 kΩ, 250 500 ns

DESAT Sense to 10% VO Delay tDESAT

(10%) Rg = 10 Ω, Cg = 10 nF

VCC2 = 30 V 1.5 2 3

μ

s

DESAT Sense to Low Level

FAULT Signal Delay tDESAT

(FAULT) 400 800 ns

DESAT Sense to DESAT Low

Propagation Delay tDESAT

(LOW) 250 ns

DESAT Input Mute *5 tDESAT

(MUTE) 5

μ

s

RESET to High Level FAULT VCC1 = 5.5 V 0.3 1.2 3.0

μ

s

Signal Delay tRESET

(FAULT) V

CC1 = 3.3 V 0.5 1.5 4.0

μ

s

Notes: *1. Typical values at TA = 25°C.

*2. This load condition is equivalent to the IGBT load at 1 200 V/150 A.

*3. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode

pulse, VCM, to assure that the output will remain in the high state (i.e., VO > 15 V or FAULT > 2 V). A 100 pF

and a 2.1 kΩ pull-up resistor is needed in fault detection mode.

*4. Common mode transient immunity in the low state is the maximum tolerable dVCM/dt of the common mode

pulse, VCM, to assure that the output will remain in a low state (i.e., VO < 1.0 V or FAULT < 0.8 V).

*5. During muting DESAT, even if LED (IF) input occurs, IGBT operates turn-off and Vo state is kept to low.

After unmuting this DESAT, when LED is turned on, Vo/FAULT becomes high state (with automatic reset).

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 8 of 22

Jun 22, 2012

TEST CIRCUIT 1

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

VFAULTL

IF

VOH

VCC2

IOH

VCC

2

VOL

VCC2

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

IFAULTH

IOL

VCC2

V

CC

1

I

F

2

V

CC

1

V

O

0.1 F

μ

V

O

IOIO

0.1 F

μ

0.1 F

μ

0.1 F

μ

Fig. 1 V

FAULTL

Test Circuit

Fig. 3 I

OH

Test Circuit

Fig. 5 V

OH

Test Circuit Fig. 6 V

OL

Test Circuit

Fig. 4 I

OL

Test Circuit

Fig. 2 I

FAULTH

Test Circuit

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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 9 of 22

Jun 22, 2012

TEST CIRCUIT 2

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

F

I

F

I

CL

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

F

I

CC2H

I

CC2L

I

CHG

2 V

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

DSCHG

7 V

2.5 V

V

DESAT

V

CC

2V

CC

2

V

CC

2V

CC

2

V

CC

2V

CC

2

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

Fig. 7 I

CC2H

Test Circuit

Fig. 9 I

CHG

Test Circuit

Fig. 11 I

CL

Test Circuit Fig. 12 V

DESAT

Test Circuit

Fig. 10 I

DSCHG

Test Circuit

Fig. 8 I

CC2L

Test Circuit



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PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 10 of 22

Jun 22, 2012

TEST CIRCUIT 3

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

F

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

F

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

F

10 Ω

10 nF

I

F

V

OUT

FAULT

V

DESET

90%

10%

50% 50%

50%

t

DESET (LOW)

t

DESET (MUTE)

t

DESET (10%)

t

DESET (90%)

t

RESET (FAULT)

t

DESET (FAULT)

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

I

F

2.1 kΩ

10 Ω

10 nF

100 pF

t

PHL

t

PLH

I

F

V

OUT

90%

50%

10%

t

r

t

f

V

CC

2

V

CC

2

V

CC

2

V

CC

2

VDESAT

−

+

VCC1 = 5 V

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

Fig. 13 V

UVLO

Test Circuit

Fig. 15 t

PLH/

t

PHL

Test Circuit Fig. 17 t

PLH

/t

PHL

Test Wave Forms

Fig. 18 t

DESAT

Test Wave Forms

Fig. 14 I

FLH

Test Circuit

Fig. 17 t

DESAT

Test Circuit

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 11 of 22

Jun 22, 2012

TEST CIRCUIT 4

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

10 Ω

10 nF

+−

SCOPE

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

10 Ω

10 nF

+−

SCOPE

2.1 kΩ

SCOPE

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

10 Ω

10 nF

−+

2.1 kΩ

SCOPE

V

S

V

CC

1

Fault

V

S

Cathode

Anode

Cathode

V

E

V

LED

Desat

V

CC

2

V

EE

V

O

V

clamp

V

EE

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

10 Ω

10 nF

−+

V

OH

V

OL

1 V

15 V

1 500 V

V

CM

0 V

V

O

(CM

H

: I

F

= 10 mA)

V

O

(CM

L

: I

F

= 0 mA)

t

r

t

f

90%

10%

GND

OPEN

0.8 V

2 V

1 500 V

V

CM

0 V

V

FAULT

(CM

H

: I

F

= 10 mA, DESAT)

V

FAULT

(CM

L

: I

F

= 0 mA, DESAT)

t

r

t

f

90%

10%

VCC2VCC2

VCC1

VCC2

100 pF

VCC1

VCC2

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

0.1 F

μ

Fig. 19 CMH Test Circuit (LED1 ON)

Fig. 21 CMH Test Circuit (LED2 ON)

Fig. 23 CMH, CML Test Wave Forms

(LED1 ON, OFF)

Fig. 24 CMH, CML Test Wave Forms

(LED2 ON, OFF)

Fig. 22 CML Test Circuit (LED2 OFF)

Fig. 20 CML Test Circuit (LED1 OFF)

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 12 of 22

Jun 22, 2012

TYPICAL CHARACTERISTICS (TA = 25°C, unless otherwise specified)

Ambient Temperature T

A

(°C)

Output IC Power Dissipation P

O

(mW)

OUTPUT IC POWER DISSIPATION

vs. AMBIENT TEMPERATURE

0

50

100

150

200

250

300

350

400

Ambient Temperature T

A

(°C)

Threshold Input Current I

FLH

(mA)

THRESHOLD INPUT CURRENT vs.

AMBIENT TEMPERATURE

5

4

3

2

1

0

V

CC

2 = 30 V,

V

EE

= GND,

V

O

> 5 V

−40 −200 20406080100

Forward Current I

F

(mA)

Output Voltage V

O

(V)

OUTPUT VOLTAGE vs.

FORWARD CURRENT

V

CC

= 30 V,

V

EE

= GND

102435

35

30

25

20

15

10

5

Ambient Temperature T

A

(°C)

Input IC Power Dissipation P

I

(mW)

INPUT IC POWER DISSIPATION

vs. AMBIENT TEMPERATURE

250 50 75 100 125

0

120

100

80

60

40

20

250 50 75 100 125

High Level Output Voltage – Output

Supply Voltage V

OH

– V

CC

2 (V)

High Level Output Current I

OH

(A)

HIGH LEVEL OUTPUT VOLTAGE – OUTPUT SUPPLY

VOLTAGE vs. HIGH LEVEL OUTPUT CURRENT

−2.5 −2.0 −1.5 −1.0 0.0−0.5

0.0

−5.0

−4.0

−3.0

−2.0

−1.0

V

CC

= 30 V,

V

EE

= GND,

I

F

= 10 mA

−40°C

T

A

= 110°C

25°C

Forward Voltage V

F

(V)

Forward Current I

F

(mA)

FORWARD CURRENT vs.

FORWARD VOLTAGE

1.0

0.01

0.1

1.0

10

100

1.2 1.4 1.6 1.8 2.0 2.2 2.4

T

A

= +100°C

+85°C

+50°C

+25°C

0°C

−40°C

Remark The graphs indicate nominal characteristics.

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 13 of 22

Jun 22, 2012

Output Supply Voltage VCC2 (V)

PROPAGATION DELAY TIME,

PULSE WIDTH DISTORTION

vs. OUTPUT SUPPLY VOLTAGE

Propagation Delay Time tPHL, tPLH (ns),

Pulse Width Distortion (PWD) tPHL – tPLH (ns)

Propagation Delay Time tPHL, tPLH (ns),

Pulse Width Distortion (PWD) tPHL – tPLH (ns)

15 20 25 30

VEE = GND, IF = 10 mA,

Rg = 10 Ω, Cg = 10 nF,

f = 10 kHz, Duty cycle = 50%

200

150

100

50

0

tPHL

PWD

tPLH

PROPAGATION DELAY TIME,

PULSE WIDTH DISTORTION

vs. LOAD CAPACITANCE

Load Capacitance Cg (nF)

01020

30 40 50

VCC2 = 30 V, VEE = GND,

IF = 10 mA, Rg = 10 Ω,

f = 10 kHz, Duty cycle = 50%

tPHL

tPLH

PWD

PROPAGATION DELAY TIME,

PULSE WIDTH DISTORTION

vs. LOAD RESISTANCE

VCC2 = 30 V, VEE = GND,

IF = 10 mA, Cg = 10 nF,

f = 10 kHz, Duty cycle = 50%

tPHL

PWD

tPLH

Load Resistance Rg (Ω)

Propagation Delay Time tPHL, tPLH (ns),

Pulse Width Distortion (PWD) tPHL – tPLH (ns)

Propagation Delay Time tPHL, tPLH (ns),

Pulse Width Distortion (PWD) tPHL – tPLH (ns)

PROPAGATION DELAY TIME,

PULSE WIDTH DISTORTION

vs. AMBIENT TEMPERATURE

Ambient Temperature TA (°C)

0−40 −20 20 40 60 80

VCC2 = 30 V, VEE = GND,

IF = 10 mA,

Rg = 10 Ω, Cg = 10 nF,

f = 10 kHz, Duty cycle = 50%

tPHL

tPLH

100

PWD

200

150

100

50

0

01020

30 40 50

200

150

100

50

0

200

150

100

50

0

Low Level Output Current IOL (A)

Low Level Output Voltage VOL (V)

LOW LEVEL OUTPUT VOLTAGE vs.

LOW LEVEL OUTPUT CURRENT

0.0

5.0

4.0

3.0

2.0

1.0

0 0.5 1.0 1.5 2.52.0

VCC = 30 V,

VEE = GND,

IF = 0 mA

−40°C

25°C

TA = 110°C

Forward Current IF (mA)

PROPAGATION DELAY TIME,

PULSE WIDTH DISTORTION

vs. FORWARD CURRENT

Propagation Delay Time tPHL, tPLH (ns),

Pulse Width Distortion (PWD) tPHL – tPLH (ns)

7101316

VCC2 = 30 V, VEE = GND,

Rg = 10 Ω, Cg = 10 nF,

f = 10 kHz, Duty cycle = 50%

200

150

100

50

0

tPHL

PWD

tPLH

Remark The graphs in dicate nominal characteristics.

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 14 of 22

Jun 22, 2012

Ambient Temperature TA (°C)

High Level Output Voltage – Output

Supply Voltage VOH – VCC2 (V)

HIGH LEVEL OUTPUT VOLTAGE –

OUTPUT SUPPLY VOLTAGE vs.

AMBIENT TEMPERATURE

−20 0 20 40 8060−40

0.0

−3.0

−2.5

−2.0

−1.5

−1.0

−0.5

100 −20 0 20 40 8060−40 100

VCC2 = 30 V, VEE = GND,

IF = 10 mA

Ambient Temperature TA (°C)

High Level Output Current IOH (A)

HIGH LEVEL OUTPUT CURRENT vs.

AMBIENT TEMPERATURE

Ambient Temperature TA (°C)

Low Level Output Voltage VOL (V)

LOW LEVEL OUTPUT VOLTAGE vs.

AMBIENT TEMPERATURE

0.5

0

0.1

0.2

0.3

0.4

VCC2 = 30 V, VEE = GND,

IF = 10 mA, IO = 100 mA

Ambient Temperature TA (°C)

Low Level Output Current IOL (A)

LOW LEVEL OUTPUT CURRENT vs.

AMBIENT TEMPERATURE

−20 0 20 40 8060−40 100

0

−1

−7

−6

−5

−4

−3

−2

VCC2 = 30 V, VEE = GND,

IF = 10 mA

−20 0 20 40 8060−40 100

5

0

1

2

3

4

VCC2 = 30 V, VEE = GND,

IF = 10 mA

–100 mA

IO = –650 A

VO = VCC2 −4 V VO = VEE +15 V

VEE +2.5 V

VCC2 −15 V

μ

Ambient Temperature TA (°C)

HIGH LEVEL SUPPLY CURRENT,

LOW LEVEL SUPPLY CURRENT vs.

AMBIENT TEMPERATURE

High Level Supply Current ICCH (mA),

Low Level Supply Current ICCL (mA)

−20 0 20 40 8060−40

3.0

2.5

2.0

1.5

1.0

0.5 100

VCC2 = 30 V,

VEE = GND,

VO = OPEN

ICC2H

(IF = 10 mA)

ICC2L

(IF = 0 mA)

Output Supply Voltage VCC2 (V)

HIGH LEVEL SUPPLY CURRENT,

LOW LEVEL SUPPLY CURRENT vs.

OUTPUT SUPPLY VOLTAGE

High Level Supply Current ICCH (mA),

Low Level Supply Current ICCL (mA)

15 20 3025

VEE = GND,

VO = OPEN

ICC2H

(IF = 10 mA)

ICC2L

(IF = 0 mA)

3.0

2.5

2.0

1.5

1.0

0.5

Remark The graphs in dicate nominal characteristics.

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 15 of 22

Jun 22, 2012

Ambient Temperature T

A

(°C)

Blanking Capacitor Discharging Current I

DSCHG

(mA)

BLANKING CAPACITOR DISCHARGING

CURRENT vs. AMBIENT TEMPERATURE

−20 0 20 40 8060−40 100

60

20

30

40

50

V

CC

2 = 30 V, V

EE

= V

E

= GND,

I

F

= 0 mA, V

DESAT

= 7 V

Ambient Temperature T

A

(°C)

DESAT Threshold V

DESATth

(V)

DESAT THRESHOLD vs.

AMBIENT TEMPERATURE

−20 0 20 40 8060−40 100

7.5

6.0

6.3

6.9

6.6

7.2

V

EE

= V

E

= GND,

V

CC

2 > V

UVLO−

, V

O

< 5 V,

I

F

= 10 mA

Ambient Temperature T

A

(°C)

DESAT Sense to 90% V

O

Delay t

DESAT (90%)

(ns)

−20 0 20 40 8060−40 100

500

0

100

300

200

400

DESAT SENSE TO 90% VO DELAY vs.

AMBIENT TEMPERATURE

V

EE

= V

E

= GND, R

g

= 10 Ω,

C

g

= 10 nF, R

F

= 2.1 kΩ,

C

DESAT

= 100 pF, V

CC

1 = 5 V

V

CC

2 = 30 V

15 V

Ambient Temperature T

A

(°C)

DESAT Sense to 10% V

O

Delay t

DESAT (10%)

( s)

−20 0 20 40 8060−40 100

3.0

0.0

1.0

0.5

2.0

1.5

2.5

DESAT SENSE TO 10% VO DELAY vs.

AMBIENT TEMPERATURE

V

CC

1 = 5 V, V

EE

= V

E

= GND, R

g

= 10 Ω,

C

g

= 10 nF, R

F

= 2.1 kΩ, C

DESAT

= 100 pF

V

CC

2 = 30 V

15 V

μ

Ambient Temperature T

A

(°C)

Clamp Low Level Sinking Current I

CL

(A)

CLAMP LOW LEVEL SINKING CURRENT

vs. AMBIENT TEMPERATURE

−20 0 20 40 8060−40 100

4

0

1

2

3

V

CC

2 = 30 V,

V

EE

= V

E

= GND,

V

t

Clamp = 2.5 V

Ambient Temperature T

A

(°C)

Blanking Capacitor Charging Current I

CHG

(mA)

BLANKING CAPACITOR CHARGING

CURRENT vs. AMBIENT TEMPERATURE

−20 0 20 40 8060−40 100

−0.10

−0.35

−0.30

−0.20

−0.25

−0.15

V

CC

2 = 30 V, V

EE

= V

E

= GND,

I

F

= 10 mA, V

DESAT

= 2 V

Remark The graphs in dicate nominal characteristics.

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 16 of 22

Jun 22, 2012

I

F

= 10 mA, V

EE

= GND

OUTPUT VOLTAGE vs. SUPPLY VOLTAGE

Supply Voltage V

CC

2 – V

EE

(V)

Output Voltage V

O

(V)

0 5 10 15 20

14

12

10

8

6

4

2

0

UVLO

HYS

V

UVLO+

V

UVLO−

(12.6 V)

(11.3 V)

Load Resistance R

g

(Ω)

Power Consumption Per Cycle E

SW

( J)

20 4030010 50

8

7

0

1

3

2

5

4

6

POWER CONSUMPTION PER CYCLE vs.

LOAD RESISTANCE

Q

g

= 1 000 nC

Q

g

= 100 nC

Q

g

= 500 nC

μ

Load Resistance R

g

(Ω)

DESAT Sense to 10% V

O

Delay t

DESAT (10%)

( s)

20 403010 50

3.0

0.0

1.0

0.5

2.0

1.5

2.5

DESAT SENSE TO 10% V

O

DELAY vs.

LOAD RESISTANCE

V

CC

1 = 5 V, V

EE

= V

E

= GND, C

g

= 10 nF,

R

F

= 2.1 kΩ, C

DESAT

= 100 pF

V

CC

2 = 30 V

15 V

Load Capacitance C

g

(nF)

DESAT Sense to 10% V

O

Delay t

DESAT (10%)

( s)

20 403010 50

12.0

0.0

6.0

3.0

9.0

DESAT SENSE TO 10% V

O

DELAY vs.

LOAD CAPACITANCE

V

CC

1 = 5 V, V

EE

= V

E

= GND,

R

F

= 2.1 kΩ, R

g

= 10 Ω,

C

DESAT

= 100 pF

V

CC

2 = 30 V

15 V

0

μ

Remark The graphs in dicate nominal characteristics.

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 17 of 22

Jun 22, 2012

TAPING SPECIFICATIONS (UNIT: mm)

Packing: 850 pcs/reel

2.0±0.5

R 1.0

13.0±0.2

φ

3.5

φ

21.0±0.8

φ

330±2.0

φ

100±1.0

φ

4.5

±0.1

3.8

±0.1

0.35

10.8

±0.1

4.0

±0.1

2.0

±0.1

11.5

±0.1

1.75

±0.1

φ

1.55

±0.1

24

±0.3

16

±0.1

10.9

±0.1

2.0±0.5

23.9 to 27.4

Outer edge of

flange

29.5±1.0

25.5±1.0

φ

1.5+0.1

–0

PS9402-E3

Tape Direction

Outline and Dimensions (Tape)

Outline and Dimensions (Reel)

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 18 of 22

Jun 22, 2012

RECOMMENDED MOUNT PAD DIMENSIONS (UNIT: mm)

Part Number

PS9402

Lead Bending A

lead bending type (Gull-wing)

for surface mount 9.85

B

1.27

C

0.96

D

1.65

D

CB

A

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 19 of 22

Jun 22, 2012

NOTES ON HANDLING

1. Recommended soldering conditions

(1) Infrared reflow soldering

• Peak reflow temperature 260°C or below (package surface temperature)

• Ti me of peak reflow temp erature 10 seconds or less

• Time of temperature higher than 220°C 60 seconds or less

• Time to preheat temperature from 120 to 180°C 120±30 s

• Number of reflows Three

• Flux Rosin flux containing small amount of chlorine (The flux

with a maximum chlorine content of 0.2 Wt% is

recommended.)

120±30 s

(preheating)

220°C

180°C

Package Surface Temperature T (°C)

Time (s)

Recommended Temperature Profile of Infrared Reflow

(heating)

to 10 s

to 60 s

260°C MAX.

120°C

(2) Wave soldering

• Temperature 260°C or below (molten solder temperature)

• Time 10 seconds or less

• Preheating conditions 120°C or below (package surface temperature)

• Number of times One (Allowed to be dipped in solder including plastic mold portion.)

• Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine

content of 0.2 Wt% is recommended.)

(3) Soldering by Soldering Iron

• Peak Temperature (lead part temperature) 350°C or below

• Time (each pins) 3 seconds or less

• Flux Rosin flux containing small amount of chlorine (The flux with a

maximum chlori ne co nt ent of 0.2 Wt% is recomm ended .)

(a) Soldering of leads should be made at the point 1.5 to 2.0 mm from the root of the lead

(4) Cautions

• Fluxes Avoid removing the residual flux with freon-based and chlorine-based cleaning solvent.

2. Cautions regarding noise

Be aware that when voltage is applied suddenly between the photocoupler’s input and output at startup, the output

transistor may enter the on state, even if the voltage is within the abso lute maximum ratings.

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 20 of 22

Jun 22, 2012

USAGE CAUTIONS

1. This product is weak for static electricity by designed with high-speed integrated circuit so protect against static

electricity when handling.

2. Board designing

(1) By-pass capacitor of more than 0.1

μ

F is used between VCC and GND near device. Also, ensure that the distance

between the leads of the photocoupler and capacitor is no more than 10 mm.

(2) When designing the printed wiring board, ensure that the pattern of the IGBT collectors/emitters is not too close

to the input block pattern of the photocoupler.

If the pattern is too close to the input block and coupling occurs, a sudden fluctuation in the voltage on the IGBT

output side might affect the photocoupler’s LED input, leading to malfunction or degradation of characteristics.

(If the pattern needs to be close to the input block, to prevent the LED from lighting during the off state due to

the abovementioned coup ling, design the input-side circuit so that the bias of the LED is reversed, within the

range of the recommended operating conditions, and be sure to thoroughly evaluate operation.)

3. Make sure the rise/fall time of the forward current is 0.5

μ

s or less.

4. In order to avoid malfunctions, make sure the rise/fall slope of th e VCC2 is 3 V/

μ

s or less.

5. Avoid storage at a high temperature and high humidity.

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 21 of 22

Jun 22, 2012

SPECIFICATION OF VDE MARKS LICENSE DOCUMENT

Parameter Symbol Spec. Unit

Climatic test class (IEC 60068-1/DIN EN 60068-1) 40/110/21

Dielectric strength

maximum operating isolati on voltage

Test voltage (partial dischar ge test, procedure a for type test and random test)

Upr = 1.6 × UIORM., Pd < 5 pC

UIORM

Upr

1 130

1 808

Vpeak

Test voltage (partial discharge test, procedure b for all devic es)

Upr = 1.875 × UIORM., Pd < 5 pC Upr 2 119 Vpeak

Highest permissible overvoltage UTR 8 000 Vpeak

Degree of pollution (DIN EN 60664-1 VDE0 110 Part 1) 2

Comparative tracking index (IEC 60112/DIN EN 60112 (VDE 0303 Part 11)) CTI 175

Material group (DIN EN 60664-1 VDE0110 Part 1) III a

Storage temperature range Tstg –55 to +125 °C

Operating temperature range TA –40 to +110 °C

Isolation resistance, minimum value

VIO = 500 V dc at TA = 25°C

VIO = 500 V dc at TA MAX. at least 100°C

Ris MIN.

1012

1011

Ω

Safety maximum ratings (maximum permissible in case of fault, see thermal

derating curve)

Package temperature

Current (input current IF, Psi = 0)

Power (output or total power dissipation)

Isolation resistance

VIO = 500 V dc at TA = Tsi

Tsi

Isi

Psi

Ris MIN.

175

400

700

109

°C

mA

mW

Ω

<R>

PS9402 Chapter Title

R08DS0014EJ0100 Rev.1.00 Page 22 of 22

Jun 22, 2012

Caution GaAs Products This product uses gallium arsenide (GaAs).

GaAs vapor and powder are hazardous to human health if inhaled or ingested, so please observe

the following points.

• Follow related laws and ordinances when disposing of the product. If there are no applicable laws

and/or ordinances, dispose of the product as recommended below.

1. Commission a disposal company able to (with a license to) collect, transport and dispose of

materials that contain arsenic and other such industrial waste materials.

2. Exclude the product from general industrial waste and household garbage, and ensure that the

product is controlled (as industrial waste subject to special control) up until final disposal.

• Do not burn, destroy, cut, crush, or chemically dissolve the product.

• Do not lick the product or in any way allow it to enter the mouth.

All trademarks and registered trademarks are t he property of their respective owners.

C - 1

Revision History PS9402 Data Sheet

Description

Rev. Date Page Summary

0.01 May 09, 2011 − First edition issued

1.00 Jun 22, 2012 Throughout Preliminary Data Sheet - > Data Sheet

Throughout Safety standards approved

p.3 Modification of BLOCK DIAGRAM

p.4 Modification of MARKING EXAMPLE

p.5 Modification of ABSOLUTE MAXIMUM RATINGS

p.6 Modification of ELECTRICAL CHARACTERISTICS (DC)

p.7 Modification of SWITCHING CHARACTERISTICS (AC)

pp.8 to 11 Modification of TEST CIRCUIT

pp.12 to 16 Addition of TYPICAL CHARACTERISTICS

p.18 Addition of RECOMMENDED MOUNT PAD DIMENSIONS

p.20 Modification of USAGE CAUTIONS

p.21 Addition of SPECIFICATION OF VDE MARKS LICENSE DOCUMENT

Notice

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the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the

use of these circuits, software, or information.

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ri

ca

In

c

.

2880 Scott Boulevard Santa Clara

,

CA 95050-2554

,

U.S.A

.

Tel: +1-408-588-6000, Fax: +1-408-588-6130

Renesas Electronics Canada Limited

1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada

Tel: +1-905-898-5441, Fax: +1-905-898-3220

Renesas Electronics Europe Limited

Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K

Tel: +44-1628-585-100, Fax: +44-1628-585-900

Renesas Electronics Europe GmbH

Arcadiastrasse 10, 40472 Düsseldorf, Germany

Tel: +49-211-65030, Fax: +49-211-6503-1327

Renesas Electronics (China) Co., Ltd.

7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China

Tel: +86-10-8235-1155, Fax: +86-10-8235-7679

Renesas Electronics (Shanghai) Co., Ltd.

Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China

Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898

Renesas Electronics Hong Kong Limited

Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong

Tel: +852-2886-9318, Fax: +852 2886-9022/9044

Renesas Electronics Taiwan Co., Ltd.

13F, No. 363, Fu Shing North Road, Taipei, Taiwan

Tel: +886-2-8175-9600, Fax: +886 2-8175-9670

Renesas Electronics Singapore Pte. Ltd.

1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632

Tel: +65-6213-0200, Fax: +65-6278-8001

Renesas Electronics Mala

y

sia Sdn.Bhd.

Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petalin

g

Jaya, Selan

g

or Darul Ehsan, Malaysi

a

Tel: +60-3-7955-9390

,

Fax: +60-3-7955-951

0

Renesas Electronics Korea Co.

,

Ltd

.

11F., Samik Lavied' or Bld

g

., 720-2 Yeoksam-Don

g

, Kan

g

nam-Ku, Seoul 135-080, Korea

Tel: +82-2-558-3737

,

Fax: +82-2-558-514

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©

2012 Renesas Electronics Corporation. All ri

g

hts reserved

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