Ultralow Noise XFET Voltage References
with Current Sink and Source Capability
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N Document Feedback
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FEATURES
Low noise (0.1 Hz to 10.0 Hz): 3.5 µV p-p at 2.500 V output
No external capacitor required
Low temperature coefficient
A grade: 10 ppm/°C maximum
B grade: 3 ppm/°C maximum
Load regulation: 15 ppm/mA
Line regulation: 20 ppm/V
Wide operating range
ADR430: 4.1 V to 18 V
ADR431: 4.5 V to 18 V
ADR433: 5.0 V to 18 V
ADR434: 6.1 V to 18 V
ADR435: 7.0 V to 18 V
High output source and sink current: 30 mA and −20 mA
Wide temperature range: −40°C to +125°C
APPLICATIONS
Precision data acquisition systems
High resolution data converters
Medical instruments
Industrial process control systems
Optical control circuits
Precision instruments
PIN CONFIGURATIONS
NOTES
1. NI C = NOT INT E RNALLY CO NNE CTED.
THI S P IN I S NOT CONNECT E D INT E RNALLY.
2. DNC = DO NO T CO NNE CT. DO NO T CO NNE CT TO THIS PIN.
ADR430/ADR431
ADR433/ADR434
ADR435
04500-001
1
2
3
4
VIN
NIC
GND
DNC 8
7
6
5
COMP
VOUT
TRIM
DNC
(No t t o Scal e)
TOP VIEW
Figure 1. 8-Lead MSOP (RM-8)
ADR430/ADR431
ADR433/ADR434
ADR435
TOP VIEW
(No t t o Scal e)
DNC 1
VIN VOUT
2
NIC 3
GND 4
DNC
COMP
TRIM
8
7
6
5
04500-041
NOTES
1. NI C = NOT INT E RNALLY CO NNE CTED.
THI S P IN I S NOT CONNECT E D INT E RNALLY.
2. DNC = DO NO T CO NNE CT. DO NO T CO NNE CT TO THIS PIN.
Figure 2. 8-Lead SOIC_N (R-8)
GENERAL DESCRIPTION
The ADR430/ADR431/ADR433/ADR434/ADR4351 series is a
family of XFET® voltage references featuring low noise, high
accuracy, and low temperature drift performance. Using Analog
Devices, Inc., temperature drift curvature correction and extra
implanted junction FET (XFET) technology, voltage change vs.
temperature nonlinearity in the ADR430/ADR431/ADR433/
ADR434/ADR435 is minimized.
The XFET references operate at lower current (800 µA) and
lower supply voltage headroom (2 V) than buried Zener
references. Buried Zener references require more than 5 V of
headroom for operation. The ADR430/ADR431/ADR433/
ADR434/ADR435 XFET references are low noise solutions for
5 V systems.
The ADR430/ADR431/ADR433/ADR434/ADR435 family has
the capability to source up to 30 mA of output current and sink
up to −20 mA. It also comes with a trim terminal to adjust the
output voltage over a ±0.5% range without compromising
performance.
1 Protected by U.S. Patent Number 5,838,192.
The ADR430/ADR431/ADR433/ADR434/ADR435 are
available in 8-lead MSOP and 8-lead narrow SOIC packages. All
versions are specified over the extended industrial temperature
range of −40°C to +125°C.
Table 1. Selection Guide
Model
Output
Voltage (V)
Initial Accuracy
(mV)
Temperature
Coefficient
(ppm/°C)
ADR430A 2.048 ±3 10
ADR430B 2.048 ±1 3
ADR431A 2.500 ±3 10
ADR431B 2.500 ±1 3
ADR433A
3.000
±4
10
ADR433B 3.000 ±1.5 3
ADR434A 4.096 ±5 10
ADR434B 4.096 ±1.5 3
ADR435A 5.000 ±6 10
ADR435B 5.000 ±2 3
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 2 of 23
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 4
ADR430 Electrical Characteristics ............................................. 4
ADR431 Electrical Characteristics ............................................. 5
ADR433 Electrical Characteristics ............................................. 6
ADR434 Electrical Characteristics ............................................. 7
ADR435 Electrical Characteristics ............................................. 8
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 11
Theory of Operation ...................................................................... 16
Basic Voltage Reference Connections ...................................... 16
Noise Performance ..................................................................... 16
High Frequency Noise ............................................................... 16
Turn-On Settling Time .............................................................. 17
Applications Information .............................................................. 18
Output Adjustment .................................................................... 18
Reference for Converters in Optical Network Control
Circuits ......................................................................................... 18
High Voltage Floating Current Source .................................... 18
Kelvin Connection ..................................................................... 18
Dual Polarity References ........................................................... 19
Programmable Current Source ................................................ 19
Programmable DAC Reference Voltage .................................. 20
Precision Voltage Reference for Data Converters .................. 20
Precision Boosted Output Regulator ....................................... 21
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 23
REVISION HISTORY
2/2018—Rev. M to Rev. N
Changed VO to VOUT and ADR43x to ADR430/ADR431/
ADR433/ADR434/ADR435 ......................................... Throughout
Changes to Figure 1, Figure 2, and General Description
Section ................................................................................................ 1
Changes to Output Current Capacity Parameter and Trim
Range Parameter, Table 2 ................................................................. 4
Changes to Output Current Capacity Parameter and Trim
Range Parameter, Table 3 ................................................................. 5
Changes to Output Current Capacity Parameter and Trim
Range Parameter, Table 4 ................................................................. 6
Changes to Output Current Capacity Parameter and Trim
Range Parameter, Table 5 ................................................................. 7
Changes to Output Current Capacity Parameter and Trim
Range Parameter, Table 6 ................................................................. 8
Added Pin Configuration and Function Descriptions Section,
Figure 3, Figure 4, and Table 9; Renumbered Sequentially ....... 10
Changes to Figure 14 and Figure 16 ............................................. 12
Changes to Figure 19 Caption and Figure 21 Caption .............. 13
Changes to Theory of Operation Section, Figure 32, Noise
Performance Section, and High Frequency Noise Section ....... 16
Changes to Figure 33 Caption, Figure 34, and Turn-On Settling
Time Section.................................................................................... 17
Changes to Reference for Converters in Optical Network
Control Circuits Section and Programmable Current Source
Section .............................................................................................. 19
Changes to Table 10 and Precision Boosted Output Regulator
Section .............................................................................................. 20
Changes to Precision Boosted Output Regulator Section......... 21
6/2015—Rev. L to Rev. M
Changes to Ordering Guide .......................................................... 22
7/2014—Rev. K to Rev. L
Changes to Default Conditions, Typical Performance
Characteristics Section .................................................................. 10
Changes to Ordering Guide .......................................................... 22
5/2014—Rev. J to Re v. K
Deleted ADR439 (Throughout) ...................................................... 1
Changes to Features Section and Table 1 ....................................... 1
Deleted Table 7; Renumbered Sequentially ................................... 9
Changes to Ordering Guide .......................................................... 22
7/2011—Rev. I to Re v. J
Changes to Figure 1 and Figure 2 .................................................... 1
Changes to Ordering Guide .......................................................... 23
5/2011—Rev. H to Rev. I
Added Endnote 1 in Table 2 ............................................................. 4
Added Endnote 1 in Table 3 ............................................................. 5
Added Endnote 1 in Table 4 ............................................................. 6
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 3 of 23
Added Endnote 1 in Table 5 ............................................................. 7
Added Endnote 1 in Table 6 ............................................................. 8
Added Endnote 1 in Table 7 ............................................................. 9
Deleted Negative Precision Reference Without Precision
Resistors Section .............................................................................. 17
Deleted Figure 36; Renumbered Sequentially ............................. 18
2/2011—Rev. G to Rev. H
Updated Outline Dimensions ........................................................ 21
Changes to Ordering Guide ........................................................... 22
7/2010—Rev. F to Rev. G
Changes to Storage Temperature Range in Table 9....................... 9
6/2010—Rev. E to Rev. F
Updated Pin Name NC to COMP Throughout ............................ 1
Changes to Figure 1 and Figure 2 .................................................... 1
Changes to Figure 30 and High Frequency Noise Section ........ 15
Updated Outline Dimensions ........................................................ 21
Changes to Ordering Guide ........................................................... 22
1/2009—Rev. D to Re v. E
Added High Frequency Noise Section and Equation 3;
Renumbered Sequentially .............................................................. 15
Inserted Figure 31, Figure 32, and Figure 33; Renumbered
Sequentially ...................................................................................... 16
Changes to the Ordering Guide .................................................... 22
12/2007—Rev. C to Rev. D
Changes to Initial Accuracy and Ripple Rejection Ratio
Parameters in Table 2 through Table 7 ........................................... 3
Changes to Table 9 ............................................................................ 9
Changes to Theory of Operation Section .................................... 15
Updated Outline Dimensions ........................................................ 20
8/2006—Rev. B to Rev. C
Updated Format ................................................................. Universal
Changes to Table 1 ............................................................................ 1
Changes to Table 3 ............................................................................ 4
Changes to Table 4 ............................................................................ 5
Changes to Table 7 ............................................................................ 8
Changes to Figure 26 ...................................................................... 14
Changes to Figure 31 ...................................................................... 16
Updated Outline Dimensions ........................................................ 20
Changes to Ordering Guide ........................................................... 21
9/2004—Rev. A to Rev. B
Added New Grade .............................................................. Universal
Changes to Specifications ................................................................ 3
Replaced Figure 3, Figure 4, Figure 5 ........................................... 10
Updated Ordering Guide ............................................................... 21
6/2004—Rev. 0 to Re v. A
Changes to Format ............................................................. Universal
Changes to the Ordering Guide .................................................... 20
12/2003—Revision 0: Initial Version
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 4 of 23
SPECIFICATIONS
ADR430 ELECTRICAL CHARACTERISTICS
VIN = 4.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT
A Grade 2.045 2.048 2.051 V
B Grade 2.047 2.048 2.049 V
INITIAL ACCURACY1 VOERR
A Grade ±3 mV
±0.15 %
B Grade ±1 mV
±0.05 %
TEMPERATURE COEFFICIENT TCVOUT
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VOUT/∆VIN VIN = 4.1 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VOUT/∆IL IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
OUTPUT CURRENT CAPACITY IL
Sourcing 30 mA
Sinking −20 mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 560 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.5 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 60 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VOUT 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS
V
OUT_HYS
20
ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz –70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE
V
IN
4.1
18
V
SUPPLY VOLTAGE HEADROOM VIN − VOUT 2 V
TRIM RANGE −5 +5 %
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 5 of 23
ADR431 ELECTRICAL CHARACTERISTICS
VIN = 4.5 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT
A Grade 2.497 2.500 2.503 V
B Grade 2.499 2.500 2.501 V
INITIAL ACCURACY1 VOERR
A Grade ±3 mV
±0.12 %
B Grade ±1 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVOUT
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VOUT/∆VIN VIN = 4.5 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VOUT/∆IL IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
OUTPUT CURRENT CAPACITY IL
Sourcing 30 mA
Sinking −20 mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 580 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.5 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 80 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VOUT 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VOUT_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE
VIN 4.5 18 V
SUPPLY VOLTAGE HEADROOM VIN − VOUT 2 V
TRIM RANGE −5 +5 %
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 6 of 23
ADR433 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT
A Grade 2.996 3.000 3.004 V
B Grade 2.9985 3.000 3.0015 V
INITIAL ACCURACY1 VOERR
A Grade ±4 mV
±0.13 %
B Grade ±1.5 mV
±0.05 %
TEMPERATURE COEFFICIENT TCVOUT
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VOUT/∆VIN VIN = 5 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VOUT/∆IL IL = 0 mA to 10 mA, VIN = 6 V, −40°C < TA < +125°C 15 ppm/mA
IL = −10 mA to 0 mA, VIN = 6 V, −40°C < TA < +125°C 15 ppm/mA
OUTPUT CURRENT CAPACITY IL
Sourcing 30 mA
Sinking −20 mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 590 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.75 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 90 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VOUT 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VOUT_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE
VIN 5.0 18 V
SUPPLY VOLTAGE HEADROOM VIN − VOUT 2 V
TRIM RANGE −5 +5 %
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 7 of 23
ADR434 ELECTRICAL CHARACTERISTICS
VIN = 6.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 5.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT
A Grade 4.091 4.096 4.101 V
B Grade 4.0945 4.096 4.0975 V
INITIAL ACCURACY1 VOERR
A Grade ±5 mV
±0.12 %
B Grade ±1.5 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVOUT
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VOUT/∆VIN VIN = 6.1 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VOUT/∆IL IL = 0 mA to 10 mA, VIN = 7 V, −40°C < TA < +125°C 15 ppm/mA
IL = −10 mA to 0 mA, VIN = 7 V, −40°C < TA < +125°C 15 ppm/mA
OUTPUT CURRENT CAPACITY IL
Sourcing 30 mA
Sinking −20 mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 595 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 6.25 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 100 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VOUT 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VOUT_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE
VIN 6.1 18 V
SUPPLY VOLTAGE HEADROOM VIN − VOUT 2 V
TRIM RANGE −5 +5 %
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 8 of 23
ADR435 ELECTRICAL CHARACTERISTICS
VIN = 7.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 6.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT
A Grade 4.994 5.000 5.006 V
B Grade 4.998 5.000 5.002 V
INITIAL ACCURACY1 VOERR
A Grade ±6 mV
±0.12 %
B Grade ±2 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVOUT
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VOUT/∆VIN VIN = 7 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VOUT/∆IL IL = 0 mA to 10 mA, VIN = 8 V, −40°C < TA < +125°C 15 ppm/mA
IL = −10 mA to 0 mA, VIN = 8 V, −40°C < TA < +125°C 15 ppm/mA
OUTPUT CURRENT CAPACITY IL
Sourcing 30 mA
Sinking −20 mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 620 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10 Hz 8 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 115 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VOUT 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VOUT_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE OPERATING RANGE VIN 7.0 18 V
SUPPLY VOLTAGE HEADROOM VIN − VOUT 2 V
TRIM RANGE −5 +5 %
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 9 of 23
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 7.
Parameter Rating
Supply Voltage 20 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature, Soldering (60 sec) 300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 8. Thermal Resistance
Package Type θJA θJC Unit
8-Lead SOIC_N (R) 130 43 °C/W
8-Lead MSOP (RM) 142 44 °C/W
ESD CAUTION
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 10 of 23
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
04500-101
NOTES
1. NIC = NOT INT ERNA
L
LY CONNECTE D.
T HIS P IN IS NOT CONNECTED INT ERNALLY.
2
. DNC = DO NO T CO NNE
C
T. DO NOT CONNECT TO THI S PIN.
ADR430/ADR431
ADR433/ADR434
ADR435
1
2
3
4
V
IN
NIC
GND
DNC
8
7
6
5
COMP
V
OUT
TRIM
DNC
(Not to Scale)
TOP VIEW
Figure 3. 8-Lead MSOP Pin Configuration
A
DR430/ADR431
ADR433/ADR434
ADR435
TOP VIEW
(Not to S c ale)
DNC
1
V
IN
V
OUT
2
NIC
3
GND
4
DNC
COMP
TRIM
8
7
6
5
04500-141
NOTES
1. NIC = N OT INT ERNALLY CONNE C TED.
T HIS PI N IS NOT CO N NE CTE D INT ERNALLY.
2
. DN C = DO NOT CONNE
C
T. DO NO T CONNECT TO THIS PIN.
Figure 4. 8-Lead SOIC Pin Configuration
Table 9. Pin Function Descriptions
Pin No. Mnemonic Description
1 DNC Do Not Connect. Do not connect to this pin.
2 VIN Input Voltage Connection.
3 NIC Not Internally Connected. This pin is not connected internally.
4 GND Ground.
5 TRIM Output Voltage Trim.
6 VOUT Output Voltage.
7 COMP Compensation Input. Connect a series resistor and capacitor network from COMP to VOUT to reduce overall noise.
8 DNC Do Not Connect. Do not connect to this pin.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 11 of 23
TYPICAL PERFORMANCE CHARACTERISTICS
Default conditions: VIN = 7 V, TA = 25°C, CIN = COUT = 0.1 μF, unless otherwise noted.
2.4995
OUTPUT VOLTAGE (V)
2.5009
2.5007
2.5005
2.5003
2.5001
2.4999
2.4997
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-015
Figure 5. ADR431 Output Voltage vs. Temperature
OUTPUT VOLTAGE (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
4.0950
4.0980
4.0975
4.0970
4.0965
4.0960
4.0955
04500-016
Figure 6. ADR434 Output Voltage vs. Temperature
OUTPUT VOLTAGE (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
4.9990
5.0025
5.0020
5.0015
5.0010
5.0005
5.0000
4.9995
04500-017
Figure 7. ADR435 Output Voltage vs. Temperature
0.3
0.4
0.5
0.6
0.7
0.8
SUPPLY CURRENT ( mA)
8104 6 12 14 16
INPUT VOLTAGE (V)
+125°C
+25°C
–40°C
04500-018
Figure 8. ADR435 Supply Current vs. Input Voltage
400
450
500
550
600
650
700
SUPPLY CURRENT ( µ A)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-019
Figure 9. ADR435 Supply Current vs. Temperature
0.40
0.42
0.44
0.46
0.48
0.50
0.52
0.54
0.56
0.58
0.60
SUPPLY CURRENT ( mA)
10 126 8 14 16 18
INPUT VOLTAGE (V)
+125°C
+25°C
–40°C
04500-020
Figure 10. ADR431 Supply Current vs. Input Voltage
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 12 of 23
400
430
460
490
520
550
580
610
SUPPLY CURRENT ( µ A)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-021
Figure 11. ADR431 Supply Current vs. Temperature
0
3
6
9
12
15
LO AD RE GULATION (ppm/mA)
IL=0mA to 10mA
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-022
Figure 12. ADR431 Load Regulation vs. Temperature
0
3
6
9
12
15
LO AD RE GULATION (ppm/mA)
IL=0mA to 10mA
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-023
Figure 13. ADR435 Load Regulation vs. Temperature
0
0.5
1.0
1.5
2.0
2.5
SUPPLY VOLTAGE HE ADROO M ( V )
LOAD CURRENT ( mA)
–5–10 0 5 10
–40°C
+25°C
+125°C
04500-024
Figure 14. ADR431 Supply Voltage Headroom vs. Load Current over
Temperature
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
MINIMUM HEADROOM (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
NO LOAD
04500-025
Figure 15. ADR431 Minimum Headroom vs. Temperature
0
0.5
1.0
1.5
2.0
2.5
SUPPLY VOLTAGE HE ADROO M ( V )
LOAD CURRENT ( mA)
–5–10 0 5 10
–40°C
+25°C
+125°C
04500-026
Figure 16. ADR435 Supply Voltage Headroom vs. Load Current over
Temperature
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 13 of 23
0.9
1.1
1.3
1.5
1.7
1.9
MINIMUM HEADROOM (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
NO LOAD
04500-027
Figure 17. ADR435 Minimum Headroom vs. Temperature
–4
0
4
8
12
16
20
LI NE RE GULATION (ppm/V)
VIN =7V TO 18V
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-028
Figure 18. ADR435 Line Regulation vs. Temperature
CIN = 0. 01µ F
NO LOAD VOUT = 1V /DI V
VIN = 2V/DI V
TIME = 4µs/DIV
04500-030
Figure 19. ADR431 Turn-On Settling Time Response, No Load
VOUT = 1V/ DIV
VIN = 2V/DI V
TIME = 4µs/DIV
04500-031
CL = 0.01µ F
NO I NP UT CAPACIT OR
Figure 20. ADR431 Turn-On Response Settling Time, 0.01 µF Load Capacitor
CIN = 0. 01µ F
NO LOAD
VIN = 2V/DI V TIME = 4µs/DIV
04500-032
VOUT = 1V/ DIV
Figure 21. ADR431 Turn-Off Settling Time Response
BYPASS CAP ACIT OR = 0µ F
TI ME = 100µs/DIV
LINE
INTERRUPTION
VIN = 500mV/DI V
04500-033
VOUT = 50mV/ DIV
Figure 22. ADR431 Line Transient Response
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 14 of 23
BYPASS CAP ACIT OR = 0.1µF
VOUT = 50mV/ DIV
TI ME = 100µs/DIV
LINE
INTERRUPTION
VIN = 500mV/DI V
04500-034
Figure 23. ADR431 Line Transient Response, 0.1 µF Bypass Capacitor
1µV/DIV
TIME = 1s/DIV
04500-035
Figure 24. ADR431 0.1 Hz to 10.0 Hz Voltage Noise
TIME = 1s/DIV
50µV/DIV
04500-036
Figure 25. ADR431 10 Hz to 10 kHz Voltage Noise
TIME = 1s/DIV
2µV/DIV
04500-037
Figure 26. ADR435 0.1 Hz to 10.0 Hz Voltage Noise
TIME = 1s/DIV
50µV/DIV
04500-038
Figure 27. ADR435 10 Hz to 10 kHz Voltage Noise
0
2
4
6
8
10
12
14
NUMBER O F PARTS
DEVIATION (PPM)
–110 –90 –70 –50 –30 –10 10 30 50 70 90 110
04500-029
Figure 28. ADR431 Typical Hysteresis
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 15 of 23
0
5
10
15
20
25
30
35
40
45
50
OUTPUT IMP E DANCE ( Ω)
FREQUENCY (Hz)
100 10k
1k 100k
ADR435
ADR433
ADR430
04500-039
Figure 29. Output Impedance vs. Frequency
–150
–130
–110
–90
–70
–50
RIPP LE RE JE CTI ON (d B)
–30
–10
10
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
04500-040
Figure 30. Ripple Rejection vs. Frequency
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 16 of 23
THEORY OF OPERATION
The ADR430/ADR431/ADR433/ADR434/ADR435 series of
references uses a reference generation technique known as XFET.
This technique yields a reference with low supply current,
optimal thermal hysteresis, and exceptionally low noise. The
core of the XFET reference consists of two junction field effect
transistors (JFETs), one of which has an extra channel implant
to raise its pinch off voltage. The two JFETs run at the same
drain current, and the difference in pinch off voltage is
amplified to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about −120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be compensated closely by adding a correction term generated
in the same fashion as the proportional to absolute temperature
(PTAT) term used to compensate band gap references. The
primary advantage of an XFET reference is its correction term,
which is ~30 times lower and requires less correction than that of
a band gap reference. Because most of the noise of a band gap
reference comes from the temperature compensation circuitry,
the XFET results in much lower noise.
Figure 31 shows the basic topology of the ADR430/ADR431/
ADR433/ADR434/ADR435 series. The temperature correction
term is provided by a current source with a value designed to be
PTAT. The general equation is
VOUT = G (ΔVP – R1 × IPTAT) (1)
where:
G is the gain of the reciprocal of the divider ratio.
∆VP is the difference in pinch-off voltage between the two JFETs.
R1 is a resistor, as shown in Figure 31.
IPTAT is the positive temperature coefficient correction current.
The ADR430/ADR431/ADR433/ADR434/ADR435 devices are
created by on-chip adjustment of R2 and R3 to achieve 2.048 V to
5.000 V at the reference output.
**
IPTAT
I1I1
*EXTRA CHANNEL IM P LANT
VOUT = G(ΔVP
– R1 × I
PTAT)
R2
VIN
VOUT
GND
R3
R1
ΔV
P
ADR43x
04500-002
Figure 31. Simplified Schematic Device Power Dissipation Considerations
The ADR430/ADR431/ADR433/ADR434/ADR435 family of
references is guaranteed to deliver load currents up to 10 mA
with an input voltage that ranges from 4.1 V to 18 V.
When these devices are used in applications at higher currents,
use the following equation to account for the temperature
effects due to the power dissipation increases:
TJ = PD × θJA + TA (2)
where:
TJ and TA are the junction and ambient temperatures, respectively.
PD is the device power dissipation.
θJA is the device package junction to ambient thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor connected
from VOUT to ground. The circuit in Figure 32 shows the basic
configuration for the ADR430/ADR431/ADR433/ADR434/
ADR435 family of references. Other than a 0.1 µF capacitor at
the output to help improve noise suppression, a large output
capacitor at the output is not required for circuit stability.
+
1
2
3
4 5
8
6
7
TOP VIEW
(No t t o Scal e)
DNC
COMP
V
OUT
TRIM
DNC
NIC
GND
V
IN
10µF 0.1µF
0.1µF
04500-044
ADR430/ADR431
ADR433/ADR434
ADR435
NOTES
1. NI C = NOT INT E RNALLY CO NNE CTED.
THI S P IN I S NOT CONNECT E D INT E RNALLY.
2. DNC = DO NO T CO NNE CT. DO NO T CO NNE CT TO THIS PIN.
Figure 32. Basic Voltage Reference Configuration
NOISE PERFORMANCE
The noise generated by the ADR430, ADR431, and ADR433
family of references is typically less than or equal to 3.75 µV p-p
over the 0.1 Hz to 10.0 Hz band for. Figure 24 shows the 0.1 Hz
to 10.0 Hz noise of the ADR431, which is only 3.5 µV p-p. The
noise measurement is made with a band-pass filter composed of
a two-pole, high-pass filter with a corner frequency at 0.1 Hz
and a two-pole, low-pass filter with a corner frequency at 10.0 Hz.
HIGH FREQUENCY NOISE
The total noise generated by the ADR430/ADR431/ADR433/
ADR434/ADR435 family of references is composed of the
reference noise and the op amp noise. Figure 33 shows the
wideband noise from 10 Hz to 25 kHz. An internal node of the op
amp is available on Pin 7, and by overcompensating the op amp,
the overall noise can be reduced.
Consider that, in a closed-loop configuration, the effective
output impedance of an op amp is as follows:
β
VO
O
O
A
r
R+
=1
(3)
where:
RO is the apparent output impedance.
rO is the output resistance of the op amp.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 17 of 23
AVO is the open-loop gain at the frequency of interest.
β is the feedback factor.
Equation 3 shows that the apparent output impedance is
approximately reduced by the excess loop gain; therefore, as the
frequency increases, the excess loop gain decreases, and the
apparent output impedance increases. A passive element whose
impedance increases as its frequency increases is an inductor.
When a capacitor is added to the output of an op amp or a
reference, it forms a tuned circuit that resonates at a certain
frequency and results in gain peaking. Gain peaking can be
observed by using a model of an op amp with a single-pole
response and some pure resistance in series with the output.
Changing capacitive loads results in peaking at different
frequencies. For most normal op amp applications with low
capacitive loading (<100 pF), this effect is usually not observed.
However, references are used increasingly to drive the reference
input of an analog-to-digital (ADC) that may present a dynamic,
switching capacitive load. Large capacitors, in the microfarad range,
reduce the change in reference voltage to less than one-half LSB.
Figure 33 shows the ADR431 noise spectrum with various
capacitive values to 50 µF. With no capacitive load, the noise
spectrum is relatively flat at approximately 60 nV/√Hz to
70 nV/√Hz. With various values of capacitive loading, the
predicted noise peaking becomes evident.
10
100
1000
10 100 1k 10k 100k
ADR431
NO COMPENSATION
C
L
= 0µF
C
L
= 1µF
C
L
= 50µF
C
L
= 10µF
04500-042
FREQUENCY ( Hz )
NOISE DENSITY (nV/√Hz)
Figure 33. Noise Density vs. Frequency at Various Capacitive Loads
The op amp within the ADR430/ADR431/ADR433/ADR434/
ADR435 family uses the classic resistor and capacitor (RC)
compensation technique. Monolithic capacitors in an IC are
limited to tens of picofarads. With very large external capacitive
loads, such as 50 µF, it is necessary to overcompensate the op amp.
The internal compensation node is available on Pin 7, and an
external series RC network can be added between Pin 7 and the
output, Pin 6, as shown in Figure 34.
+
1
2
3
45
8
6
7
TOP VIEW
(No t t o Scal e)
DNC
COMP
V
OUT
TRIM
DNC
NIC
GND
V
IN
10µF 0.1µF
0.1µF
04500-003
82kΩ
10nF
ADR430/ADR431
ADR433/ADR434
ADR435
NOTES
1. NI C = NOT INT E RNALLY CO NNE CTED.
THI S P IN I S NOT CONNECT E D INT E RNALLY.
2. DNC = DO NO T CO NNE CT. DO NO T CO NNE CT TO THIS PIN.
Figure 34. Compensated Reference
The 82 kΩ resistor and 10 nF capacitor eliminate noise peaking
(see Figure 35). Leave the COMP pin unconnected if unused.
10
100
10 100 1k 10k
04500-043
FREQUENCY ( Hz )
NOISE DENSITY (nV/√Hz)
C
L
= 1µF
RC 82kΩ AND 10nF
C
L
= 10µF
RC 82kΩ AND 10nF
C
L
= 50µF
RC 82kΩ AND 10nF
Figure 35. Noise with Compensation Network
TURN-ON SETTLING TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components normally
associated with this settling time are the time for the active
circuits to settle and the time for the thermal gradients on the
chip to stabilize. Figure 19 and Figure 20 show the turn-on
settling time for the ADR431.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 18 of 23
APPLICATIONS INFORMATION
OUTPUT ADJUSTMENT
The ADR430/ADR431/ADR433/ADR434/ADR435 trim
terminal adjusts the output voltage over a ±0.5% range. This
feature allows the system designer to trim system errors out by
setting the reference to a voltage other than the nominal. This
feature is also helpful if the device is used in a system at
temperature to trim out any error. Adjustment of the output has a
negligible effect on the temperature performance of the device. To
avoid degrading temperature coefficients, both the trimming
potentiometer and the two resistors need to be low temperature
coefficient types, preferably <100 ppm/°C.
INPUT
OUTPUT
TRIM
V
IN
V
OUT
= ±0. 5%
GND
R1
470kΩ
R2 10kΩ (ADR430)
15kΩ (ADR431)
R
P
10kΩ
ADR43x
V
OUT
04500-004
Figure 36. Output Trim Adjustment
REFERENCE FOR CONVERTERS IN OPTICAL
NETWORK CONTROL CIRCUITS
In Figure 37, the high capacity, all optical router network
employs arrays of micromirrors to direct and route optical
signals from fiber to fiber without first converting them to
electrical form, which reduces the communication speed. The
tiny micromechanical mirrors are positioned so that each is
illuminated by a single wavelength that carries unique information
and can be passed to any desired input and output fiber. The
mirrors are tilted by the dual-axis actuators, which are controlled
by precision ADCs and DACs within the system. Due to the
microscopic movement of the mirrors, not only is the precision
of the converters important but the noise associated with these
controlling converters is also extremely critical. Total noise
within the system can be multiplied by the number of converters
employed. Therefore, to maintain the stability of the control
loop for this application, the exceptionally low noise performance
of the ADR430/ADR431/ADR433/ADR434/ADR435 is necessary.
(the ADR431 is shown in Figure 37 as an example).
GND
SOURCE FI BE R
GIMBAL + SENSOR DESTINATION
FIBER
ACTIVATOR
RIGHT
MEMS MIRROR
LAS ER BE AM
ACTIVATOR
LEFT
AMPLPREAMPAMPL
CONTROL
ELECTRONICS DAC
ADC
DAC
DSP
ADR431
ADR431
ADR431
04500-005
Figure 37. All Optical Router Network
HIGH VOLTAGE FLOATING CURRENT SOURCE
Use the circuit in Figure 38 to generate a floating current source
with minimal self heating. This particular configuration can
operate on high supply voltages determined by the breakdown
voltage of the N-channel JFET.
V
IN
V
OUT
GND
OP90
+V
S
SST111
VISHAY
2N3904
R
L
2.1kΩ
–V
S
ADR43x
2
6
4
04500-007
Figure 38. High Voltage Floating Current Source
KELVIN CONNECTION
In many portable instrumentation applications, where printed
circuit board (PCB) cost and area are closely related, circuit
interconnects are often of minimum width. These narrow lines
can cause large voltage drops if the voltage reference is required to
provide load currents to various functions. In fact, circuit intercon-
nects can exhibit a typical line resistance of 0.45 mΩ/square (for
example, 1 oz. copper). Force and sense connections, also
referred to as Kelvin connections, offer a convenient method of
eliminating the effects of voltage drops in circuit wires. Load
currents flowing through wiring resistance produce an error
(VERROR = R × IL) at the load. However, the Kelvin connection
shown in Figure 39 overcomes the problem by including the
wiring resistance within the forcing loop of the operational
amplifier.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 19 of 23
Because the amplifier senses the load voltage, the operational
amplifier loop control forces the output to compensate for the
wiring error and to produce the correct voltage at the load.
V
IN
V
OUT
GND
R
LW
R
L
V
OUT
SENSE
V
OUT
FORCE
R
LW
V
IN
2
6
4
ADR43x A1
OP191
+
04500-008
Figure 39. Advantage of Kelvin Connection
DUAL POLARITY REFERENCES
Dual polarity references can easily be made with an operational
amplifier and a pair of resistors. To avoid defeating the accuracy
obtained by the ADR430/ADR431/ADR433/ADR434/ADR435,
it is imperative to match the resistance tolerance as well as the
temperature coefficient of all the components.
6
2
4
5
–
10V
V
IN
V
IN
V
OUT
GND TRIM
R1 R2
U2
R3
V+
V–
+10V
–5V
+5V
10kΩ
1µF 0.1µF
U1
ADR435
OP1177
5kΩ
10kΩ
04500-009
Figure 40. 5 V and −5 V References Using ADR435
6
2
4
5
V
IN
V
OUT
GND TRIM
R1
5.6kΩ
U2
V+
V–
+10V
U1
ADR435
OP1177
+2.5V
–2.5V
R2
5.6kΩ
–10V
04500-010
Figure 41. 2.5 V and −2.5 V References Using ADR435
PROGRAMMABLE CURRENT SOURCE
Together with a digital potentiometer and a Howland current
pump, the ADR435 forms the reference source for a programmable
current as
W
B
B
A
L
V
R
R1
RR2
I×
+
=2
2
(4)
and
REF
N
WV
D
V×= 2
(5)
where:
VW is the voltage at Terminal W.
D is the decimal equivalent of the input code.
N is the number of bits.
In addition, R1' and R2' must be equal to R1 and (R2A + R2B),
respectively. In theory, R2B can be made as small as needed to
achieve the necessary current within the A2 output current
driving capability. In this example, the OP2177 can deliver a
maximum current of 10 mA. Because the current pump employs
both positive and negative feedback, the C1 and C2 capacitors
are needed to ensure that the negative feedback prevails and,
therefore, avoids oscillation. This circuit also allows bidirectional
current flow if the A and B inputs of the digital potentiometer
are supplied with the dual polarity references, as shown in
Figure 42.
6
2
4
5
VIN
VDD
VOUT
GND
TRIM
C2
10pF
U1 V+
V–
IL
ADR435
OP2177
R1
50kΩ
OP2177
V–
V+
A2
A1
I
L
VDD
U2
AD5232
W
A
B
VSS
R1'
50kΩ R2'
1kΩ
R2A
1kΩ
R2B
10Ω
VDD
VSS
C1
10pF
+
VL
–
04500-011
Figure 42. Programmable Current Source
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 20 of 23
PROGRAMMABLE DAC REFERENCE VOLTAGE
By employing a multichannel DAC, such as the AD7398,
quad, 12-bit voltage output DAC, one of its internal DACs
and an ADR430/ADR431/ADR433/ADR434/ADR435 voltage
reference can be used as a common programmable VREFx for the
rest of the DACs. The circuit configuration is shown in Figure 43.
V
REF
A
DAC A
V
REF
B
DAC B
V
REF
C
DAC C
V
REF
D
DAC D
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
V
OB
= V
REF
x (D
B
)
V
OC
= V
REF
x (D
C
)
V
OD
= V
REF
x (D
D
)
ADR430/
ADR431/
ADR433/
ADR434/
ADR435
AD7398
V
IN
V
REF
R1 ± 0.1%
R2
± 0.1%
04500-012
Figure 43. Programmable DAC Reference
The relationship of VREFx to VREF depends on the digital code
and the ratio of R1 and R2, given by
×+
+×
=
R1
R2D
R1
R2
V
V
N
REF
REFx
2
1
1
(6)
where:
VREFx is the reference voltage for DAC A to DAC D.
D is the decimal equivalent of the input code.
VREF is the applied external reference.
N is the number of bits.
Table 10. VREFx vs. R1 and R2
R1, R2 Digital Code VREFx
R1 = R2
0000 0000 0000
2 × V
REF
R1 = R2 1000 0000 0000 1.3 × VREF
R1 = R2 1111 1111 1111 VREF
R1 = 3 × R2 0000 0000 0000 4 × VREF
R1 = 3 × R2 1000 0000 0000 1.6 × VREF
R1 = 3 × R2 1111 1111 1111 VREF
PRECISION VOLTAGE REFERENCE FOR DATA
CONVERTERS
The ADR430/ADR431/ADR433/ADR434/ADR435 family has a
number of features that make it ideal for use with ADCs and
DACs. The exceptional low noise, tight temperature coefficient,
and high accuracy characteristics make the ADR430/ADR431/
ADR433/ADR434/ADR435 ideal for low noise applications,
such as cellular base station applications.
Another example of an ADC for which the ADR431 is well
suited is the AD7701. Figure 44 shows the ADR431 used as
the precision reference for this converter. The AD7701 is a 16-bit
ADC with on-chip digital filtering intended for the measurement
of wide dynamic range and low frequency signals, such as those
representing chemical, physical, or biological processes. It contains
a charge balancing Σ-Δ ADC, a calibration microcontroller with
on-chip static random access memory (RAM), a clock
oscillator, and a serial communications port.
SERI AL CL OCK
READ (TRANSMIT )
DATA READY
+5V
ANALOG
SUPPLY
SERI AL CL OCK
RANGES
SELECT
CALIBRATE
ANALOG
INPUT
ANALOG
GROUND
–5V
ANALOG
SUPPLY
DV
DD
SLEEP
MODE
DRDY
CS
SCLK
SDATA
CLKIN
CLKOUT
SC1
SC2
DGND
DV
SS
AV
SS
AGND
A
IN
CAL
BP/UP
V
REF
AV
DD
V
IN
V
OUT
GND
ADR431
AD7701
0.1µF
0.1µF
0.1µF
0.1µF
10µF
0.1µF
10µF
0.1µF
2
6
4
04500-013
Figure 44. Voltage Reference for the AD7701 16-Bit ADC
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 21 of 23
PRECISION BOOSTED OUTPUT REGULATOR
A precision voltage output with boosted current capability can
be achieved with the circuit shown in Figure 45. In this circuit,
U2 forces VO to be equal to VREF by regulating gate voltage of
N1. Therefore, the load current is supplied by VIN. In this
configuration, a 50 mA load is achievable at a VIN of 5 V. Moderate
heat is generated on the MOSFET, and higher current is
achieved with a replacement of the larger device. In addition,
for a heavy capacitive load with step input, add a buffer at the
output to enhance the transient response.
V–
V+
+
–
V
IN
N1
V
IN
V
OUT
TRIM
GND
5V
U2
2N7002
AD8601
U1
ADR431
V
O
R
L
25Ω
2
6
5
4
04500-014
Figure 45. Precision Boosted Output Regulator
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. N | Page 22 of 23
OUTLINE DIMENSIONS
COM P LIANT T O JEDE C S TANDARDS M O-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BS C
0.40
0.25
1.10 M AX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PI N 1
IDENTIFIER
15° M AX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 46. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE INMILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25(0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75(0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10(0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 47. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. N | Page 23 of 23
ORDERING GUIDE
Model1
Output
Voltage (V)
Initial
Accuracy, Temperature
Coefficient
Package (ppm/°C)
Temperature
Range
Package
Description
Package
Option
Ordering
Quantity
Markin
g Code
(mV) (%)
ADR430ARZ 2.048 ±3 ±0.15 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR430ARZ-REEL7 2.048 ±3 ±0.15 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR430ARMZ 2.048 ±3 ±0.15 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R10
ADR430ARMZ-REEL7 2.048 ±3 ±0.15 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R10
ADR430BRZ 2.048 ±1 ±0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR430BRZ-REEL7 2.048 ±1 ±0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR431ARZ 2.500 ±3 ±0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR431ARZ-REEL7 2.500 ±3 ±0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR431ARMZ 2.500 ±3 ±0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R12
ADR431ARMZ-REEL7 2.500 ±3 ±0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R12
ADR431BRMZ 2.500 ±1 ±0.04 3 −40°C to +125°C 8-Lead MSOP RM-8 50 R13
ADR431BRMZ-R7 2.500 ±1 ±0.04 3 −40°C to +125°C 8-Lead MSOP RM-8 1000 R13
ADR431BRZ 2.500 ±1 ±0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR431BRZ-REEL7 2.500 ±1 ±0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR433ARZ 3.000 ±4 ±0.13 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR433ARZ-REEL7 3.000 ±4 ±0.13 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR433ARMZ 3.000 ±4 ±0.13 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R14
ADR433ARMZ-REEL7 3.000 ±4 ±0.13 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R14
ADR433BRZ 3.000 ±1.5 ±0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR433BRZ-REEL7 3.000 ±1.5 ±0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR434ARZ 4.096 ±5 ±0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR434ARZ-REEL7 4.096 ±5 ±0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR434ARMZ 4.096 ±5 ±0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R16
ADR434ARMZ-REEL7 4.096 ±5 ±0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R16
ADR434BRZ 4.096 ±1.5 ±0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR434BRZ-REEL7 4.096 ±1.5 ±0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR435ARZ 5.000 ±6 ±0.12 10 –40°C to +125°C 8-Lead SOIC_N R-8 98
ADR435ARZ-REEL7 5.000 ±6 ±0.12 10 –40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR435ARMZ 5.000 ±6 ±0.12 10 –40°C to +125°C 8-Lead MSOP RM-8 50 R18
ADR435ARMZ-REEL7 5.000 ±6 ±0.12 10 –40°C to +125°C 8-Lead MSOP RM-8 1,000 R18
ADR435BRMZ 5.000 ±2 ±0.04 3 –40°C to +125°C 8-Lead MSOP RM-8 50 R19
ADR435BRMZ-R7 5.000 ±2 ±0.04 3 –40°C to +125°C 8-Lead MSOP RM-8 1,000 R19
ADR435BRZ 5.000 ±2 ±0.04 3 –40°C to +125°C 8-Lead SOIC_N R-8 98
ADR435BRZ-REEL7 5.000 ±2 ±0.04 3 –40°C to +125°C 8-Lead SOIC_N R-8 1,000
1 Z = RoHS Compliant Part.
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D04500-0-2/18(N)
