LT3791-1
1
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For more information www.linear.com/LT3791-1
Typical applicaTion
FeaTures DescripTion
60V 4-Switch Synchronous
Buck-Boost Controller
The LT
®
3791-1 is a synchronous 4-switch buck-boost volt-
age/current regulator controller. The controller can regulate
output voltage, output current, or input current with input
voltages above, below, or equal to the output voltage. The
constant-frequency, current mode architecture allows its
frequency to be adjusted or synchronized from 200kHz
to 700kHz. No top FET refresh switching cycle is needed
in buck or boost operation. With 60V input, 60V output
capability and seamless transitions between operating
regions, the LT3791-1 is ideal for voltage regulator, bat-
tery/super-capacitor charger applications in automotive,
industrial, telecom, and even battery-powered systems.
For new designs we recommend the LT8390: 60V synchro-
nous 4-switch buck-boost controller due to its numerous
performance improvements over the LT3791-1.
L, LT , LT C , LT M , Linear Technology and the Linear logo are registered trademarks of Analog
Devices, Inc. All other trademarks are the property of their respective owners.
120W (24V 5A) Buck-Boost Voltage Regulator
applicaTions
n 4-Switch Single Inductor Architecture Allows VIN
Above, Below or Equal to VOUT
n Synchronous Switching: Up to 98.5% Efficiency
n Wide VIN Range: 4.7V to 60V
n 2% Output Voltage Accuracy: 1.2V ≤ VOUT < 60V
n 6% Output Current Accuracy: 0V ≤ VOUT < 60V
n Input and Output Current Regulation with Current
Monitor Outputs
n No Top FET Refresh in Buck or Boost
n VOUT Disconnected from VIN During Shutdown
n C/10 Charge Termination and Output Shorted Flags
n Capable of 100W or greater per IC
n 38-Lead TSSOP with Exposed Pad
Efficiency vs Load Current
n Automotive, Telecom, Industrial Systems
n High Power Battery-Powered System
LOAD CURRENT (A)
0 1
EFFICIENCY (%)
90
95
100
37911 TA01b
80
70
60
85
75
65
2 3 4
5
VIN = 12V
VIN = 24V
VIN = 54V
V
IN
12V TO
58V
INTVCC
TG1
BG1
SNSP
SNSN
BST1
BST2
BG2
PGND
SW2
TG2
RT
LT3791-1
SWI
SHORT
C/10
CCM
470nF
IVINN
VIN
IVINP
IVINMON
ISMON
CLKOUT
PWMOUT
TEST1
EN/UVLO
OVLO
VREF
PWM
CTRL
147k
200kHz
VC
SYNCSS SGND
1µF
499k
56.2k
100k
499k
27.4k INTVCC
0.1µF
33nF
10nF
37911 TA01a
0.004Ω
ISP
ISN
FB
0.1µF
10µH
0.1µF
4.7µF
4.7µF
50V
×2
4.7µF
100V
47µF
80V
0.015Ω V
OUT
24V
5A
73.2k
3.83k
5.1k
+
220µF
35V
+
100k 200k
0.003Ω
50Ω
LT3791-1
2
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For more information www.linear.com/LT3791-1
pin conFiguraTionabsoluTe MaxiMuM raTings
Supply Voltages
Input Supply (VIN) ..................................................... 60V
SW1, SW2 ...................................................... –1V to 60V
C/10, SHORT .............................................................15V
EN/UVLO, IVINP, IVINN, ISP, ISN ..............................60V
INTVCC, (BST1-SW1), (BST2-SW2) .............................6V
CCM, SYNC, RT, CTRL, OVLO, PWM ..........................6V
IVINMON, ISMON, FB, SS, VC, VREF ...........................6V
IVINP-IVINN, ISP-ISN, SNSP-SNSN .......................±0.5V
SNSP, SNSN ........................................................... ±0.3V
Operating Junction Temperature (Notes 2, 3)
LT3791E-1/LT3791I-1 ......................... –40°C to 125°C
LT3791H-1 ......................................... –40°C to 150°C
LT3791MP-1....................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ...................300°C
(Note 1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
TOP VIEW
FE PACKAGE
38-LEAD PLASTIC TSSOP
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
CTRL
SS
PWM
C/10
SHORT
VREF
ISMON
IVINMON
EN/UVLO
IVINP
IVINN
VIN
INTVCC
TG1
BST1
SW1
PGND
BG1
BG2
OVLO
FB
VC
RT
SYNC
CLKOUT
CCM
PWMOUT
SGND
TEST1
SNSN
SNSP
ISN
ISP
TG2
NC
BST2
SW2
PGND
39
SGND
TJMAX = 150°C, θJA = 28°C/W
EXPOSED PAD (PIN 39) IS SGND, MUST BE SOLDERED TO PCB
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted.
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3791EFE-1#PBF LT3791EFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –40°C to 125°C
LT3791IFE-1#PBF LT3791IFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –40°C to 125°C
LT3791HFE-1#PBF LT3791HFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –40°C to 150°C
LT3791MPFE-1#PBF LT3791MPFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –55°C to 150°C
Consult LT C Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input
VIN Operating Voltage 4.7 60 V
VIN Shutdown IQVEN/UVLO = 0V 0.1 1 µA
VIN Operating IQ (Not Switching) FB = 1.3V, RT = 59.0k 3.0 4 mA
orDer inForMaTion
http://www.linear.com/product/LT3791-1#orderinfo
LT3791-1
3
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For more information www.linear.com/LT3791-1
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Logic Inputs
EN/UVLO Falling Threshold l1.16 1.2 1.24 V
EN/UVLO Rising Hysteresis 15 mV
EN/UVLO Input Low Voltage IVIN Drops Below 1µA 0.3 V
EN/UVLO Pin Bias Current Low VEN/UVLO = 1V 2 3 4 µA
EN/UVLO Pin Bias Current High VEN/UVLO = 1.6V 10 100 nA
CCM Threshold Voltage 0.3 1.5 V
CTRL Input Bias Current VCTRL = 1V 20 50 nA
CTRL Latch-Off Threshold 175 mV
OVLO Rising Shutdown Voltage l2.85 3 3.15 V
OVLO Falling Hysteresis 75 mV
Regulation
VREF Voltage l1.96 2.00 2.04 V
VREF Line Regulation 4.7V < VIN < 60V 0.002 0.04 %/V
V(ISP-ISN) Threshold VCTRL = 2V
l
97.5
94
100
100
102.5
106
mV
mV
VCTRL = 1100mV
l
87
84
90
90
93
96
mV
mV
VCTRL = 700mV
l
47.5
46
50
50
52.5
54
mV
mV
VCTRL = 300mV
l
6.5
5
10
10
13.5
15
mV
mV
ISP Bias Current 110 µA
ISN Bias Current 20 µA
Output Current Sense Common Mode Range 0 60 V
Output Current Sense Amplifier gm890 µS
ISMON Monitor Voltage V(ISP-ISN) = 100mV l0.96 1 1.04 V
Input Current Sense Threshold V(IVINP-IVINN) 3V ≤ VIVINP ≤ 60V l46.5 50 54 mV
IVINP Bias Current 90 µA
IVINN Bias Current 20 µA
Input Current Sense Common Mode Range 3 60 V
Input Current Sense Amplifier gm2.12 mS
IVINMON Monitor Voltage V(IVINP-IVINN) = 50mV l0.96 1 1.04 V
FB Regulation Voltage
l
1.194
1.176
1.2
1.2
1.206
1.220
V
V
FB Line Regulation 4.7V < VIN < 60V 0.002 0.025 %/V
FB Amplifier gm565 µS
FB Pin Input Bias Current FB in Regulation 100 200 nA
VC Standby Input Bias Current PWM = 0V –20 20 nA
VSENSE(MAX) (VSNSP-SNSN) Boost
Buck
l
l
42
–56
51
–47.5
60
–39
mV
mV
Fault
SS Pull-Up Current VSS = 0V 14 µA
SS Discharge Current 1.4 µA
LT3791-1
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For more information www.linear.com/LT3791-1
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
C/10 Rising Threshold (VFB) V(ISP-ISN) = 0V l1.127 1.15 1.173 V
C/10 Falling Threshold (VFB)l1.078 1.1 1.122 V
C/10 Falling Threshold (V(ISP-ISN)) VFB = 1.2V 5 10 15 mV
SHORT Falling Threshold (VFB) 380 400 450 mV
C/10 Pin Output Impedance 1.1 2.0 kΩ
SHORT Pin Output Impedance 1.1 2.0 kΩ
SS Latch-Off Threshold 1.75 V
SS Reset Threshold 0.2 V
Oscillator
Switching Frequency RT = 147k
RT = 59.0k
RT = 29.1k
190
380
665
200
400
700
210
420
735
kHz
kHz
kHz
SYNC Frequency 200 700 kHz
SYNC Pin Resistance to GND 90 kΩ
SYNC Threshold Voltage 0.3 1.5 V
Internal VCC Regulator
INTVCC Regulation Voltage 4.8 5 5.2 V
Dropout (VIN – INTVCC) IINTVCC = –10mA, VIN = 5V 240 350 mV
INTVCC Undervoltage Lockout 3.1 3.5 3.9 V
INTVCC Current Limit VINTVCC = 4V 67 mA
PWM
PWM Threshold Voltage 0.3 1.5 V
PWM Pin Resistance to GND 90 kΩ
PWMOUT Pull-Up Resistance 10 20 Ω
PWMOUT Pull-Down Resistance 5 10 Ω
NMOS Drivers
TG1, TG2 Gate Driver On-Resistance
Gate Pull-Up
Gate Pull-Down
VBST – VSW = 5V
2.6
1.7
Ω
Ω
BG1, BG2 Gate Driver On-Resistance
Gate Pull-Up
Gate Pull-Down
VINTVCC = 5V
3
1.2
Ω
Ω
TG Off to BG On Delay CL = 3300pF 60 ns
BG Off to TG On Delay CL = 3300pF 60 ns
TG1, TG2, tOFF(MIN) RT = 59.0k 240 320 ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT 3791E-1 is guaranteed to meet performance from
0°C to 125°C junction temperature. Specification over the -40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls.
The LT 3791I-1 is guaranteed to meet performance specifications over the
–40°C to 125°C operating junction temperature range. The LT 3791H-1 is
guaranteed to meet performance specifications over the –40°C to 150°C
operating junction temperature range. The LT 3791MP-1 is guaranteed
to meet performance specifications over the –55°C to 150°C operating
junction temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated for junction temperatures greater
than 125°C.
Note 3: The LT 3791-1 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified absolute maximum operating junction temperature may
impair device reliability.
LT3791-1
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For more information www.linear.com/LT3791-1
Typical perForMance characTerisTics
INTVCC Load Regulation VREF Voltage vs Temperature VREF Load Regulation
INTVCC Dropout Voltage
vs Current, Temperature INTVCC Voltage vs Temperature
TA = 25°C, unless otherwise noted.
INTVCC Current Limit
vs Temperature
LDO CURRENT (mA)
0
V
IN
-V
INTVCC
(V)
1.0
1.5
40
37911 G01
0.5
010 20 30
2.5
2.0
TA = 150°C
TA = 25°C
TA = –50°C
TEMPERATURE (°C)
–50
INTV
CC
(V)
5.00
5.10
150
37911 G02
4.90
4.80 050 100
–25 25 75 125
5.20
4.95
5.05
4.85
5.15
VIN = 60V
VIN = 12V
TEMPERATURE (°C)
–50
0
INTV
CC
CURRENT LIMIT (mA)
10
30
40
50
70
050 75
37911 G03
20
80
90
60
–25 25 100 125
150
ILOAD (mA)
0
INTV
CC
(V)
5.75
30
37911 G04
5.00
4.50
10 20 40
4.25
4.00
6.00
5.50
5.25
4.75
50 60
70
TEMPERATURE (°C)
–50
V
REF
(V)
2.00
2.02
150
37911 G05
1.98
1.96 050 100
–25 25 75 125
2.04
1.99
2.01
1.97
2.03
VIN = 60V
VIN = 12V
VIN = 4.7V
IREF (µA)
0
V
REF
(V)
2.00
2.10
400
37911 G06
1.90
1.80 100 200 300
50 150 250 350
2.20
1.95
2.05
1.85
2.15
V(ISP-ISN) Threshold vs VCTRL V(ISP-ISN) Threshold vs VISP
V(ISP-ISN) Threshold
vs Temperature
VCTRL (V)
0
(ISP-ISN)
30
90
100
0.4 0.6 1.0 1.2 1.4
10
70
50
20
80
0
60
40
0.2 0.8 1.81.6
VISP (V)
0
V
(ISP-ISN)
(mV)
98
100
102
30 50
37911 G08
96
94
92 10 20 40
104
106
108
60
TEMPERATURE (°C)
–50
V
(ISP-ISN)
(mV)
100
104
150
37911 G09
96
92 050 100
–25 25 75 125
108
VIN = 12V
98
102
94
106
VISP = 60V
VISP = 12V
VISP = 0V
LT3791-1
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V(ISP-ISN) Threshold vs VFB ISMON Voltage vs Temperature ISMON Voltage vs V(ISP-ISN)
V(IVINP-IVINN) Threshold
vs Temperature
V(IVINP-IVINN) Threshold vs VFB
V(IVINP-IVINN) Threshold
vs VIVINP IVINMON Voltage vs Temperature
FB Regulation Voltage
vs Temperature
SHORT Threshold
vs Temperature
VFB (V)
1.17
0
V
(ISP-ISN)
(mV)
20
40
60
80
120
1.18 1.19 1.20 1.21
37911 G10
1.22
1.23
100
TEMPERATURE (°C)
–50
V
ISMON
(V)
1.00
1.02
150
37911 G11
0.98
0.96 050 100
–25 25 75 125
1.04
0.99
1.01
0.97
1.03
VIN = 12V
V(ISP-ISN) = 100mV
V(ISP-ISN) (mV)
0
V
ISMON
(V)
0.6
0.8
1.0
80
37911 G12
0.4
0.2
0.5
0.7
0.9
0.3
0.1
02010 4030 60 70 90
50
100
TEMPERATURE (°C)
–50
V
(IVINP
-
IVINN)
(mV)
50
52
54
25 50 75 100 125
37911 G13
48
46
–25 0
150
44
42
56
VIVINP = 60V
VIVINP = 3V
VIVINP (V)
0
V
(IVINP
-
IVINN)
(mV)
49.5
50.0
50.5
30 50
37911 G14
49.0
48.5
48.0 10 20 40
51.0
51.5
52.0
60
TEMPERATURE (°C)
–50
V
IVINMON
(V)
1.00
1.02
150
37911 G15
0.98
0.96 050 100
–25 25 75 125
1.04
0.99
1.01
0.97
1.03
VIVINP = 12V
V(IVINP-VINN) = 50mV
VFB (V)
1.17
0
V
(IVINP-IVINSN)
(mV)
10
20
30
40
60
1.18 1.19 1.20 1.21
37911 G16
1.22
1.23
50
TEMPERATURE (°C)
–50
V
FB
(V)
1.20
1.22
150
37911 G17
1.18
1.16 050 100
–25 25 75 125
1.24
1.19
1.21
1.17
1.23
VIN = 60V
VIN = 12V
VIN = 4.7V
TEMPERATURE (°C)
–50
FB VOLTAGE (V)
0.400
0.450
150
37911 G18
0.350
0.300 050 100
–25 25 75 125
0.500
0.375
0.425
0.325
0.475
RISING
FALLING
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
LT3791-1
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For more information www.linear.com/LT3791-1
C/10 Threshold vs Temperature OVLO Threshold vs Temperature Soft-Start Current vs Temperature
Supply Current vs Input Voltage EN/UVLO Pin Current EN/UVLO Threshold Voltage
TEMPERATURE (°C)
–50
FB VOLTAGE (V)
1.100
1.150
150
37911 G19
1.050
1.000 050 100
–25 25 75 125
1.200
1.075
1.125
1.025
1.175
RISING
FALLING
TEMPERATURE (°C)
–50
OVLO THRESHOLD (V)
2.9
3.1
150
37911 G20
2.7
2.5 050 100
–25 25 75 125
3.3
2.8
3.0
2.6
3.2
RISING
FALLING
TEMPERATURE (°C)
–50
I
SS
(µA)
8
12
150
37911 G21
4
0050 100
–25 25 75 125
16
6
10
2
14 CHARGING
DISCHARGING
VIN (V)
0
I
Q
(mA)
1.5
2.0
2.5
30 50
37911 G22
1.0
0.5
010 20 40
3.0
3.5
4.0
60
TA = 150°C
TA = 25°C
TA = –50°C
TEMPERATURE (°C)
–50
EN/UVLO PIN CURRENT (µA)
4
6
150
37911 G23
2
0050 100
–25 25 75 125
8
3
5
1
7
VEN/ULO = 1V
TEMPERATURE (°C)
–50
1.10
EN/UVLO THRESHOLD (V)
1.12
1.16
1.18
1.20
1.30
1.24
050 75
37911 G24
1.14
1.26
1.28
1.22
–25 25 100 125
150
RISING
FALLING
Oscillator Frequency
vs Temperature
TG1, TG2 Minimum On-Time
vs Temperature
TG1, TG2 Minimum Off-Time
vs Temperature
TEMPERATURE (°C)
–50
SWITCHING FREQUENCY (kHz)
400
600
150
37911 G25
200
0050 100
–25 25 75 125
800
300
500
100
700 RT = 29.1k
RT = 59.0k
RT = 147k
TEMPERATURE (°C)
–50
TG1, TG2 MINIMUM ON-TIME (ns)
60
80
150
37911 G26
40
20 050 100
–25 25 75 125
100
50
70
30
90
TG1
TG2
TEMPERATURE (°C)
–50
TG1, TG2 MINIMUM OFF-TIME (ns)
200
250
300
100 125
37911 G27
150
100
–25 0 25 50 75
150
50
0
350
fSW = 200kHz
fSW = 400kHz
fSW = 700kHz
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
LT3791-1
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V(BST1-SW1), V(BST2-SW2) UVLO
vs Temperature
BG1, BG2 Driver On-Resistance
vs Temperature
TG1, TG2 Driver On-Resistance
vs Temperature
PWMOUT On-Resistance
vs Temperature VC Voltage vs Duty Cycle
V(SNSP-SNSN) Buck Threshold
vs VC
V(SNSP-SNSN) Buck Threshold
vs Temperature
V(SNSP-SNSN) Boost Threshold
vs VC
V(SNSP-SNSN) Boost Threshold
vs Temperature
TEMPERATURE (°C)
–50
V
(BST1-SW1)
, V
(BST2,SW2)
(V)
3.5
3.7
150
37911 G28
3.3
3.1 050 100
–25 25 75 125
3.9
3.4
3.6
3.2
3.8
RISING
FALLING
TEMPERATURE (°C)
–50
BG1, BG2 RESISTANCE (Ω)
2.5
3.0
3.5
150
37911 G29
2.0
1.5
0050 100
–25 25 75 125
0.5
1.0
4.5
4.0
PULL-UP
PULL-DOWN
TEMPERATURE (°C)
–50
TG1, TG2 RESISTANCE (Ω)
2.0
3.0
150
37911 G30
1.0
0050 100
–25 25 75 125
4.0
1.5
2.5
0.5
3.5
PULL-UP
PULL-DOWN
TEMPERATURE (°C)
–50
PWMOUT RESISTANCE (Ω)
8
10
12
100 125
37911 G31
6
4
–25 0 25 50 75
150
2
0
14
PULL-UP
PULL-DOWN
DUTY CYCLE (%)
0
V
C
(V)
0.6
0.8
1.0
60
100
37911 G32
0.4
0.2
020 40 80
1.2
1.4
1.6
BG2
BG1
V(SNSP-SNSN) = 0V
VC (V)
0.6
–60
V
(SNSP-SNSN)
(mV)
–40
–20
0
20
60
0.8 1.0 1.2 1.4
37911 G33
1.6
1.8
40
TEMPERATURE (°C)
–50
–60
V
(SNSP-SNSN)
THRESHOLD (mV)
–40
–20
0
20
0 50 100
150
37911 G34
40
60
–25 25 75 125
VC(MIN)
VC(MAX)
VC (V)
0.6
60
40
20
0
–20
–40
–60
–80 1.2 1.6
37911 G35
0.8 1.0 1.4
1.8
V
(SNSP-SNSN)
(mV)
TEMPERATURE (°C)
–50
V
(SNSP-SNSN)
THRESHOLD (mV)
0
20
40
100 125
37911 G36
–20
–40
–25 0 25 50 75
150
–60
–80
60
VC(MAX)
VC(MIN)
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
LT3791-1
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pin FuncTions
CTRL (Pin 1): Output Current Sense Threshold Adjustment
Pin. Regulating threshold V(ISP-ISN) is 1/10th of (VCTRL –
200mV). CTRL linear range is from 200mV to 1.1V. For
VCTRL > 1.3V, the current sense threshold is constant at
the full-scale value of 100mV. For 1.1V < VCTRL < 1.3V, the
dependence of the current sense threshold upon VCTRL tran-
sitions from a linear function to a constant value, reaching
98% of full scale by VCTRL = 1.2V. Connect CTRL to VREF
for the 100mV default threshold. Force less than 175mV
(typical) to stop switching. Do not leave this pin open.
SS (Pin 2): Soft-start reduces the input power sources
surge current by gradually increasing the controller’s cur-
rent limit. A minimum value of 22nF is recommended on
this pin. A 100k resistor must be placed between SS and
VREF for the LT3791-1.
PWM (Pin 3): A signal low turns off switches, idles switch-
ing and disconnects the VC pin from all external loads. The
PWMOUT pin follows the PWM pin. PWM has an internal
90k pull-down resistor. If not used, connect to INTVCC.
C/10 (Pin 4): C/10 Charge Termination Pin. An open-drain
pull-down on C/10 asserts if FB is greater than 1.15V (typi-
cal) and V(ISP-ISN) is less than 10mV (typical). To function,
the pin requires an external pull-up resistor.
SHORT (Pin 5): Output Shorted Pin. An open-drain pull-
down on SHORT asserts if FB is less than 400mV
(typical)
.
To function, the pin requires an external pull-up resistor.
VREF (Pin 6): Voltage Reference Output Pin, Typically 2V.
This pin drives a resistor divider for the CTRL pin, either
for output current adjustment or for temperature limit/
compensation of the output load. Can supply up to 200µA
of current.
ISMON (Pin 7): Monitor pin that produces a voltage that
is ten times the voltage V(ISP-ISN). ISMON will equal 1V
when V(ISP-ISN) = 100mV.
IVINMON (Pin 8): Monitor pin that produces a voltage
that is twenty times the voltage V(IVINP-IVINN). IVINMON
will equal 1V when V(IVINP-IVINN) = 50mV.
EN/UVLO (Pin 9): Enable Control Pin. Forcing an accurate
1.2V falling threshold with an externally programmable
hysteresis is generated by the external resistor divider
and a 3µA pull-down current. Above the 1.2V (typical)
threshold (but below 6V), EN/UVLO input bias current is
sub-µA. Below the falling threshold, a 3µA pull-down cur-
rent is enabled so the user can define the hysteresis with
the external resistor selection. An undervoltage condition
resets soft-start. Tie to 0.3V, or less, to disable the device
and reduce VIN quiescent current below 1µA.
IVINP (Pin 10): Positive Input for the Input Current Limit
and Monitor. Input bias current for this pin is typically 90µA.
IVINN (Pin 11): Negative Input for the Input Current Limit
and Monitor. The input bias current for this pin is typically
20µA.
VIN (Pin 12): Main Input Supply. Bypass this pin to PGND
with a capacitor.
INTVCC (Pin 13): Internal 5V Regulator Output. The driver
and control circuits are powered from this voltage. Bypass
this pin to PGND with a minimum 4.7µF ceramic capacitor.
TG1 (Pin 14): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage equal to INTVCC superimposed on
the switch node voltage SW1.
BST1 (Pin 15): Bootstrapped Driver Supply. The BST1 pin
swings from a diode voltage below INTVCC up to a diode
voltage below VIN + INTVCC.
SW1 (Pin 16): Switch Node. SW1 pin swings from a diode
voltage drop below ground up to VIN.
PGND (Pins 17, 20): Power Ground. Connect these pins
closely to the source of the bottom N-channel MOSFET.
BG1 (Pin 18): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
BG2 (Pin 19): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
SW2 (Pin 21): Switch Node. SW2 pin swings from a diode
voltage drop below ground up to VOUT.
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pin FuncTions
BST2 (Pin 22): Bootstrapped Driver Supply. The BST2 pin
swings from a diode voltage below INTVCC up to a diode
voltage below VOUT + INTVCC.
NC (Pin 23): No Connect Pin. Leave this pin floating.
TG2 (Pin 24): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage equal to INTVCC superimposed on
the switch node voltage SW2.
ISP (Pin 25): Connection Point for the Positive Terminal
of the Output Current Feedback Resistor.
ISN (Pin 26): Connection Point for the Negative Terminal
of the Output Current Feedback Resistor.
SNSP (Pin 27): The Positive Input to the Current Sense
Comparator. The VC pin voltage and controlled offsets
between the SNSP and SNSN pins, in conjunction with a
resistor, set the current trip threshold.
SNSN (Pin 28): The Negative Input to the Current Sense
Comparator.
TEST1 (Pin 29): This pin is used for testing purposes only
and must be connected to SGND for the part to operate
properly.
SGND (Pin 30, Exposed Pad Pin 39): Signal Ground.
All small-signal components and compensation should
connect to this ground, which should be connected to
PGND at a single point. Solder the exposed pad directly
to the ground plane.
PWMOUT (Pin 31): Buffered Version of PWM Signal for
Driving Output Load Disconnect N-Channel MOSFET. The
PWMOUT pin is driven from INTVCC. Use of a MOSFET
with a gate cutoff voltage higher than 1V is recommended.
CCM (Pin 32): Continuous Conduction Mode Pin. When
the pin voltage is higher than 1.5V, the part runs in fixed
frequency forced continuous conduction mode and al-
lows the inductor current to flow negative. When the pin
voltage is less than 0.3V, the part runs in discontinuous
conduction mode and does not allow the inductor current
to flow backward. This pin is only meant to block inductor
reverse current, and should only be pulled low when the
output current is low. This pin must be either connected to
INTVCC (pin 13) for continuous conduction mode across
all loads, or it must be connected to the C/10 (pin 4) with
a pull-up resistor to INTVCC for continuous conduction
mode at heavy load and for discontinuous conduction
mode at light load.
CLKOUT (Pin 33): Clock Output Pin. A 180° out-of-phase
clock is provided at the oscillator frequency to allow for par-
alleling two devices for extending output power capability.
SYNC (Pin 34): External Synchronization Input Pin. This
pin is internally terminated to GND with a 90k resistor.
The internal buck clock is synchronized to the rising edge
of the SYNC signal while the internal boost clock is 180°
phase shifted.
RT (Pin 35): Frequency Set Pin. Place a resistor to GND
to set the internal frequency. The range of oscillation is
200kHz to 700kHz.
VC (Pin 36): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0.7V to 1.9V.
FB (Pin 37): Voltage Loop Feedback Pin. FB is intended for
constant-voltage regulation. The internal transconductance
amplifier with output VC will regulate FB to 1.2V (typical)
through the DC/DC converter. If the FB input is regulat-
ing the loop and V(ISP-ISN) < 10mV, the C/10 pull-down
is asserted. If the FB pin is less than 400mV, the SHORT
pull-down is asserted.
OVLO (Pin 38): Overvoltage Input Pin. This pin is used for
OVLO, if OVLO > 3V then SS is pulled low, the part stops
switching and resets. Do not leave this pin open.
LT3791-1
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block DiagraM
0.2V
1.15V
0.4V
FB
–
+
A18
–
+
A9
3V
–
+
–
+
–
+
–
+
A8
A6
A5
1.75V
1.4µA
VC
OVLO
37911 BD
38
36
SS
2
PWMOUT
PWM A17
INTVCC
31
SGND
30, 39
C/10
4
3
–
+
+
+
–
–
A12
1.2V
14µA
3µA SHDN_INT
VREF
A11
A10
A16
A15
ISMON_INT
IVINMON_INT
CTRL 1
FB 37
SNSN 28
SNSP 27
BST2 22
TG2
SW2
INTVCC
INTVCC
21
SHORT
5
Q
SS RESET
SS LATCH
R
S
24
A13
SW1 16
TG1
BST1 15
14
BG2 19
A14 BG1
PWM
18
PGND 17
BUCK
LOGIC
–
+
A7
–
+
A3
–
+
A4
SS LATCH
SS_RESET
SHDN_INT
OSC SLOPE_COMP_BOOST
SLOPE_COMP_BUCK
1.2V
EN/UVLO
9
IVINMON
8
ISMON
ISMON_INT
7
ISP
25
ISN
26
RT
35
CCM
32
SYNC
34
CLKOUT
33
–+
A2
IVINMON_INT
IVINP IVINN
10 11
VIN
SHDN_INT
12
VREF
6
INTVCC
13
–+
A1
BOOST
LOGIC
REGS
A = 10 A = 10 A = 20 A = 24
TSD
LT3791-1
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operaTion
The LT3791-1 is a current mode controller that provides an
output voltage above, equal to or below the input voltage.
The LT C proprietary topology and control architecture uses
a current sensing resistor in buck or boost operation. The
sensed inductor current is controlled by the voltage on
the VC pin, which is the output of the feedback amplifiers
A11 and A12. The VC pin is controlled by three inputs, one
input from the output current loop, one input from the
input current loop, and the third input from the feedback
loop. Whichever feedback input is higher takes precedence,
forcing the converter into either a constant-current or a
constant-voltage mode.
The LT3791-1 is designed to transition cleanly between
the two modes of operation. Current sense amplifier A1
senses the voltage between the IVINP and IVINN pins and
provides a pre-gain to amplifier A11. When the voltage
between IVINP and IVINN reaches 50mV, the output of A1
provides IVINMON_INT to the inverting input of A11 and
the converter is in constant-current mode. If the current
sense voltage exceeds 50mV, the output of A1 increases
causing the output of A11 to decrease, thus reducing the
amount of current delivered to the output. In this manner
the current sense voltage is regulated to 50mV.
The output current amplifier works similar to the input
current amplifier but with a 100mV voltage instead of
50mV. The output current sense level is also adjustable
by the CTRL pin. Forcing CTRL to less than 1.2V forces
ISMON_INT to the same level as CTRL, thus providing
current-level control. The output current amplifier provides
rail-to-rail operation. Similarly if the FB pin goes above
1.2V the output of A11 decreases to reduce the current
level and regulate the output (constant-voltage mode).
The LT3791-1 provides monitoring pins IVINMON and
ISMON that are proportional to the voltage across the
input and output current amplifiers respectively.
The main control loop is shut down by pulling the EN/
UVLO pin low. When the EN/UVLO pin is higher than 1.2V,
an internal 14µA current source charges soft-start capaci-
tor CSS at the SS pin. The VC voltage is then clamped a
diode voltage higher than the SS voltage while the CSS is
slowly charged during start-up. This soft-start clamping
prevents abrupt current from being drawn from the input
power supply.
The top MOSFET drivers are biased from floating boot-
strap capacitors C1 and C2, which are normally recharged
through an external diode when the top MOSFET is turned
off. A unique charge sharing technique eliminates top FET
refresh switching cycle in buck or boost operation.Schottky
diodes across the synchronous switch M4 and synchronous
switch M2 are not required, but they do provide a lower drop
during the dead time. The addition of the Schottky diode
typically improves peak efficiency by 1% to 2% at 500kHz.
Power Switch Control
Figure 1 shows a simplified diagram of how the four
power switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for
the LT3791-1 as a function of duty cycle D. The power
switches are properly controlled so the transfer between
regions is continuous. When VIN approaches VOUT, the
buck-boost region is reached.
M1
SW1
V
IN
V
OUT
M2
TG2
BG2
M4
SW2
M3
TG1
BG1
RSENSE
37911 F01
L1
D
MAX
BOOST
(BG2) M1 ON, M2 OFF
PWM M3, M4 SWITCHES
BOOST REGION
M4 ON, M3 OFF
PWM M2, M1 SWITCHES
BUCK REGION
37911
F02
4-SWITCH PWMBUCK-BOOST REGION
DMIN
BOOST
DMAX
BUCK
(TG1)
DMIN
BUCK
Figure 1. Simplified Diagram of the Output Switches
Figure 2. Operating Regions vs Duty Cycle
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operaTion
Buck Region (VIN > VOUT)
Switch M4 is always on and switch M3 is always off during
this mode. At the start of every cycle, synchronous switch
M2 is turned on first. Inductor current is sensed when
synchronous switch M2 is turned on. After the sensed
inductor current falls below the reference voltage, which
is proportional to VC, synchronous switch M2 is turned off
and switch M1 is turned on for the remainder of the cycle.
Switches M1 and M2 will alternate, behaving like a typical
synchronous buck regulator. The duty cycle of switch M1
increases until the maximum duty cycle of the converter
in buck operation reaches DMAX(BUCK, TG1), given by:
DMAX(BUCK,TG1) = 100% – D(BUCK-BOOST)
where D(BUCK-BOOST) is the duty cycle of the buck-boost
switch range:
D(BUCK-BOOST) = 8%
Figure 3 shows typical buck operation waveforms. If VIN
approaches VOUT, the buck-boost region is reached.
Buck-Boost Region (VIN ~ VOUT)
When VIN is close to VOUT, the controller is in buck-boost
operation. Figure 4 and Figure 5 show typical waveforms in
this operation. Every cycle the controller turns on switches
M2 and M4, then M1 and M4 are turned on until 180° later
when switches M1 and M3 turn on, and then switches
M1 and M4 are turned on for the remainder of the cycle.
Boost Region (VIN < VOUT)
Switch M1 is always on and synchronous switch M2 is
always off in boost operation. Every cycle switch M3 is
turned on first. Inductor current is sensed when synchro-
nous switch M3 is turned on. After the sensed inductor
current exceeds the reference voltage which is proportional
to VC, switch M3 turns off and synchronous switch M4
is turned on for the remainder of the cycle. Switches M3
and M4 alternate, behaving like a typical synchronous
boost regulator.
The duty cycle of switch M3 decreases until the minimum
duty cycle of the converter in boost operation reaches
DMIN(BOOST,BG2), given by:
DMIN(BOOST,BG2) = D(BUCK-BOOST)
where D(BUCK-BOOST) is the duty cycle of the buck-boost
switch range:
D(BUCK-BOOST) = 8%
Figure 6 shows typical boost operation waveforms. If VIN
approaches VOUT, the buck-boost region is reached.
Low Current Operation
The LT3791-1 is recommended to run in forced continuous
conduction mode at heavy load by pulling the CCM pin
higher than 1.5V. In this mode the controller behaves as
a continuous, PWM current mode synchronous switching
regulator. In boost operation, switch M1 is always on,
switch M3 and synchronous switch M4 are alternately
turned on to maintain the output voltage independent
of the direction of inductor current. In buck operation,
synchronous switch M4 is always on, switch M1 and syn-
chronous switch M2 are alternately turned on to maintain
the output voltage independent of the direction of inductor
current. In the forced continuous mode, the output can
source or sink current.
However, reverse inductor current from the output to the
input is not desired for certain applications. For these ap-
plications, the CCM pin must be connected to C/10 (pin 4)
with a pull-up resistor to INTVCC (see front page Typical
Application). Therefore, the CCM pin will be pulled lower
than 0.3V for discontinuous conduction mode by the C/10
pin when the output current is low. In this mode, switch
M4 turns off when the inductor current flows negative.
LT3791-1
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Figure 3. Buck Operation (VIN > VOUT)
M2 + M4 M2 + M4 M2 + M4
M1 + M4
37911 F03
M1 + M4M1 + M4
Figure 4. Buck-Boost Operation (VIN ≤ VOUT)
Figure 5. Buck-Boost Operation (VIN ≥ VOUT)
M2 + M4 M2 + M4 M2 + M4
M1 + M4M1 + M4M1 + M4
M1 + M4 M1 + M4 M1 + M4
M1+ M3 M1+ M3 M1+ M3
37911 F04
M2 + M4 M2 + M4 M2 + M4
M1 + M4 M1 + M4 M1 + M4
M1 + M4 M1 + M4 M1 + M4
M1 + M3 M1 + M3 M1 + M3
37911 F05
M1 + M3 M1 + M3
M1 + M4 M1 + M4
M1 + M3
M1 + M4
37911 F06
Figure 6. Boost Operation (VIN < VOUT)
operaTion
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applicaTions inForMaTion
The Typical Application on the front page is a basic LT3791-1
application circuit. External component selection is driven
by the load requirement, and begins with the selection of
RSENSE and the inductor value. Next, the power MOSFETs
are selected. Finally, CIN and COUT are selected. This circuit
can operate up to an input voltage of 60V.
Programming The Switching Frequency
The RT frequency adjust pin allows the user to program the
switching frequency from 200kHz to 700kHz to optimize
efficiency/performance or external component size. Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
may not allow sufficiently high or low duty cycle operation.
Lower frequency operation gives better performance at the
cost of larger external component size. For an appropriate
RT resistor value see Table 1. An external resistor from
the RT pin to GND is required; do not leave this pin open.
Table 1. Switching Frequency vs RT Value
fOSC (kHz) RT (kΩ)
200 147
300 84.5
400 59.0
500 45.3
600 35.7
700 29.4
Frequency Synchronization
The LT3791-1 switching frequency can be synchronized
to an external clock using the SYNC pin. Driving SYNC
with a 50% duty cycle waveform is always a good choice,
otherwise maintain the duty cycle between 10% and 90%.
The falling edge of CLKOUT corresponds to the rising edge
of SYNC thus allowing 2-phase paralleling converters. The
rising edge of CLKOUT turns on switch M3 and the falling
edge of CLKOUT turns on switch M2.
Inductor Selection
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. The inductor
value has a direct effect on ripple current. The maximum
inductor current ripple ΔIL can be seen in Figure 7. This
is the maximum ripple that will prevent subharmonic
oscillation and also regulate with zero load. The ripple
should be less than this to allow proper operation over
all load currents. For a given ripple the inductance terms
in continuous mode are as follows:
LBUCK >VOUT •V
IN(MAX) – VOUT
( )
•100
f•IOUT(MAX) •%Ripple •V
IN(MAX)
LBOOST >V
IN(MIN)2•VOUT – V
IN(MIN)
( )
•10
0
f•IOUT(MAX) •%Ripple •VOUT2
where:
f is operating frequency
% ripple is allowable inductor current ripple
VIN(MIN) is minimum input voltage
VIN(MAX) is maximum input voltage
VOUT is output voltage
IOUT(MAX) is maximum output load current
For high efficiency, choose an inductor with low core
loss. Also, the inductor should have low DC resistance to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturating. To minimize radiated
noise, use a shielded inductor.
RSENSE Selection and Maximum Output Current
RSENSE is chosen based on the required output current. The
current comparator threshold sets the peak of the inductor
BG1, BG2 DUTY CYCLE (%)
50
∆I
L
/I
SENSE(MAX)
(%)
120
160
200
90
37911 F07
80
40
100
140
180
60
20
06055 7065 80 85 95
75
100
BOOST ∆IL/
ISENSE(MAX) LIMIT
BUCK ∆IL/
ISENSE(MAX) LIMIT
Figure 7. Maximum Peak-to-Peak Ripple vs Duty Cycle
LT3791-1
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applicaTions inForMaTion
current in boost operation and the maximum inductor valley
current in buck operation. In boost operation, the maximum
average load current at VIN(MIN) is:
IOUT(MAX _BOOST) =51mV
RSENSE
–∆IL
2
•VIN(MIN)
VOUT
where ΔIL is peak-to-peak inductor ripple current. In buck
operation, the maximum average load current is:
IOUT(MAX _BUCK) =47.5mV
RSENSE
+∆IL
2
The maximum current sensing RSENSE value for the boost
operation is:
RSENSE(MAX) =
2•51mV •V
IN(MIN)
2•ILED •VOUT + ∆IL(BOOST) •VIN(MIN)
The maximum current sensing RSENSE value for the buck
operation is:
RSENSE(MAX) =
2•47.5mV
2•ILED –∆IL(BUCK)
The final RSENSE value should be lower than the calculated
RSENSE(MAX) in both the boost and buck operation. A 20%
to 30% margin is usually recommended.
CIN and COUT Selection
In boost operation, input current is continuous. In buck
operation, input current is discontinuous. In buck opera-
tion, the selection of input capacitor, CIN, is driven by the
need to filter the input square wave current. Use a low ESR
capacitor sized to handle the maximum RMS current. For
buck operation, the input RMS current is given by:
IRMS =ILED2•D+∆IL2
12
•D
The formula has a maximum at VIN = 2VOUT. Note that
ripple current ratings from capacitor manufacturers are
often based on only 2000 hours of life which makes it
advisable to derate the capacitor.
In boost operation, the discontinuous current shifts
from the input to the output, so COUT must be capable
of reducing the output voltage ripple. The effects of ESR
(equivalent series resistance) and the bulk capacitance
must be considered when choosing the right capacitor
for a given output ripple voltage. The steady ripple due to
charging and discharging the bulk capacitance is given by:
∆V
RIPPLE BOOST _ CAP
()
=ILED •VOUT – V
IN(MIN)
( )
COUT •VOUT •f
∆V
RIPPLE BUCK _ CAP
()
≈∆IL
8•f•COUT
where COUT is the output filter capacitor.
The steady ripple due to the voltage drop across the ESR
is given by:
ΔVBOOST(ESR) = ILED • ESR
ΔVBUCK(ESR) = ILED • ESR
Multiple capacitors placed in parallel may be needed to meet
the ESR and RMS current handling requirements. Output
capacitors are also used for stability for the LT3791-1. A
good starting point for output capacitors is seen in the
Typical Applications circuits. Ceramic capacitors have
excellent low ESR characteristics but can have a high
voltage coefficient and are recommended for applications
less than 100W. Capacitors available with low ESR and
high ripple current ratings, such as OS-CON and POSCAP
may be needed for applications greater than 100W.
Programming VIN UVLO and OVLO
The falling UVLO value can be accurately set by the resistor
divider R1 and R2. A small 3µA pull-down current is active
when the EN/UVLO is below the threshold. The purpose
of this current is to allow the user to program the rising
hysteresis. The following equations should be used to
determine the resistor values:
V
IN(UVLO–)=1.2 •
R1+R2
R2
V
IN(UVLO+)=3µA •R1+1.215 •R1+R2
R2
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Figure 8. Resistor Connection to Set VIN UVLO and
OVLO Thresholds
LT3791-1
V
IN
R1 R3
R4
R2
37911 F08
EN/UVLO
OVLO
The rising OVLO value can be accurately set by the resis-
tor divider R3 and R4. The following equations should be
used to determine the resistor values:
V
IN(OVLO+)=3•
R3+R4
R4
V
IN(OVLO–)=2.925 •R3+R4
R4
applicaTions inForMaTion
Table 2. V(ISP-ISN) Threshold vs CTRL
VCTRL (V) V(ISP-ISN) (mV)
1.1 90
1.15 94.5
1.2 98
1.25 99.5
1.3 100
When VCTRL is higher than 1.3V, the output current is
regulated to:
IOUT =
100mV
R
OUT
The CTRL pin should not be left open (tie to VREF if not
used). The CTRL pin can also be used in conjunction with
a thermistor to provide overtemperature protection for
the output load, or with a resistor divider to VIN to reduce
output power and switching current when VIN is low.
The presence of a time varying differential voltage signal
(ripple) across ISP and ISN at the switching frequency
is expected. The amplitude of this signal is increased by
high output load current, low switching frequency and/
or a smaller value output filter capacitor. Some level of
ripple signal is acceptable: the compensation capacitor
on the VC pin filters the signal so the average difference
between ISP and ISN is regulated to the user-programmed
value. Ripple voltage amplitude (peak-to-peak) in excess
of 20mV should not cause mis-operation, but may lead
to noticeable offset between the average value and the
user-programmed value.
ISMON
The ISMON pin provides a linear indication of the current
flowing through the output. The equation for VISMON is
V(ISP–ISN) • 10. This pin is suitable for driving an ADC input,
however, the output impedance of this pin is 12.5kΩ so
care must be taken not to load this pin.
Programming Input Current Limit
The LT3791-1 has a standalone current sense amplifier.
It can be used to limit the input current. The input current
limit is calculated by the following equation:
Programming Output Current
The output current is programmed by placing an appro-
priate value current sense resistor, ROUT, in series with
the output load. The voltage drop across ROUT is (Kelvin)
sensed by the ISP and ISN pins. The CTRL pin should
be tied to a voltage higher than 1.2V to get the full-scale
100mV (typical) threshold across the sense resistor. The
CTRL pin can also be used to adjust the output current,
although relative accuracy decreases with the decreasing
sense threshold. When the CTRL pin voltage is less than
1V, the output current is:
IOUT =
V
CTRL
– 200mV
ROUT •10
When the CTRL pin voltage is between 1.1V and 1.3V the
output current varies with VCTRL, but departs from the
equation above by an increasing amount as VCTRL volt-
age increases. Ultimately, when VCTRL > 1.3V the output
current no longer varies. The typical V(ISP-ISN) threshold
vs VCTRL is listed in Table 2.
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applicaTions inForMaTion
IIN =
50mV
R
IN
For loop stability a lowpass RC filter is needed. For
most applications, a 50Ω resistor and 470nF capacitor
is sufficient.
Table 3
RIN (mΩ) ILIMIT (A)
20 2.5
15 3.3
12 4.2
10 5.0
6 8.3
5 10.0
4 12.5
3 16.7
2 25
IVINMON
The IVINMON pin provides a linear indication of the current
flowing through the input. The equation for VIVINMON is
V(IVINP-IVINN) • 20. This pin is suitable for driving an ADC
input, however, the output impedance of this pin is 12.5kΩ
so care must be taken not to load this pin.
Programming Output Voltage (Constant Voltage
Regulation)
For a voltage regulator, the output voltage can be set by
selecting the values of R5 and R6 (see Figure 9) according
to the following equation:
VOUT =1.2 •
R5+R6
R6
Dimming Control
There are two methods to control the current source for
dimming using the LT3791-1. One method uses the CTRL
pin to adjust the current regulated in the output. A second
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely pro-
grammed average current. To make PWM dimming more
accurate, the switch demand current is stored on the VC
node during the quiescent phase when PWM is low. This
feature minimizes recovery time when the PWM signal goes
high. To further improve the recovery time a disconnect
switch may be used in the output current path to prevent
the ISP node from discharging during the PWM signal low
phase. The minimum PWM on- or off-time is affected by
choice of operating frequency and external component
selection. The best overall combination of PWM and
analog dimming capabilities is available if the minimum
PWM pulse is at least six switching cycles and the PWM
pulse is synchronized to the SYNC signal.
SHORT Pin
The LT3791-1 provides an open-drain status pin,
SHORT, which pulls low when the FB pin is below 400mV.
The only time the FB pin will be below 400mV is during
start-up or if the output is shorted. During start-up the
LT3791-1 ignores the voltage on the FB pin until the soft-
start capacitor reaches 1.75V. To prevent false tripping
after startup, a large enough soft-start capacitor must
be used to allow the output to get up to approximately
40% to 50% of the final value.
C/10 Pin
The LT3791-1 provides an open-drain status pin, C/10,
which pulls low when the FB pin is above 1.15V and the
voltage across V(ISP-ISN) is less than 10mV. For voltage
regulator applications with both ISP and ISN pins tied
together to the output (i.e., no output current sense and
limit), the C/10 pin provides a power good flag. For battery
charger applications with output current sense and limit,
the C/10 provides a C/10 charge termination flag.
Figure 9. Resistor Connection for Constant Output
Voltage Regulation
LT3791-1
V
OUT
R5
R6
37911 F09
FB
LT3791-1
19
37911fb
For more information www.linear.com/LT3791-1
Soft-Start
Soft-start reduces the input power sources’ surge currents
by gradually increasing the controller’s current limit (pro-
portional to an internally buffered clamped equivalent of
VC). The soft-start interval is set by the soft-start capacitor
selection according to the following equation
tSS =
1.2V
14µA
•CSS
A 100k resistor must be placed between SS and VREF for
the LT3791-1. This 100k resistor also contributes the extra
SS charge current. Make sure CSS is large enough when
there is loading during start-up.
Loop Compensation
The LT3791-1 uses an internal transconductance error
amplifier whose VC output compensates the control loop.
The external inductor, output capacitor and the compensa-
tion resistor and capacitor determine the loop stability.
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor and
capacitor at VC are set to optimize control loop response
and stability. For typical applications, a 10nF compensation
capacitor at VC is adequate, and a series resistor should
always be used to increase the slew rate on the VC pin to
maintain tighter regulation of output current during fast
transients on the input supply of the converter.
Power MOSFET Selections and Efficiency
Considerations
The LT3791-1 requires four external N-channel power
MOSFETs, two for the top switches (switch M1 and M4,
shown in Figure 1) and two for the bottom switches (switch
M2 and M3 shown in Figure 1). Important parameters for
the power MOSFETs are the breakdown voltage, VBR(DSS),
threshold voltage, VGS(TH), on-resistance, RDS(ON), reverse
transfer capacitance, CRSS, and maximum current, IDS(MAX).
The drive voltage is set by the 5V INTVCC supply. Con-
sequently, logic-level threshold MOSFETs must be used
in LT3791-1 applications. If the input voltage is expected
to drop below the 5V, then sub-logic threshold MOSFETs
should be considered.
In order to select the power MOSFETs, the power dis-
sipated by the device must be known. For switch M1, the
maximum power dissipation happens in boost operation,
when it remains on all the time. Its maximum power dis-
sipation at maximum output current is given by:
P
M1(BOOST) =ILED •VOUT
V
IN
2
•ρT•RDS(ON)
where ρT is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically 0.4%/°C as shown in Figure10.
For a maximum junction temperature of 125°C, using a
value of ρT = 1.5 is reasonable.
Switch M2 operates in buck operation as the synchronous
rectifier. Its power dissipation at maximum output current
is given by:
P
M2(BUCK) =
V
IN
– V
OUT
V
IN
•ILED2•ρT•RDS(O
N)
Switch M3 operates in boost operation as the control
switch. Its power dissipation at maximum current is
given by:
P
M3(BOOST) =
V
OUT
– V
IN
( )
•V
OUT
V
IN2
•ILED2•ρT•RDS(O
N)
+k•VOUT3•ILED
V
IN
•CRSS •f
where CRSS is usually specified by the MOSFET manufac-
turers. The constant k, which accounts for the loss caused
by reverse-recovery current, is inversely proportional to
the gate drive current and has an empirical value of 1.7.
For switch M4, the maximum power dissipation happens
in boost operation, when its duty cycle is higher than
50%. Its maximum power dissipation at maximum output
current is given by:
P
M4(BOOST) =V
IN
V
OUT
•ILED •VOUT
V
IN
2
•ρT•RDS(ON)
For the same output voltage and current, switch M1 has
the highest power dissipation and switch M2 has the low-
est power dissipation unless a short occurs at the output.
applicaTions inForMaTion
LT3791-1
20
37911fb
For more information www.linear.com/LT3791-1
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
TJ = TA + P • RTH(JA)
The RTH(JA) to be used in the equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the case to the ambient temperature (RTH(JC)). This value
of TJ can then be compared to the original, assumed value
used in the iterative calculation process.
INTVCC pin regulator can supply a peak current of 67mA
and must be bypassed to ground with a minimum of 4.7µF
ceramic capacitor or low ESR electrolytic capacitor. An
additional 0.1µF ceramic capacitor placed directly adjacent
to the INTVCC and PGND IC pins is highly recommended.
Good bypassing is necessary to supply the high transient
current required by MOSFET gate drivers.
Higher input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LT3791-1 to be
exceeded. The system supply current is normally dominated
by the gate charge current. Additional external loading of
the INTVCC also needs to be taken into account for the
power dissipation calculations. Power dissipation for the
IC in this case is VIN • IINTVCC, and overall efficiency is
lowered. The junction temperature can be estimated by
using the equations given
TJ = TA + (PD • θJA)
where θJA (in °C/W) is the package thermal impedance.
For example, a typical application operating in continuous
current operation might draw 24mA from a 24V supply:
TJ = 70°C + 24mA • 24V • 28°C/W = 86°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked
operating in continuous mode at maximum VIN.
Top Gate (TG) MOSFET Driver Supply (C1, D1, C2, D2)
The external bootstrap capacitors C1 and C2 connected
to the BST1 and BST2 pins supply the gate drive voltage
for the topside MOSFET switches M1 and M4. When the
top MOSFET switch M1 turns on, the switch node SW1
rises to VIN and the BST1 pin rises to approximately VIN +
INTVCC. When the bottom MOSFET switch M2 turns on, the
switch node SW1 drops low and the bootstrap capacitor
C1 is charged through D1 from INTVCC. When the bottom
MOSFET switch M3 turns on, the switch node SW2 drops
low and the bootstrap capacitor C2, is charged through D2
from INTVCC. The bootstrap capacitors C1 and C2 need to
store about 100 times the gate charge required by the top
MOSFET switch M1 and M4. In most applications a 0.1µF
to 0.47µF, X5R or X7R ceramic capacitor is adequate.
applicaTions inForMaTion
Figure 10. Normalized RDS(ON) vs Temperature
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON-RESISTANCE (Ω)
1.0
1.5
150
37911 F10
0.5
0050 100
2.0
Optional Schottky Diode (D3, D4) Selection
The Schottky diodes D3 and D4 shown in the Typical Ap-
plications section conduct during the dead time between
the conduction of the power MOSFET switches. They
are intended to prevent the body diode of synchronous
switches M2 and M4 from turning on and storing charge
during the dead time. In particular, D4 significantly reduces
reverse-recovery current between switch M4 turn-off and
switch M3 turn-on, which improves converter efficiency
and reduces switch M3 voltage stress. In order for the
diode to be effective, the inductance between it and the
synchronous switch must be as small as possible, mandat-
ing that these components be placed adjacently.
INTVCC Regulator
An internal P-channel low dropout regulator produces 5V
at the INTVCC pin from the VIN supply pin. INTVCC powers
the drivers and internal circuitry within the LT3791-1. The
LT3791-1
21
37911fb
For more information www.linear.com/LT3791-1
Efficiency Considerations
The power efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in circuits produce losses, four main sources
account for most of the losses in LT3791-1 circuits:
1. DC I2R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
2. Transition loss. This loss arises from the brief amount
of time switch M1 or switch M3 spends in the saturated
region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is significant at input voltages above 20V and can be
estimated from:
Transition Loss ≈ 2.7 • VIN2 • IOUT • CRSS • f
where CRSS is the reverse-transfer capacitance.
3. INTVCC current. This is the sum of the MOSFET driver
and control currents.
4. CIN and COUT loss. The input capacitor has the difficult
job of filtering the large RMS input current to the regu-
lator in buck operation. The output capacitor has the
difficult job of filtering the large RMS output current
in boost operation. Both CIN and COUT are required to
have low ESR to minimize the AC I2R loss and sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
5. Other losses. Schottky diode D3 and D4 are respon-
sible for conduction losses during dead time and light
load conduction periods. Inductor core loss occurs
predominately at light loads. Switch M3 causes reverse
recovery current loss in boost operation.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in the input
current, then there is no change in efficiency.
PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
n The PGND ground plane layer should not have any traces
and it should be as close as possible to the layer with
power MOSFETs.
n Place CIN, switch M1, switch M2 and D1 in one compact
area. Place COUT, switch M3, switch M4 and D2 in one
compact area.
n Use immediate vias to connect the components (in-
cluding the LT3791-1’s SGND and PGND pins) to the
ground plane. Use several large vias for each power
component.
n Use planes for VIN and VOUT to maintain good voltage
filtering and to keep power losses low.
n Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(VIN or PGND).
n Separate the signal and power grounds. All small-signal
components should return to the SGND pin at one point,
which is then tied to the PGND pin close to the sources
of switch M2 and switch M3.
n Place switch M2 and switch M3 as close to the control-
ler as possible, keeping the PGND, BG and SW traces
short.
n Keep the high dV/dT SW1, SW2, BST1, BST2, TG1 and
TG2 nodes away from sensitive small-signal nodes.
applicaTions inForMaTion
LT3791-1
22
37911fb
For more information www.linear.com/LT3791-1
applicaTions inForMaTion
n The path formed by switch M1, switch M2, D1 and the
CIN capacitor should have short leads and PC trace
lengths. The path formed by switch M3, switch M4, D2
and the COUT capacitor also should have short leads
and PC trace lengths.
n The output capacitor (–) terminals should be connected
as close as possible to the (–) terminals of the input
capacitor.
n Connect the top driver bootstrap capacitor, C1, closely
to the BST1 and SW1 pins. Connect the top driver
bootstrap capacitor, C2, closely to the BST2 and SW2
pins.
n
Connect the input capacitors, CIN, and output capacitors,
COUT, closely to the power MOSFETs. These capaci-
tors carry the MOSFET AC current in boost and buck
operation.
n Route SNSN and SNSP leads together with minimum
PC trace spacing. Avoid sense lines pass through noisy
areas, such as switch nodes. Ensure accurate current
sensing with Kelvin connections at the SENSE resistor.
n Connect the VC pin compensation network close to the
IC, between VC and the signal ground pins. The capaci-
tor helps to filter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
n Connect the INTVCC bypass capacitor, CVCC, close to the
IC, between the INTVCC and the power ground pins. This
capacitor carries the MOSFET drivers’ current peaks. An
additional 0.1µF ceramic capacitor placed immediately
next to the INTVCC and PGND pins can help improve
noise performance substantially.
LT3791-1
23
37911fb
For more information www.linear.com/LT3791-1
98% Efficient 60W (12V 5A) Voltage Regulator Runs Down to 3V VIN
Typical applicaTions
Efficiency vs Load Current Maximum Output Current vs VIN
37911 TA02b
LOAD CURRENT (A)
0 1
EFFICIENCY (%)
90
95
100
80
70
50
85
75
55
60
65
2 3 4
5
VIN = 3V
VIN = 6V
VIN = 12V
VIN = 28V
VIN = 48V
INPUT VOLTAGE (V)
3
0
MAXIMUM OUTPUT CURRENT (A)
1
2
3
4
6
57 9 20
37911 TA02c
404 68 10 30 50
60
5
D4
COUT2
100µF
35V
+
VIN
3V TO 55V
STARTS UP
FROM 5.5V
INTVCC
TG1
BG1
SNSP
SNSN
BST1
BST2
BG2
PGND
SW2
TG2
RT
LT3791-1
SWI
C3
1µF
C7
470nF IVINP
VIN
IVINN
IVINMON
ISMON
CLKOUT
PWMOUT
TEST1
EN/UVLO
OVLO
VREF
PWM
CTRL
R8
84.5k
300kHz
VC
SYNCSS SGND
R1
866k
R2
576k
RFAULT
100k
R3
1M
R4
57.6k
R7
50Ω
R
IN
0.003Ω
C8
0.1µF
CSS
33nF CC
22nF
37911 TA02a
RSENSE
0.004Ω
ISP
ISN
FB
C1
0.1µF
L1, 6.8µH
C2
0.1µF
D2D1
M2
M1
M3
M4
CVCC
4.7µF
COUT
10µF
25V
×3
CIN
4.7µF
100V
×4
ROUT
0.015Ω V
OUT
12V
5A
VO
R5
73.2k
R6
8.06k
RC
5.1k
D1, D2: NXP BAT46WJ
D3: IRF 10BQ060
D4: IRF 10BQ040
D5, D6: DIODES INC. BAT46W
L1: WURTH ELEKTRONIK WE-HCI 7443556680
M1, M2: RENASAS RJK0651DPB 60VDS
M3, M4: VISHAY SiR424DP 40VDS
COUT2: SUNCON 35HVT100M
D6
VO
D5
D3
SHORT
C/10
CCM
INTVCC
R9
100k
R10
200k
LT3791-1
24
37911fb
For more information www.linear.com/LT3791-1
4.75
(.187) REF
FE38 (AA) TSSOP REV C 0910
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
119
20
REF
9.60 – 9.80*
(.378 – .386)
38
1.20
(.047)
MAX
0.05 – 0.15
(.002 – .006)
0.50
(.0196)
BSC 0.17 – 0.27
(.0067 – .0106)
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.315 ±0.05
0.50 BSC
4.50 REF
6.60 ±0.10
1.05 ±0.10
4.75 REF
2.74 REF
2.74
(.108)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
FE Package
38-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1772 Rev C)
Exposed Pad Variation AA
package DescripTion
Please refer to http://www.linear.com/product/LT3791-1#packaging for the most recent package drawings.
LT3791-1
25
37911fb
For more information www.linear.com/LT3791-1
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 12/13 Clarified TG1, TG2, tOFF(MIN) parameters
Clarified Typical Application schematic
4
23, 26
B 05/17 Clarified last paragraph on the Description
Clarified FB pin input bias current limits
Clarified TG1, TG2, tOFF(MIN) limits
1
3
4
LT3791-1
26
37911fb
For more information www.linear.com/LT3791-1
LT 0517 REV B • PRINTED IN USA
www.linear.com/LT3791-1
LINEAR TECHNOLOGY CORPORATION 2012
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT3791 60V, 4-Switch, Synchronous Buck-Boost LED Driver
Controller
VIN: 4.7V to 60V, VOUT Range: 1.2V to 60V, True Color PWM™, Analog,
ISD < 1µA, TSSOP-38E Packages
LT C
®
3780 High Efficiency, Synchronous, 4-Switch Buck-Boost
Controller
VIN: 4V to 36V, VOUT Range: 0.8V to 30V, ISD < 55µA, SSOP-24, QFN-32
Packages
LTC3789 High Efficiency, Synchronous, 4-Switch Buck-Boost
Controller
VIN: 4V to 38V, VOUT Range: 0.8V to 38V, ISD < 40µA, 4mm × 5mm QFN-28,
SSOP-28 Packages
LT3755/LT3755-1
LT3755-2
High Side 60V, 1MHz LED Controller with T
rue Color
3000:1 PWM Dimming
VIN: 4.5V to 40V, VOUT Range: 5V to 60V, 3000:1 True Color PWM, Analog,
ISD < 1µA, 3mm × 3mm QFN-16, MSOP-16E Packages
LT3756/LT3756-1
LT3756-2
High Side 100V, 1MHz LED Controller with T
rue Color
3000:1 PWM Dimming
VIN: 6V to 100V, VOUT Range: 5V to 100V, 3000:1 True Color PWM, Analog,
ISD < 1µA, 3mm × 3mm QFN-16, MSOP-16E Packages
LT3596 60V, 300mA Step-Down LED Driver VIN: 6V to 60V, VOUT Range: 5V to 55V, 10000:1 True Color PWM, Analog,
ISD < 1µA, 5mm × 8mm QFN-52 Package
LT3743 Synchronous Step-Down 20A LED Driver with
Thee-State LED Current Control
VIN: 5.5V to 36V, VOUT Range: 5.5V to 35V, 3000:1 True Color PWM, Analog,
ISD < 1µA, 4mm × 5mm QFN-28, TSSOP-28E Packages
2.5A Buck-Boost 36V SLA Battery Charger
50Ω
470nF
PV
IN
9V TO 58V
INTVCC
TG1
BG1
SNSP
SNSN
BST1
BST2
BG2
PGND
SW2
TG2
RT
LT3791-1
SWI
RIN
0.003Ω
SHORT
IVINN
IVINP
1µF
VIN
IVINMON
PWMOUT
ISMON
CLKOUT
EN/UVLO
OVLO
INTVCC
200k
VREF
PWM
CTRL
CHARGE CURRENT CONTROL
SGND
84.5k
300kHz
D1, D2: BAT46WJ
L1: COILCRAFT SER2915L-103K
M1-M4: RENESAS RJK0651DPB
M5: NXP NX7002AK
CIN2: NIPPON CHEMI-CON EMZA630ADA101MJA0G
C
OUT2
: SUNCON 50HVT220M
VC
SYNCSS
C/10
CCM
20k
50Ω
INTVCC
57.6k
30.9k
499k
0.1µF
22nF
22nF
1µF
37911 TA03
CIN2
100µF
63V
RSENSE
0.004Ω
ISP
ISN
FB
RBAT
0.04Ω
2.5A
CHARGE
36V
SLA BATTERY
AGM TYPE
41V FLOAT
44V CHARGE
AT 25°C
0.1µF
0.1µF
L1 10µH
4.7µF
M2
M1
M3
M4
D2D1
C
OUT2
220µF
50V
COUT
4.7µF
50V
×2
1.00M
30.1k
402k
M5
2.2k
CIN
4.7µF
100V
×2
+
+
+
TEST1
100k