CLC1200 Instrumentation Amplifier FE ATU R E S 2.3V to 18V supply voltage range Gain range of 1 to 10,000 Gain set with one external resistor 125V maximum input offset voltage 0.1V/C input offset drift 700kHz bandwidth at G = 1 1.2V/s slew rate 90dB minimum CMRR at G = 10 2.2mA maximum supply current 6.6nV/Hz input voltage noise 70nV/Hz output voltage noise 0.2V pp input noise (0.1Hz to 10Hz) DIP-8 or Pb-free SOIC-8 General Description The CLC1200 is a low power, general purpose instrumentation amplifier with a gain range of 1 to 10,000. The CLC1200 is offered in 8-lead SOIC or DIP packages and requires only one external gain setting resistor making it smaller and easier to implement than discrete, 3-amp designs. While consuming only 2.2mA of supply current, the CLC1200 offers a low 6.6nV/Hz input voltage noise and 0.2Vpp noise from 0.1Hz to 10Hz. The CLC1200 offers a low input offset voltage of 125V that only varies 0.1V/C over it's operating temperature range of -40C to +85C. The CLC1200 also features 50ppm maximum nonlinearity. These features make it well suited for use in data acquisition systems. A P P LICATION S Bridge amplifier Weigh scales Thermocouple amplifier ECG and medical instrumentation MRI (Magnetic Resonance Imaging) Patient monitors Transducer interface Data acquisition systems Strain gauge amplifier Industrial process controls Ordering Information - back page Competitive Plot Typical Application 3 2 +VS 1 7 CLC1200 RG VOUT 6 5 8 +Input Competitor A 1 2 Normalized Gain (dB) -Input Load 4 Reference 3 0 -1 -3 -4 -5 -VS CLC1200 -2 -6 G=1 VS = 15V VOUT = 0.2Vpp RL = 2k -7 0.0001 To Power Supply Ground 0.001 0.01 0.1 1 10 Frequency (MHz) Thermocouple Amplifier (c) 2008-2014 Exar Corporation 1 / 15 exar.com/CLC1200 Rev 2E CLC1200 Absolute Maximum Ratings Operating Conditions Stresses beyond the limits listed below may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Supply Voltage Range........................ 2.3V to 18V (4.6V to 36V) Gain Range................................................................... 1 to 10,000 Operating Temperature Range..................................-40C to 85C Junction Temperature............................................................ 150C Storage Temperature Range....................................-65C to 150C Supply Voltage.........................................................................18V Lead Temperature (Soldering, 10s).......................................260C Input Voltage Range.............................................................. VS V Differential Input Voltage (G = 1 to 10)...................................... 25V Package Thermal Resistance Differential Input Voltage (G > 10)............... 0.05 (RG + 800) +1 V JA (DIP-8).........................................................................100C/W Load Resistance (min)................................................................. 1 JA (SOIC-8)......................................................................150C/W Package thermal resistance (JA), JEDEC standard, multi-layer test boards, still air. ESD Protection SOIC-8 (HBM)........................................................................ 1.5kV ESD Rating for HBM (Human Body Model). (c) 2008-2014 Exar Corporation 2 / 15 exar.com/CLC1200 Rev 2E CLC1200 Electrical Characteristics TA = 25C, VS = 15V, RL = 2k to GND; unless otherwise noted. Gain = 1 + (49.4k/RG); Total RTI Error = VOSI + (VOSO/G) Symbol Parameter Conditions Min Typ Max Units Gain Gain Range 1 Gain Error (1) -0.1 0.1 % G = 10, VOUT = 10V -0.375 0.375 % G = 100, VOUT = 10V -0.375 0.375 % -0.8 0.8 % 10 50 ppm G = 1 - 100, VOUT = -10V to 10V, RL = 2k 10 95 G=1 <10 ppm/C G>1 <-50 ppm/C G = 1,000, VOUT = 10V G = 1 - 100, VOUT = -10V to 10V, RL = 10k Gain Nonlinearity Gain vs. Temperature 10,000 G = 1, VOUT = 10V ppm Reference Gain Error VS = 16.5V -0.03 0.03 % Input Offset Voltage VS = 4.5V to 16.5V -125 125 V Average Temperature Coefficient VS = 4.5V to 16.5V Output Offset Voltage VS = 4.5V to 16.5V, G = 1 Average Temperature Coefficient VS = 4.5V to 16.5V (1) Voltage Offset VOSI VOSO PSR Offset Referred to the Input vs. Supply 0.1 -1500 200 V/C 1500 V 2.5 V/C G = 1, VS = 2.3V to 18V 80 100 dB G = 10, VS = 2.3V to 18V 95 120 dB G = 100, VS = 2.3V to 18V 110 140 dB G = 1000, VS = 2.3V to 18V 110 140 dB -2 0.5 Input Current IB IOS Input Bias Current VS = 16.5V Average Temperature Coefficient VS = 16.5V Input Offset Current VS = 16.5V 2 3 -1 nA pA/C 1 nA Input Input Impedance IVR CMRR Input Voltage Range (2) Common-Mode Rejection Ratio Differential 10, 2 Common-Mode 10, 2 G, pF G, pF VS = 4.5V, G = 1 -VS + 1.9 +VS - 1.2 VS = 16.5V, G = 1 -VS + 1.9 G = 1, VS = 16.5V 70 90 dB G = 10, VS = 16.5V 90 110 dB G = 100, VS = 16.5V 108 130 dB G = 1000, VS = 16.5V 108 130 dB +VS - 1.4 V V Output VOUT Output Swing ISC Short Circuit Current VS = 2.3V to 4.5V -VS + 1.1 VS = 18V, G = 1 -VS + 1.4 +VS - 1.2 +VS - 1.2 V V 20 mA G=1 700 kHz G = 10 400 kHz G = 100 100 kHz Dynamic Performance BW-3dB Small Signal -3dB Bandwidth SR Slew Rate tS Settling Time to 0.01% G = 1000 12 kHz 1.2 V/s 5V step, G = 1 to 100 13 s 5V step, G = 1000 110 s G = 10, VS = 15V (c) 2008-2014 Exar Corporation 3 / 15 0.6 exar.com/CLC1200 Rev 2E CLC1200 Electrical Characteristics continued TA = 25C, VS = 15V, RL = 2k to GND; unless otherwise noted. Gain = 1 + (49.4k/RG); Total RTI Error = VOSI + (VOSO/G) Symbol Parameter Conditions Min Typ Max Units Noise eni Input Voltage Noise 1kHz, G = 1000, VS = 15V 6.6 13 nV/Hz eno Output Voltage Noise 1kHz, G = 1, VS = 15V 70 100 nV/Hz G = 1, 0.1Hz to 10Hz 5 enpp Peak-to-Peak Noise (RTI) G = 10, 0.1Hz to 10Hz, VS = 15V G = 100, 0.1Hz to 10Hz, VS = 15V 0.2 Vpp 0.8 Vpp 0.4 Vpp in Current Noise f = 1kHz 100 fA/Hz inpp Peak-to-Peak Current Noise 0.1Hz to 10Hz 10 pApp Reference Input RIN Input Resistance IIN Input Current 20 VS = 16.5V 50 Voltage Range -VS + 1.6 Gain to Output k 60 A +VS - 1.6 V 10.0001 Power Supply VS Operating Range IS Supply Current 2.3 VS = 16.5V 1.3 18 V 2.2 mA Notes: 1. Nominal reference voltage gain is 1.0 2. Input voltage range = CMV + (G VDIFF)/2 (c) 2008-2014 Exar Corporation 4 / 15 exar.com/CLC1200 Rev 2E CLC1200 CLC1200 Pin Configurations CLC1200 Pin Assignments SOIC-8, DIP-8 SOIC-8, DIP-8 RG 1 -IN1 2 +IN1 3 -Vs 4 + Pin No. Pin Name Description 8 RG 1, 8 RG RG sets gain 2 -IN Negative input 7 +Vs 3 +IN Positive input 6 OUT 4 -VS Negative supply 5 REF Output is referred to the REF pin potential 5 REF 6 OUT Output 7 +VS Positive supply (c) 2008-2014 Exar Corporation 5 / 15 exar.com/CLC1200 Rev 2E CLC1200 Typical Performance Characteristics TA = 25C, VS = 15V, RL = 2k to GND; unless otherwise noted. Input Offset Distribution (typical) Input Bias Current Distribution (typical) Input Offset Current Distribution (typical) (c) 2008-2014 Exar Corporation 6 / 15 exar.com/CLC1200 Rev 2E CLC1200 Typical Performance Characteristics TA = 25C, VS = 15V, RL = 2k to GND; unless otherwise noted. Gain vs. Frequency Output Voltage Swing vs. VS 70 +VS - 1.5 60 G = 1000 Output Voltage Swing (V) Gain (dB) RL=2k 1 50 40 G = 10 G = 100 30 20 G = 10 10 0 RL=10k 0.5 0 -0.5 G=1 RL=10k -1 -10 Referred to Supply Voltages -VS +-1.5 -20 0.0001 0.001 0.01 0.1 1 0 10 5 10 15 20 Supply Voltage (+/- V) Frequency (MHz) Input Voltage Range vs. VS +VS-- 2 RL=2k Output Voltage Swing vs. RL 30 10 GG= =10 Output Voltage Swing (Vpp) Input Voltage Swing (V) Referred to Supply Voltages 1 20 0 10 -1 -VSS++-2 -V 0 5 10 15 0 0.01 20 0.1 Large Signal Pulse Response (G = 1) 10 Large Signal Settling Time (G = 1) 0.1 7.5 G = 1, RL=2K G = 1, 5V Step 0.09 5 0.08 Output Settling (%) Output Voltage (V) 1 Load Resistance (k) Supply Voltage (+/- V) 2.5 0 -2.5 0.07 0.06 0.05 0.04 0.03 0.02 -5 0.01 -7.5 -0.01 0 0 20 40 60 80 0 100 (c) 2008-2014 Exar Corporation 5 10 15 20 25 30 35 40 45 Time (us) Time (us) 7 / 15 exar.com/CLC1200 Rev 2E CLC1200 Typical Performance Characteristics TA = 25C, VS = 15V, RL = 2k to GND; unless otherwise noted. Large Signal Pulse Response (G = 10) Large Signal Settling Time (G = 10) 0.1 7.5 G = 10, RL=2K 5 0.08 Output Settling (%) Output Voltage (V) G = 10, 5V Step 0.09 2.5 0 -2.5 0.07 0.06 0.05 0.04 0.03 0.02 -5 0.01 -7.5 -0.01 0 0 20 40 60 80 0 100 5 10 15 Large Signal Pulse Response (G = 100) 25 30 35 40 45 Large Signal Settling Time (G = 100) 0.1 7.5 G = 100, RL=2K G = 100, 5V Step 0.09 5 0.08 Output Settling (%) Output Voltage (V) 20 Time (us) Time (us) 2.5 0 -2.5 0.07 0.06 0.05 0.04 0.03 0.02 0.01 -5 0 -0.01 -7.5 0 20 40 60 80 0 100 5 10 15 Large Signal Pulse Response (G = 1000) 25 30 35 40 45 Large Signal Settling Time (G = 1000) 0.1 7.5 G = 1000, RL=2K G = 1000, 5V Step 0.09 5 0.08 Output Settling (%) Output Voltage (V) 20 Time (us) Time (us) 2.5 0 -2.5 0.07 0.06 0.05 0.04 0.03 0.02 -5 0.01 -7.5 -0.01 0 0 200 400 600 800 0 1000 Time (us) (c) 2008-2014 Exar Corporation 50 100 150 200 250 300 350 400 450 Time (us) 8 / 15 exar.com/CLC1200 Rev 2E CLC1200 Typical Performance Characteristics TA = 25C, VS = 15V, RL = 2k to GND; unless otherwise noted. Small Signal Pulse Response (G = 1) Small Signal Pulse Response (G = 10) 0.1 0.1 G = 1, RL=2K, CL=100pF G = 10, RL=2K, CL=100pF 0.05 Output Voltage (V) Output Voltage (V) 0.05 0 -0.05 0 -0.05 -0.1 -0.1 0 20 40 60 80 100 0 20 Time (us) 40 60 Small Signal Pulse Response (G = 100) 100 Small Signal Pulse Response (G = 1000) 0.1 0.1 G = 100, RL=2K, CL=100pF G = 1000, RL=2K, CL=100pF 0.05 Output Voltage (V) 0.05 Output Voltage (V) 80 Time (us) 0 -0.05 0 -0.05 -0.1 -0.1 0 20 40 60 80 100 0 Time (us) (c) 2008-2014 Exar Corporation 100 200 300 400 500 Time (us) 9 / 15 exar.com/CLC1200 Rev 2E CLC1200 Typical Competitive Comparison Plots TA = 25C, VS = 15V, RL = 2k, Exar evaluation board; unless otherwise noted. Frequency Response (G = 1) Frequency Response (G = 10) 1 3 Competitor A 2 0 Competitor A Normalized Gain (dB) Normalized Gain (dB) 1 0 -1 CLC1200 -2 -3 -4 -5 -6 G=1 VS = 15V VOUT = 0.2Vpp CLC1200 -2 -3 -4 G = 10 VS = 15V -5 VOUT = 0.2Vpp -6 RL = 2k -7 0.0001 -1 0.001 0.01 0.1 1 RL = 2k -7 0.0001 10 0.001 0.01 Frequency Response (G = 100) 0 CLC1200 -1 Normalized Gain (dB) Normalized Gain (dB) CLC1200 -2 -3 -6 Competitor A G = 100 VS = 15V -1 -2 Competitor A -3 -4 -5 G = 1,000 VS = 15V VOUT = 0.2Vpp VOUT = 0.2Vpp -6 RL = 2k -7 0.0001 0.001 0.01 0.1 1 RL = 2k -7 0.0001 10 0.001 0.01 Frequency (MHz) 0.1 1 10 65 75 Frequency (MHz) Small Signal Pulse Response (G = 1) Small Signal Pulse Response (G = 10) 0.150 0.125 Competitor A Competitor A 0.125 0.100 0.100 0.075 Output Amplitude (V) Output Amplitude (V) 10 1 0 -5 1 Frequency Response (G = 1000) 1 -4 0.1 Frequency (MHz) Frequency (MHz) CLC1200 0.050 0.025 0.000 VOUT = 0.1Vpp -0.025 CLC1200 0.075 0.050 0.025 VOUT = 0.1Vpp 0.000 CL = 100pF CL = 100pF -0.025 -0.050 25 35 45 55 65 25 75 (c) 2008-2014 Exar Corporation 35 45 55 Time (us) Time (us) 10 / 15 exar.com/CLC1200 Rev 2E CLC1200 Application Information Basic Information 1% RG () Caclulated Gain 0.1% RG () Calculated Gain 49.9k 1.990 49.3k 2.002 12.4k 4.984 12.4k 4.984 5.49k 9.998 5.49k 9.998 2.61k 19.93 2.61k 19.93 1.00k 50.40 1.01k 49.91 499 100.0 499 100.0 The CLC1200 is a monolithic instrumentation amplifier based on the classic three op amp solution, refer to the Functional Block Diagram shown in Figure 1. The CLC1200 produces a single-ended output referred to the REF pin potential. + -IN - - RG REF + Figure 1: Functional Block Diagram The internal resistors are trimmed which allows the gain to be accurately adjusted with one external resistor RG. 49.4k 49.4k + 1; RG = RG G-1 199.4 98.8 501.0 49.9 991.0 49.3 1,003.0 Open-loop gain increases as the gain is increased, reducing gain related errors Gain-bandwidth increases as the gain is increased, optimizing frequency response Reduced input voltage noise which is determined by the collector current and base resistance of the input devices To maintain gain accuracy, use 0.1% to 1% resistors To minimize gain error, avoid high parasitic resistance in series with RG To minimize gain drift, use low TC resistors (<10ppm/C) Common Mode Rejection The CLC1200 offers high CMRR. To achieve optimal CMRR performance: RG also determines the transconductance of the preamp stage. As RG is reduced for larger gains, the transconductance increases to that of the input transistors. Producing the following advantages: 249 495.0 Follow these guidelines for improved performance: - G= 199.4 100 Table 1: Recommended RG Values OUT + +IN 249 Connect the reference terminal (pin 5) to a low impedance source Minimize capacitive and resistive differences between the inputs In many applications, shielded cables are used to minimize noise. Properly drive the shield for best CMRR performance over frequency. Figures 1 and 2 show active data guards that are configured to improve AC common-mode rejections. the capacitances of input cable shields are "bootstrapped" to minimize the capacitance mismatch between the inputs. +V S + Input _ Gain Selection 100 The impedance between pins 1 and 8, RG, sets the gain of the CLC1200. Table 1 shows the required standard table values of RG for various calculated gains. For G = 1, RG = . RG / 2 _ CLC1200 CLCxxx + RG / 2 - Input + Output REF -V S Figure 2: Common-mode Shield Driver (c) 2008-2014 Exar Corporation 11 / 15 exar.com/CLC1200 Rev 2E CLC1200 + Input 100 _ + - CLC1200 RG 100 Small size and low cost make the CLC1200 especially attractive for voltage output pressure transducers. Since it delivers low noise and drift, it will also serve applications such as diagnostic noninvasive blood pressure measurement. +V S -V S + + Output Medical ECG REF - Input The CLC1200 is perfect for ECG monitors because of its low current noise. A typical application is shown in Figure 4. The CLC1200's low power, low supply voltage requirements, and space-saving 8-lead SOIC package offerings make it an excellent choice for battery-powered data recorders. -V S Figure 3: Differential Shield Driver Pressure Measurement Applications Furthermore, the low bias currents and low current noise, coupled with the low voltage noise of the CLC1200, improve the dynamic range for better performance. The CLC1200 is especially suitable for higher resistance pressure sensors powered at lower voltages where small size and low power become more significant. The value of capacitor C1 is chosen to maintain stability of the right leg drive loop. Proper safeguards, such as isolation, must be added to this circuit to protect the patient from possible harm. Figure 3 shows a 3k pressure transducer bridge powered from 5V. In such a circuit, the bridge consumes only 1.7mA. Adding the CLC1200 and a buffered voltage divider allows the signal to be conditioned for only 3.8mA of total supply current. 5V 3k 5V 3k 5V 20k + G = 100 3k 499 3k Ref CLC1200 _ 10k + 0.1mA CLCxxx _ 20k 1.7mA IN 5V REF AGND Digital Data Output 1.3mA Figure 4: Pressure Monitoring Circuits Operating on a Single 5V Supply +3V Patient/Circuit Protection/Isolation 7 3 C1 R1 10k R4 1M R3 24.9k R2 24.9k 8 CLC1200 RG 8.25k G=7 1 2 6 0.03Hz High-Pass Filter 5 G = 143 Output 1V/mV Output Amplifier 4 CLC1003 -3V Figure 5: Typical Circuit for ECG Monitor Applications (c) 2008-2014 Exar Corporation 12 / 15 exar.com/CLC1200 Rev 2E CLC1200 Grounding The output voltage of the CLC1200 is developed with respect to the potential on the reference terminal (pin 8). Simply tie the REF pin to the appropriate "local ground" to resolve many grounding problems. To isolate low level analog signals from a noisy digital environment, many data acquisition components have separate analog and digital ground pins. Use separate ground lines (analog and digital) to minimize current flow from sensitive areas to system ground. These ground returns must be tied together at some point, usually best at the ADC. Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Exar has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8F and 0.1F ceramic capacitors for power supply decoupling Place the 6.8F capacitor within 0.75 inches of the power pin Place the 0.1F capacitor within 0.1 inches of the power pin Figure 6. CEB024 Schematic Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # CEB024 Figure 7. CEB024 Top View Products CLC1200 in SOIC-8 Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 6-8. These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a single-supply application: 1. Short -VS to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. Figure 8. CEB024 Bottom View (c) 2008-2014 Exar Corporation 13 / 15 exar.com/CLC1200 Rev 2E CLC1200 Mechanical Dimensions SOIC-8 Package DIP-8 Package (c) 2008-2014 Exar Corporation 14 / 15 exar.com/CLC1200 Rev 2E CLC1200 Ordering Information Part Number CLC1200ISO8X Package Green Operating Temperature Range Packaging SOIC-8 Yes -40C to +85C Tape & Reel CLC1200ISO8MTR SOIC-8 Yes -40C to +85C Mini Tape & Reel CLC1200ISO8EVB Evaluation Board N/A N/A N/A DIP-8 Yes -40C to +85C Rail CLC1200IDP8 Moisture sensitivity level for all parts is MSL-1. Mini Tape and Reel contains 250 pieces. Revision History Revision 2E (ECN 1513-02) Date March 2015 Description Reformat into Exar data sheet template. Updated PODs and thermal resistance numbers. Updated ordering information table to include MTR and EVB part numbers. Updated evaluation board top and bottom views to Rev b. Added schematic used for evaluation boards. For Further Assistance: Email: CustomerSupport@exar.com or HPATechSupport@exar.com Exar Technical Documentation: http://www.exar.com/techdoc/ Exar Corporation Headquarters and Sales Offices 48760 Kato Road Tel.: +1 (510) 668-7000 Fremont, CA 94538 - USA Fax: +1 (510) 668-7001 NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. (c) 2008-2014 Exar Corporation 15 / 15 exar.com/CLC1200 Rev 2E Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Exar: CLC1200ISO8X CLC1200IDP8 CLC1200ISO8MTR CLC1200ISO8EVB