1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT223 (SC-73)
small Surface-Mounted Device (SMD) plastic package.
NPN complement: PBSS302NZ.
1.2 Features
Low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
High collector current gain (hFE) at high IC
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
DC-to-DC conversion
MOSFET gate driving
Motor control
Charging circuits
Power switches (e.g. motors, fans)
1.4 Quick reference data
[1] Pulse test: tp≤300 μs; δ≤0.02.
PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
Rev. 02 — 20 November 2009 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - −20 V
ICcollector current - - −5.5 A
ICM peak collector current single pulse;
tp≤1ms --−11 A
RCEsat collector-emitter
saturation resistance IC=−4A;
IB=−200 mA [1] -3550mΩ
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 2 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
2. Pinning information
3. Ordering information
4. Marking
Table 2. Pinning
Pin Description Simplified outline Symbol
1base
2 collector
3emitter
4 collector 132
4
sym028
2, 4
3
1
Table 3. Ordering information
Type number Package
Name Description Version
PBSS302PZ SC-73 plastic surface-mounted package with increased heat
sink; 4 leads SOT223
Table 4. Marking codes
Type number Marking code
PBSS302PZ S302PZ
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 3 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
5. Limiting values
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCBO collector-base voltage open emitter - −20 V
VCEO collector-emitter voltage open base - −20 V
VEBO emitter-base voltage open collector - −5V
ICcollector current - −5.5 A
ICM peak collector current single pulse;
tp≤1ms -−11 A
Ptot total power dissipation Tamb ≤25 °C[1] -0.7W
[2] -1.7W
[3] -2W
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves
006aaa560
Tamb (°C)
−75 17512525 75−25
1.0
0.5
1.5
2.0
2.5
Ptot
(W)
0
(3)
(2)
(1)
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 4 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-a) thermal resistance from
junction to ambient in free air [1] --179K/W
[2] --74K/W
[3] --63K/W
Rth(j-sp) thermal resistance from
junction to solder point --15K/W
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junctio n to ambient as a function of pulse du ration; typical values
006aaa561
10
1
102
103
Zth(j-a)
(K/W)
10−1
10−51010−2
10−4102
10−1
tp (s)
10−3103
1
0
0.10
0.01
δ = 1
0.75
0.50
0.33
0.20
0.05
0.02
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 5 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
FR4 PCB, mounting pad for collector 6 cm2
Fig 3. Transient thermal impedance from junctio n to ambient as a function of pulse du ration; typical values
Ceramic PCB, Al2O3, standard footprint
Fig 4. Transient thermal impedance from junctio n to ambient as a function of pulse du ration; typical values
006aaa562
10−51010−2
10−4102
10−1
tp (s)
10−3103
1
0.20
δ = 1
0.10
10
1
102
Zth(j-a)
(K/W)
10−1
0.05
0.01
0.02
0
0.75
0.50
0.33
006aaa563
10−51010−2
10−4102
10−1
tp (s)
10−3103
1
0.10
10
1
102
Zth(j-a)
(K/W)
10−1
0.05
0.02
0
0.01
δ = 1
0.75
0.50
0.33
0.20
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 6 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
7. Characteristics
[1] Pulse test: tp≤300 μs; δ≤0.02.
Table 7. Characteristics
Tamb =25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
ICBO collector-base cut-off
current VCB =−20 V; IE=0A - - −100 nA
VCB =−20 V; IE=0A;
Tj=150°C--−50 μA
IEBO emitter-base cut-off
current VEB =−5V; I
C=0A - - −100 nA
hFE DC current gain VCE =−2V; I
C=−0.5 A [1] 250 370 -
VCE =−2V; I
C=−1A [1] 250 340 -
VCE =−2V; I
C=−2A [1] 200 290 -
VCE =−2V; I
C=−4A [1] 150 220 -
VCE =−2V; I
C=−7A [1] 100 145 -
VCEsat collector-emitter
saturation voltage IC=−0.5 A; IB=−50 mA [1] -−25 −35 mV
IC=−1A; I
B=−50 mA [1] -−45 −65 mV
IC=−1A; I
B=−10 mA [1] -−70 −100 mV
IC=−2A; I
B=−40 mA [1] -−95 −140 mV
IC=−4A; I
B=−200 mA [1] -−140 −200 mV
IC=−4A; I
B=−400 mA [1] -−130 −185 mV
IC=−4A; I
B=−40 mA [1] -−215 −320 mV
IC=−5.5 A; IB=−275 mA [1] -−185 −265 mV
RCEsat collector-emitter
saturation resistance IC=−4A; I
B=−200 mA [1] -3550mΩ
IC=−4A; I
B=−40 mA [1] -5380mΩ
VBEsat base-emitter
saturation voltage IC=−1A; I
B=−100 mA [1] -−0.82 −0.9 V
IC=−4A; I
B=−400 mA [1] -−0.93 −1.05 V
VBEon base-emitter turn-on
voltage VCE =−2V; I
C=−2A [1] -−0.76 −0.85 V
tddelay time VCC =−12.5 V; IC=−3A;
IBon =−0.15 A;
IBoff =0.15A
-10-ns
trrise time - 55 - ns
ton turn-on time - 65 - ns
tsstorage time - 205 - ns
tffall time - 145 - ns
toff turn-off time - 350 - ns
fTtransition frequency VCE =−10 V; IC=−100 mA;
f=100MHz -130-MHz
Cccollector capacitance VCB =−10 V; IE=i
e=0A;
f=1MHz -130160pF
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 7 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
VCE =−2V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
Fig 5. DC current gain as a function of collector
current; typical values Fig 6. Collector current as a function of
collector-emitter voltage; typical values
VCE =−2V
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
Fig 7. Base-emitter voltage as a function of collector
current; typical values Fig 8. Base-emitter satur ation voltage as a function
of collector current; typical values
006aaa596
400
600
200
800
1000
hFE
0
IC (mA)
−10−1−104
−103
−1−102
−10
(3)
(2)
(1)
006aaa602
VCE (V)
0−5−4−2−3−1
−6
−8
−4
−2
−10
−12
−14
IC
(A)
0
−90
−80
−70
−60
−50
−40
−30
−20
−10
IB (mA) = −100
006aaa597
−0.4
−0.8
−1.2
VBE
(V)
0
IC (mA)
−10−1−104
−103
−1−102
−10
(3)
(2)
(1)
006aaa600
−0.4
−0.8
−1.2
VBEsat
(V)
0
IC (mA)
−10−1−104
−103
−1−102
−10
(3)
(2)
(1)
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 8 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 9. Collector-emitter saturation voltage as a
function of collector current; typical values Fig 10. Collector-emitter saturation voltage as a
function of collector current; typical values
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 11. Collector-emitter saturation re sistance as a
function of collector current; typical values Fig 12. Collector-emitter saturation resistance as a
function of collector current; typical values
006aaa598
−10−1
−10−2
−1
VCEsat
(V)
−10−3
IC (mA)
−10−1−104
−103
−1−102
−10
(3)
(2)
(1)
006aaa599
IC (mA)
−10−1−104
−103
−1−102
−10
−10−2
−10−1
−1
−10
VCEsat
(V)
−10−3
(3)
(2)
(1)
006aaa601
IC (mA)
−10−1−104
−103
−1−102
−10
10−1
1
10
102
RCEsat
(Ω)
10−2
(3)
(2)
(1)
006aaa603
IC (mA)
−10−1−104
−103
−1−102
−10
1
10−1
102
10
103
RCEsat
(Ω)
10−2
(3)
(2)
(1)
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 9 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
8. Test information
Fig 13. BISS transistor switching time definitio n
VCC =−12.5 V; IC=−3A; I
Bon =−0.15 A; IBoff =0.15A
Fig 14. Test circuit for switching times
006aaa266
−IBon (100 %)
−IB
input pulse
(idealized waveform)
−IBoff
90 %
10 %
−IC (100 %)
−IC
td
ton
90 %
10 %
tr
output pulse
(idealized waveform)
tf
t
ts
toff
RC
R2
R1
DUT
mgd624
Vo
RB
(probe)
450 Ω
(probe)
450 Ω
oscilloscope oscilloscope
VBB
VI
VCC
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 10 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
9. Package outline
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
Fig 15. Package outline SOT223 (SC-73)
04-11-10Dimensions in mm
6.7
6.3
3.1
2.9
1.8
1.5
7.3
6.7
3.7
3.3
1.1
0.7
132
4
4.6
2.3 0.8
0.6
0.32
0.22
Table 8. Packing methods
The indicated -xxx are the last thre e digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
1000 4000
PBSS302PZ SOT223 8 mm pitch, 12 mm tape and reel -115 -135
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 11 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
11. Soldering
Fig 16. Reflow soldering footprint SOT223 (SC-73)
Fig 17. Wave soldering footprint SOT223 (SC-73)
sot223_
fr
1.2
(4×)
1.2
(3×)
1.3
(4×)
1.3
(3×)
6.15
7
3.85
3.6
3.5
0.3
3.9 7.65
2.3 2.3
6.1
4
231
solder lands
solder resist
occupied area
solder paste
Dimensions in mm
sot223_
fw
1.9
6.7
8.9
8.7
1.9
(3×)
1.9
(2×)
1.1
6.2
2.7 2.7
2
4
31
solder lands
solder resist
occupied area
preferred transport
direction during soldering
Dimensions in mm
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 12 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
12. Revision history
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBSS302PZ_2 20091120 Product data sheet - PBSS302PZ_1
Modifications: •This data sheet was changed to reflec t the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technica l
content.
•Figure 16 “Reflow soldering footprint SOT223 (SC-73)”: updated
•Figure 17 “Wave soldering footprint SOT223 (SC-73)”: updated
PBSS302PZ_1 20060914 Product data sheet - -
PBSS302PZ_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 November 2009 13 of 14
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warrant ies as to t he accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsisten cy or conf lict with the short data sheet, the
full data sheet shall pre va il.
13.3 Disclaimers
General — In formation in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give an y represent ations or
warranties, expressed or impli ed, as to the accuracy or completeness of such
information and shall have no liability for th e co nsequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ra tings System of IEC 60134) may cause permane nt
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other co nditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may af fect device reliability.
Terms and conditions of sale — NXP Semiconductors product s are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between inf ormation in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Not hing in this document may be interpret ed or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respective ow ners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PBSS302PZ
20 V, 5.5 A PNP low VCEsat (BISS) transistor
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of rele ase: 20 November 2009
Document identifier: PBSS302PZ_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
10 Packing information . . . . . . . . . . . . . . . . . . . . 10
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Contact information. . . . . . . . . . . . . . . . . . . . . 13
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
