OBSOLETE
100302
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SNOS119B AUGUST 1998REVISED APRIL 2013
100302 Low Power Quint 2-Input OR/NOR Gate
Check for Samples: 100302
1FEATURES DESCRIPTION
The 100302 is a monolithic quint 2-input OR/NOR
2 43% Power Reduction of the 100102 gate with common enable. All inputs have 50 kΩpull-
2000V ESD Protection down resistors and all outputs are buffered.
Pin/Function Compatible with 100102
Voltage Compensated Operating Range =
4.2V to 5.7V
Standard Microcircuit Drawing
(SMD) 5962-9152802
Table 1. Pin Descriptions
Logic Symbol
Pin Names Description
Dna–Dne Data Inputs
E Enable Input
Oa–OeData Outputs
Oa–OeComplementary Data Outputs
TRUTH TABLE(1)
D1X D2X E OXOX
L L L L H
L L H H L
L H L H L
L H H H L
H L L H L
H L H H L
H H L H L
H H H H L
(1) H = HIGH Voltage Level
L = LOW Voltage Level
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
OBSOLETE
100302
SNOS119B AUGUST 1998REVISED APRIL 2013
www.ti.com
Connection Diagram
Figure 1. 24-Pin CERDIP Figure 2. 24-Pin CPGA
See NAQ0024C Package
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1)(2)
Above which the useful life may be impaired
Storage Temperature (TSTG)65°C to +150°C
Maximum Junction Temperature (TJ) Ceramic +175°C
VEE Pin Potential to Ground Pin 7.0V to +0.5V
Input Voltage (DC) VEE to +0.5V
Output Current (DC Output HIGH) 50 mA
ESD (3) 2000V
(1) Absolute Maximum Ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional
operation under these conditions is not implied.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) ESD testing conforms to MIL-STD-883, Method 3015.
RECOMMENDED OPERATING CONDITIONS
Case Temperature (TC) Military 55°C to +125°C
Supply Voltage (VEE)5.7V to 4.2V
DC ELECTRICAL CHARACTERISTICS - MILITARY VERSION
VEE =4.2V to 5.7V, VCC = VCCA = GND, TC=55°C to +125°C (1)
Symbol Parameter Min Max Units TCConditions Notes
VOH Output HIGH Voltage 1025 870 mV 0°C to +125°C
1085 870 mV 55°C VIN = VIH(Max) Loading with See (1)(2)(3)
or VIL (Min) 50Ωto 2.0V
VOL Output LOW Voltage 1830 1620 mV 0°C to +125°C
1830 1555 mV 55°C
VOHC Output HIGH Voltage 1035 mV 0°C to +125°C
1085 mV 55°C VIN = VIH(Max) Loading with See (1)(2)(3)
or VIL (Min) 50Ωto 2.0V
VOLC Output LOW Voltage 1610 mV 0°C to +125°C
1555 mV 55°C
VIH Input HIGH Voltage 1165 870 mV 55°C to +125°C Ensured HIGH Signal See (1)(2)(3)(4)
for All Inputs
VIL Input LOW Voltage 1830 1475 mV 55°C to +125°C Ensured LOW Signal See (1)(2)(3)(4)
for All Inputs
IIL Input LOW Current 0.50 μA55°C to +125°C VEE =4.2V See (2)(3)(1)
VIN = VIH (Max)
IIH Input HIGH Current 240 μA 0°C to +125°C VEE =5.7V See (1)(2)(3)
340 μA55°C VIN = VIL(Min)
IEE Power Supply Current 48 17 mA 55°C to +125°C Inputs Open See (1)(2)(3)(4)
(1) Sample tested (Method 5005, Table I) on each manufactured lot at 55°C, +25°C, and +125°C, Subgroups A1, 2, 3, 7, and 8.
(2) F100K 300 Series cold temperature testing is performed by temperature soaking (to ensure junction temperature equals 55°C), then
testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold
start” specs which can be considered a worst case condition at cold temperatures.
(3) Screen tested 100% on each device at 55°C, +25°C, and +125°C, Subgroups 1, 2, 3, 7, and 8.
(4) Ensured by applying specified input condition and testing VOH/VOL.
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AC ELECTRICAL CHARACTERISTICS
VEE =4.2V to 5.7V, VCC = VCCA = GND
Symbol Parameter TC=55°C TC= +25°C TC= +125°C Units Conditions Notes
Min Max Min Max Min Max
tPLH Propagation Delay 0.30 1.80 0.40 1.50 0.40 1.70 ns See (1)(2)(3)(4)(5)
tPHL Data to Output
tPLH Propagation Delay 0.60 2.60 0.80 2.30 0.80 2.80 ns See Figure 3
tPHL Enable to Output and Figure 4
tTLH Transition Time 0.30 1.20 0.30 1.20 0.30 1.20 ns See (4)
tTHL 20% to 80%, 80% to 20%
(1) F100K 300 Series cold temperature testing is performed by temperature soaking (to ensure junction temperature equals 55°C), then
testing immediately after power-up. This provides “cold start” specs which can be considered a worst case condition at cold
temperatures.
(2) Screen tested 100% on each device at +25°C temperature only, Subgroup A9.
(3) Sample tested (Method 5005, Table I) on each manufactured lot at +25°C, Subgroup A9, and at +125°C and 55°C temperatures,
Subgroups A10 and A11.
(4) Not tested at +25°C, +125°C, and 55°C temperature (design characterization data).
(5) The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching.
TEST CIRCUITRY
VCC, VCCA = +2V, VEE =2.5V
L1 and L2 = equal length 50Ωimpedance lines
RT= 50Ωterminator internal to scope
Decoupling 0.1 μF from GND to VCC and VEE
All unused outputs are loaded with 50Ωto GND
CL= Fixture and stray capacitance 3 pF
Figure 3. AC Test Circuit
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100302
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SNOS119B AUGUST 1998REVISED APRIL 2013
Switching Waveforms
Figure 4. Propagation Delay and Transition Times
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Product Folder Links: 100302
OBSOLETE
100302
SNOS119B AUGUST 1998REVISED APRIL 2013
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REVISION HISTORY
Changes from Revision A (April 2013) to Revision B Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 5
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