SSM3J15FV
2017-10-11
1
© 2017
Toshiba Electronic Devices & Storage Corporation
TOSHIBA Field Effect Transistor Silicon P Channel MOS T ype
SSM3J15FV
High-Speed Switching Applications
Analog Switch Applications
Optimum for high-density mounting in small packages
Low on-resistance : RDS(ON) = 12 Ω (max) (@VGS = 4 V)
: RDS(ON) = 32 Ω (max) (@VGS = 2.5 V)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit
Drain-Source voltage VDSS 30 V
Gate-Source voltage VGSS ±20 V
Drain current DC ID 100 mA
Pulse IDP 200
Power dissipation (Ta = 25°C) PD (Note 1) 150 mW
Channel temperature Tch 150 °C
Storage temperature range Tstg 55 to 150 °C
Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/ voltage and the s ignifica nt change in tem perature,
etc.) may caus e this product to decrease in the reliability signific antly
even if the ope r ating conditions (i.e. operating
temperature/current/ voltage, etc.) are within t he absolute maximum
ratings.
Please design the appropriate reliability upon r ev i ewing the Toshiba
Semiconductor Reliability Handbook (“ H andling Preca utions”/ D er ating
Concept and Methods”) and individual rel iability data (i.e. reliability test
report and estimated failure rate, etc ).
Note 1: Mounted on FR4 board
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.585 mm2)
Marking Equivalent Circuit (top view)
Handling Precaution
When handlin g individual devices ( which are not yet m ounted on a circui t board), be sure that the environment is protec ted
against electrostatic el ec tricity. O per ators should wear anti-stat ic clothing, and containers and other objects that come into direct
contact with d evices should be made of anti -static materials.
Unit: mm
JEDEC
JEITA
TOSHIBA 2-1L1B
Weight: 1.5 mg (typ.)
0.5mm
0.45mm
0.45mm
0.4mm
D Q
1 2
3
1 2
3
Start of commer cial production
2003-
04
VESM
1.GATE
2.SOURCE
3.DRAIN
1.2±0.05
0.32±0.05
1
0.4
0.4
0.22±0.05
0.8±0.05
0.8±0.05
1.2±0.05
0.13±0.05
0.5±0.05
SSM3J15FV
2017-10-11
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© 2017
Toshiba Electronic Devices & Storage Corporation
Electrical Characteristics (Ta = 25°C)
Characteristic Symbol Test Condition MIN TYP. MAX UNIT
Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ±1 μA
Drain-Source breakdown voltage V (BR) DSS ID = 0.1 mA, VGS = 0 V 30 V
Drain cut-off current IDSS VDS = 30 V, VGS = 0 V 1 μA
Gate threshold voltage Vth VDS = 3 V, ID = 0.1 mA 1.1 1.7 V
Forward transfer admittance |Yfs| VDS = 3 V, ID = 10 mA (Note 2) 20 mS
Drain-Source on-resistance RDS (ON) ID = 10 mA, VGS = 4 V (Note 2) 8 12 Ω
ID = 1 mA, VGS = 2.5 V (Note 2)
14 32
Input capacitance Ciss
VDS = 3 V, VGS = 0 V, f = 1 MHz
9.1 pF
Reverse transfer capacitance Crss 3.5 pF
Output capacitance Coss 8.6 pF
Switching time Turn-on time ton VDD = 5 V, ID = 10 mA,
VGS = 0 to 5 V
65
ns
Turn-off time toff
175
Note 2: Pulse Test
Switching Time Test Circuit
Precaution
Vth can be expressed as the vol tage between gate and source when the low operating current value is ID =
-100 μA for this produc t. For normal switc hi ng operation, VGS (on) requires a higher voltage than Vth and VGS
(off) requires a lower voltage than Vth.
(The relationship can be establis hed as follows: VGS (off) < Vth < VGS (on) )
Please take this into consideration when using the device.
VDD = 5 V
Duty 1%
VIN: tr, tf < 5 ns
(Zout = 50 Ω)
Common Source
Ta = 25°C
IN
0
5V 10 μs VDD
OUT
50 Ω
RL
(c) VOUT
ton
10%
90%
5 V
0 V
90%
10%
toff
tr tf
VDS (ON)
VDD
(b) VIN
(a) Test circuit
SSM3J15FV
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© 2017
Toshiba Electronic Devices & Storage Corporation
Drain-Source on resistance RDS(ON) (Ω)
Drain-Source on resistance RDS(ON) (Ω)
Drain-Source on resistance RDS(ON) (Ω)
ID - VDS
0
-50
-100
-150
-200
-250
0 -0.5 -1 -1.5 -2
Drain-Source Voltage VDS(V)
Drain Current ID(mA)
Common Source
Ta=25°C
Pulse Test
VGS=-2.3V
-2.5
-2.7
-3.0
-3.3
-4
-5
-10 -7
ID - VGS
-0.01
-0.1
-1
-10
-100
-1000
0 -1 -2 -3 -4 -5
Gate-Source Voltage VGS(V)
Drain Current ID(mA)
Common Source
VDS=-3V
Pulse Test
Ta=100°C
RDS(ON) - ID
0
10
20
30
40
-1 -10 -100 -1000
Drain Current ID(mA)
VGS=-2.5V
-4V
RDS(ON) - VGS
0
2
4
6
8
10
12
14
16
18
20
0 -2 -4 -6 -8 -10
Gate-Source Voltage VGS (V)
Common Source
ID= -1mA
Pulse Test
RDS(ON) - Ta
0
10
20
30
-25 0 25 50 75 100 125 150
Common Source
Pulse Test
VGS=-2.5V,ID=-1mA
-4V,-10mA
Vth - Ta
0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.4
-1.6
-1.8
-2
-25 0 25 50 75 100 125 150
Gate threshold voltage Vth(V)
Common Source
VDS=-3V
ID=-0.1mA
25°C
-25°C
Common Source
Ta=25°C
Pulse Test
Ta=100°C 25°C
-25°C
Ambient temperature Ta(°C) Ambient temperature Ta(°C)
Drain-Source on resistance RDS(ON) (Ω)
Drain-Source on resistance RDS(ON) (Ω)
Drain-Source on resistance RDS(ON) (Ω)
SSM3J15FV
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© 2017
Toshiba Electronic Devices & Storage Corporation
|Yfs| - ID
1
10
100
1000
-1 -10 -100 -1000
Drain current ID (mA)
Forward transfer admittance |Yfs| (mS)
Common Source
VDS= -3V
Ta=25°C
Pulse Test
IDR - VDS
0
50
100
150
200
250
0 0.2 0.4 0.6 0.8 1 1.2 1.4
Drain-Source voltage VDS (V)
Drain reveres current IDR (mA)
Common Source
VGS=0V
Ta=25°C
Pulse Test
C - VDS
1
10
100
-0.1 -1 -10 -100
Drain-Source voltage VDS (V)
Capacitance C (pF)
Common Source
VGS=0V
f=1MHz
Ta=25°C
Ciss
Coss
Crss
t - ID
10
100
1000
10000
-0.1 -1 -10 -100
Drain Current ID (mA)
Switching Time t (ns)
Common Source
VDD= -5V
VGS=0 to -5V
Ta=25°C
toff
tr
ton
t
PD - Ta
0
50
100
150
200
250
0 20 40 60 80 100 120 140 160
Mounted on FR4 board
(25.4mm×25.4mm×1.6 mm, Cu Pad:0.585mm2 )
Power dissipation PD (mW)
Ambient temperature Ta(°C)
SSM3J15FV
2017-10-11
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© 2017
Toshiba Electronic Devices & Storage Corporation
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