INITIAL RELEASE Final Electrical Specifications | AR LT1575/LT1577 TECHNOLOGY FEATURES UltraFast Transient Response Eliminates Tantalum and Electrolytic Output Capacitors FET Rosion) Defines Dropout Voltage 1% Reference/Output Voltage Tolerance Over Temperature Typical Load Regulation: imV High Side Sense Current Limit Multifunction Shutdown Pin with Latchoff APPLICATIONS Pentium Processar Supplies PowerPC Supplies 5V to 3.XXV or 3.3V to 2.XXV Microprocessor Supplies GTL Termination Low Voltage Logic Supplies Ultrafast Transient Response, Low Dropout Regulators Adjustable and Fixed November 1996 DESCRIPTION The LT1575/LT1577 are single/dual controller ICs that drive jow cost external N-channel MOSFETs as source followers to produce ultrafast transient response, low dropout voltage regulators. The LT1575/LT1577 achieve unprecedented transient- load performance by eliminating expensive tantalum or bulk electrolytic output capacitors in the most demanding modern microprocessor applications. Precision-trimmed adjustable and fixed output voltage versions accommo- date any required microprocessor power supply voltage. Selection of the N-channel MOSFET Rosjon; allows very low dropout voltages to be achieved. Unique protection features include a high side current limit amplifier that activates a fault protection timer circuit. A multifunction Shutdown pin provides either ees wees 3 ae _.__ current limit time-out with latchoff. overvoitage protec- ae tion, thermal shutdown or a combination of these func- LT1575CNB-2./LT1575C98-2.8 | 2.8V Fixed ar naaae [T1S7ECNB-3 BL T1575C88-3.5 3 3V Fixed tions. The LT1575 is available in 8-pin SO or PDIP and the (T1575CN8-3.5'L11575058-3.5 | 3.5V Fixed LT1577 is available in 16-pin narrow body SO. LT1575CN8-5/LT1575058-5 5V Fixed 4&F LTC and LT are registered tradervarks of Linear Technoicgy Corpcration. LT1877C8-ADJADJ Aqjustable, Adjustable Porm a eps rade ofl comparator LT15770S-3.3/ADJ 3.3V Fixed, Adjustable PowerPC 1s trademark of (BM Gorpcraticn cee oe 3.3V Fixed, 2.8V Fixed Consult factory for additional output voltage combinations available in the LT1577. TYPICAL APPLICATION Ultrafast Transient Response 5V to 3.3V Low Dropout Regulator (For Schematic Including Current Limit, See Typical Applications) 1y LT1575-3 3 1 shON IPOS BV FORT < 45C co tlety, INES cs, . C6 = 24x tpr SV pa CERAMIC SURFACE GND GATE MOUNT CAPACITORS Tout come FORT > 45C: Your G6 = 24 x Ipf X7R 33V CERAMIC SURFACE 5A MOUNT CAPACITORS. PLACE C8 IN THE MICSCPROCESSOR. SOCKET CAVITY Ri 78k ca 4000pF C3 "OcF GND Transient Response for 0.2A to 5A Output Load Step SomVv/DIV zNDIV 4-42 LY WineLT1575/LT1577 ABSOLUTE MAXIMUM RATINGS (Note 1) Vins IPOS, INEG ooo. ccc cesses cess rssenseseseereeeseses 22Vs Junction Temperature (Note 2)... 0C to 100C SHDN uu. csseccssescssescesscsesrssnsnssneseseseeseetsseeseseeseseesesees Vin Storage Temperature Range............... ~65C to 150C Operating Ambient Temperature Range..... 0C to 70C ~ Lead Temperature (Soldering, 10 sec)... 300C PACKAGE/ORDER INFORMATION 16-LEAD PLASTIC NARROW SO Cyagaye= 100C, Gyn = 100C 'W 15-LEAD PLASTIC NARROW SO Tynan, = 100C. ya = 100C. W TOP VIEW TOP VIEW il SHON [7 | ~ 8 | (Pos sHon [3] ~ 8 | IPOS vn 2 [7] INEG via [2 [7 | INEG ! OP IEW ono [3] 6] GATE sno [3] 16 | GATE < 6] iPost re [4] [5] COMP our [3] PS] come ts) WNEG4 NB PACKAGE $8 PACKAGE NE PACKAGE $8 PACKAGE Pa) ares B-LEAD PDIP B-LEAD PLASTIC SO B-LEAD PDIP &-LEAD PLASTIC $0 #3} Compt Tywax 100 . oyq-= 160C! W (NB: Tgay = 100C. Gq = 109C/W NB} [r2] 1Pos2 Taya 100C, By, = 190C! W (SB) Tyrie, 100C. hg = 130-G'W (88) Fal nese ORDER PART NUMBER ORDER PART NUMBER fa one LT1575CN8 LT1575CN8-1.5 LT1575CS8-3.3 S PACKAGE LT1575CS8 LT1575C0S8-1.5 LT1575CN8-3.5 | T6-LEAD FLASTIC NARROW SO LT1575CN8-2.8 111575C88-3.5 Tange = VAG. Oa = PO LT1575CS8-2.8 LT1575CN8-5 LT1575CN8-3.3 LT1575CS8-5 38 PART NUMBER 58 PART NUMBER ORDER PART NUMBER 1575 157515 157535 LT1577CS-ADJ/ADJ 157528 18755 157533 TOP VIEW TOP vIEW | F} 10st i] pos: Hi] INEGI vs] INEGt pa] GATE fia} GATEI | 13) comps 13] COMP: : 12] iPos2 12] 1easz | ha] Neg Ait weg? io} GaTe2 fio} GATE2 | [3] CoMP2 3) COMPZ | | ORDER PART NUMBER LT1577C8-3.3/ADJ Consuit factory for Industrial and Military grade parts. LT Wie 4-43 ORDER PART NUMBER L11577CS-3.3/2.8 I | | | 3 S PACKAGE | 5 PACKAGE | I { i |LT1575/L11577 ELECTRICAL CHARACTERISTICS Ta = 25C, Vin = 12V, GATE = 6V, IPOS = INEG = 5V, SHDN = 0.75V unless otherwise noted. SYMBOL | PARAMETER CONDITIONS MIN TYP MAX UNITS Ig Supply Current | e 5 12 19 mA Vee LT1575 Reference Voltage ! 06 1210 08 | % ! \@ ~1.0 1.210 1.0 % Vout | LT1575-1.5 Qutput Voltage | -06 1.500 06 | % a ee; -10 1.500 1.0 % LT1575-2.8 Output Voltage ~0.6 2.800 06 | e ~1.0 2,800 10! % : LT1575-3.3 Output Voltage -06 3.300 0.6 | % le ~1.0 3.306 1.0 % L11575-3.5 Output Voltage | -0.6 3.500 0.6 : of | i@, -1.0 3.500 1.0 | % LT1575-5 Output Voltage ' -06 5,000 0.6 % _ e =1.0 5.000 1.0 a Line Regulation 10V < Vyy < 20V e 0.01 0.03 aN ire FB Input Bias Current FB = Veg -06 ~4.9 wa lout i OUT Divider Current OUT = Vout _e 0.5 1.0 EO mA Avot LT1575 Large-Signal Voltage Gain Voate = aV to 10V e : 6 _ 84 ee ab LT1575-1.5 Large-Signal Voltage Gain | Vgatg = 3V to 10V e: 67 82 i; @B LT1575-2.8 Large-Signal Voltage Gain Veate = 3V to 10V e 60 7 dB [11575-3.3 Large-Signal Voltage Gain | Vaare = 3V to 10V e 60 5 x: L11575-3.5 Large-Signal Voltage Gain | Vgarg = 3V to 10V ie 60 7 gg LT1575-5 Large-Signal Voltage Gain | Vente = 3V to 10V jel 6 A _ ee __ 0B Vo. GATE Output Swing Low (Note 3} | Igare = OMA fe 25 30s SV Vou GATE Output Swing High gare = OMA @] Vy-i8 Vint IPOS + INEG Supply Current 3V < IPOS < 20V Te 0.3 0625 10 | ma | Current Limit Threshold Valtage 1 42 50 5B} a OF Current Limit Threshold Voltage 3V < IPOS < 20V e ~0.20 0.50 %OAL Line Regulation _ ' ot SHON Sink Current Current Flows into Pin e 2.5 5.0 8.9 T pA ; SHDN Source Current Current Flows Out of Pin e -8 -15 ~23 aA SHON Low Clamp Voltage e 0.1 0.25 ; _ SHDN High Clamp Voltage e- 1.50 1.85 2.20 _v SHDN Threshold Voltage _ ee; 118 4at 1.240 v SHDN Threshold Hysteresis e| 50100180 mv L The @ denotes specifications which apply ever the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: T, is calculated from the ambient temperature T, and power dissipation Pp according to the following formulas: LT1575CN8: Ty = Ta + (Pp 2 100CW) LT1575C88: Ty = Ta + (Po * 130CW} LT1577CS: T; = Ta + (Pp 100CW) Because the LT1577 consists of two regulators in the package, the total LT1577 power dissipation must be used for its junction temperature calculation. The total 1.11577 Pp = Pp (Regulator 1) + Pp (Regulator 2). Note 3: The Vaggitn, of the external MOSFET must be greater than 3V Vout. 4-44 LILT1575/LT1577 TYPICAL PERFORMANCE CHARACTERISTICS Quiescent Current vs Temperature 16 Vig = 12 14 Vin = 20V, Vyy = BV QUIESCENT CURRENT (mA) = ~ OM 75 -60 -25 9 25 50 75 100 125 150 175 TEMPERATURE (C) isch 77 Gar LT1575-1.5 Vouy vs Temperature 1.515 : 1.512 _. 1.509 => wo 1.506 = 1.503 = 1500 2 1497 ee 1.494 3.491 1 488 1.485 -75-0-25 G 25 50 75 100 126 150 175 TEMPERATURE (C} ERENCE VOL RE LT1575-3.5 Vouy vs Temperature we np 6 wD on OUTPUT VOLTAGE (Vv) 2 te 3 S oe > oo on 3.480 3.475 3.470 3.465 1 to 0 25 50 75 100 125 150 175 TEMPERATURE (C) -78 -80 -25 2 1.204 1.202 1.200 1198 ~75-~60-25 0 25 50 75 100 125 150 175 TEMPERATURE (*C) Vin = 20V Vin = 12V ! Vin = BV Adjustable LT1575 Vper FB Input Bias Current vs Temperature vs Temperature 1.222 40 4220 35 4.218 ae 51.216 3 36 1.214 Boog 1.212 e a s > 1.210 Q 20 1.208 By 5 #1; 5 & 1206 z = = 0 -75 -50-25 0 26 50 75 100125 150 175 TEMPERATURE (C) S157" Bie LT1575-2.8 Voyy vs Temperature LT1575-3.3 Voyy vs Temperature 2.828 3.327 2.824 32 t 2.800 332 2.816 3.315 = 2.812 = 3.309 us 2,808 a = 2.808 = 2.303 a = 3 2 800 S 3.297 5% 5 320 & 2.792 ge 3201 3B 2.788 2 3.265 2.786 3.279 2.780 aor 2.776 - 3.273 2772 3.267 75-50 -25 0 25 50 75 100 125 150 175 -75-50-25 0 25 50 75 100125 150 175 TEMPERATURE (C) TEMPERATURE (<C) OUT Divider Current LT1575-5 Voyy vs Temperature vs Temperature 5.050 - 5.040 t 1 4 5.030 +--+} z 5.020 = oo & 5.010 & a 5 5 5.000 8 e ud p 4990 g 2 4.980 a 2 4.970 1 4.960 4.950 G5 ~ ~75 -50-25 0 25 50 75 100 126 150 175 TEMPERATURE (*C) -75-G0-25 0 25 0 75 100 125 150 175 TEMPERATURE (C) LY WAR 4-45LT1575/L11577 TYPICAL PERFORMANCE CHARACTERISTICS Veer/Vour Line Regulation Error Amplifier Large-Signal vs Temperature Voltage Gain vs Temperature 0.030 ;> T i 120 | 1 ' | a 115 0.025 }--| | + Lf s = 110 = ! | | | 2 = 0.020 od tt 2 S i | = 100 % 0.015 + S 95 2 Dl Le 5 ra | a 2 % oot a Eas Ti id gs 80 0.005 1 t > = Pir yy 75 0 pppoe i | 16 -75-50-25 0 26 50 75 100 125 150 175 -76-50-25 0 25 50 75 100 125 150 175 TEMPERATURE (*C) TEMPERATURE {C} ASB IT GG i ot Gate Output Swing Low Gate Output Swing High vs Temperature vs Temperature 3.00 36 \ =50mA | 2 LOAD = = 25 = 2.50 = 3 NO LOAD = 20 oo 2.25 wo z 2 & 2.00 & 15 po) 175 = 2 2 10 150 g o 1.25 o 95 1.00 -7-50-25 0 25 SOQ 75 100125 160 175 TEMPERATURE (C) sets 51 Current Limit Threshold Voltage vs Temperature 0 ~75-50-25 0 25 50 75 100125 150 175 TEMPERATURE (C) word 8 a oS 100 ERROR AMPLIFIER GAIN AND PHASE 1k 10k 1000 Ipos + Ing SUPPLY CURRENT (1A) e282 8 8 a BR) S \ 75-50-25 Gain and Phase vs Frequency ANT ve fh i Rall ee A 4 100k = 1M FREQUENCY (Hz) iy 100M IPOS + INEG Supply Current vs Temperature TL | It. IPOS = INEG = i | IPOS = INEG = 12V IPOS = INEG = av Ys. ja | | BZ TIPOS = INEG = 39 +~ ] . ! | i | PT | Prpetpee er L _ 0 25 50 75 100 125 150175 TEMPERATURE (C) | | 1ERE TT GS Current Limit Threshold Voltage Line Regulation vs Temperature 65 | TT I sot} 4 8 TI T 1 | i | I 50 45 40 CURRENT LIMIT THRESHOLD VOLTAGE (mv) \ 55 be wet ' IPOS = 3V gt CURRENT LIMIT THRESHOLD VOLTAGE LINE REGULATION (%/V/} | KK ai AMAL it 35 75 -50 -25 9 25 50 75 100125 150 175 TEMPERATURE (C) Ero -0.5 -75-50-25 0 25 50 TEMPERATURE (C; 75 100 125 150 175 4-46 LI titeLT1575/LT1577 TYPICAL PERFORMANCE CHARACTERISTICS 45 4.0 S SHDN Sink Current SHDN Source Current SHDN Low Clamp Voltage vs Temperature vs Temperature vs Temperature 75 0.25 ~ | T 7 "9 _ |i! | = 65 = = 020} : 3 6.0 5 = 1 | = 55 & 3 0.15 | {oid = 2 x o { | A L L 2 g FS 2 zZ 2 5 2 haskell | I 35 005 apt + : 3.0 | |! Lo 25 | l 20 i of 1 { Lo -76-60-25 0 25 50 75 100 125 150 175 -7-50-25 0 25 50 75 100 125 150 175 -75-50-25 Q 25 50 76 100 126 150 175 TEMPERATURE (7C) TEMPERATURE (C) TEMPERATURE (*C} SEVEN 37 AST G2e SHON High Clamp Voltage vs Temperature SHDN Hysteresis vs Temperature 24 T 150 -+ rt | 1] ya Mott 14 140 tt 1 +t a _ NK t _ _ 14 L : ; = 0 NN | ! __ 130 joe | in. Eig ee = 120} tan ft og po { : rod g NUTT gp tot = peep A & foo Fo | 18 pp 100 p-+t- + aot ye EN 2 yl _ i ; 1 90 + ' B47 aL | | f 4 z 90 Lt i i x mob ppm bp z : | i i : 5 . yw | : | | ii 5 16 ami Lf ap 0 PT i 1 1, et. lo Pat dp Gg TTP 15 : 1! 50 | L ai -75-50-25 0 25 50 75 100125 150 175 ~75~-50-25 G 25 80 75 100 125 150 175 TEMPERATURE ("C) TEMPERATURE (C) wsstgs WTF EE Ly Wee 4-47LT1575/L11577 PIN FUNCTIONS SHDN (Pin 1): This is a multifunction shutdown pin that provides GATE drive latchoff capability. A 15yA current source, that turns on when current limit is activated, charges a Capacitor placed in series with SHDN to GND and performs a current limit time-out function. The pin is also the input to a comparator referenced to Vag (1.21). When the pin pulls above Vaer, the comparator latches the gate drive to the external MOSFET off. The comparator typically has 100mV of hysteresis and the Shutdown pin can be pulled low to reset the latchoff function. This pin provides overvoltage protection or thermal shutdown protection when driven from various resistor divider schemes. Vin (Pin 2): This is the input supply for the IC that powers the majority of internal circuitry and provides sufficient gate drive compliance for the external N-channel MOSFET. The typical supply voltage is 12V with 12.5mA of quiescent current. The maximum operating Viy is 20V and the minimum operating Vin is set by Voyr + Ves of the MOSFET at max. Igy + 1.6V (worst-case Viy to GATE output swing). GND (Pin 3): Analog Ground. This pin is also the negative sense terminal for the internal 1.21V reference. Connect external feedback divider networks that terminate to GND and frequency compensation components that terminate to GND directly to this pin for best regulation and perfar- mance. FB (Pin 4): This is the inverting input of the error amplifier for the adjustable voltage LT1575. The noninverting input is tied to the internal 1.21V reference. input bias current for this pin is typically 0.6 flowing out of the pin. This pin is normally tied to a resistor divider network to set output voltage. Tie the top of the external resistor divider directly to the output voltage for best regulation performance. OUT (Pin 4): This is the inverting input of the error amplifier for the fixed voltage LT1575. The fixed voltage parts contain a precision resistor divider network to set output voltage. The typical resistor divider current is 1mA into the pin. Tie this pin directly to the output voltage for best regulation performance. COMP (Pin5): This is the high impedance gain node of the error amplifier and is used for external frequency compen- sation. The transconductance of the error amplifier is 15 millimhos and open-loop voltage gain is typically 84cB. Frequency compensation is generally performed with a series RC network to ground. GATE (Pin 6): This is the output of the error amplifier that drives N-channel MOSFETs with up to 5000pF of effec- tive gate capacitance. The typical open-loop output impedance is 2Q. When using low input capacitance MOSFETs (< 1500pF), a small gate resistor of 2Q to 100 dampens high frequency ringing created by an LC reso- nance that is created by the MOSFET gates lead induc- tance and input capacitance. The GATE pin delivers up to 50mA for a few hundred nanoseconds when slewing the gate of the N-channel MOSFET in response to output load current transients. INEG (Pin 7): This is the negative sense terminal of the current limit amplifier. A small sense resistor is connected in series with the drain of the external MOSFET and is connected between the IPOS and INEG pins. A 50mV threshold voltage in conjunction with the sense resistor value sets the current limit level. The current sense resis- tor can be a low value shunt or can be made from a piece of PC board trace. If the current limit amplifier is not used, tie the INEG pin to IPOS to defeat current limit. An alternative is to ground the INEG pin. This action disables the current limit amplifier and additional internal circuitry activates the timer circuit on the SHDN pin if the GATE pin swings to the Viy rail. This option provides the user with a sense-less current limit function. IPOS (Pin 8): This is the positive sense terminal of the current limit amplifier. Tie this pin directly to the main input voltage fram which the output voltage is regulated. The typical input voltage is a 5V iogic supply. This pin is also the input to a comparator on the fixed voltage ver- sions that monitors the input/output differential voltage of the external MOSFET. If this differential voltage is less than 0.5V, then the SHDN timer is not allowed to start even ifthe GATE is at the Vx rail. This allows the regulator to start up normally as the input voltage is ramping up, even with very Slaw ramp rates. 4-48 LT LnteAeLT1575/LT1577 BLOCK DIAGRAM LT1575 Adjustable Voltage 1 15pA NORMALLY OPEN + COMP! 2 ~ , SHA HYSTERESIS NORMALLY CLOSED Vino START-UP COMPS v eO+ + ERROR AMP AT ieee 4-49LT1575/LT1577 BLOCK DIAGRAM LT1575 Fixed Voltage " 15pA NORMALLY OPEN + COMP 100mV HYSTERESIS l2 uA Sw2 COMP? NORMALLY CLOSED + + START-UP COMPS + ERROR AMP *VoiT = (1 + R3/R4)Vper 4-50 LT WeeAPPLICATIONS INFORMATION Introduction The current generation of microprocessors place strin- gent demands on the power supply that powers the processor core. These microprocessors cycle load cur- rent from near zero to amps in tens of nanoseconds. Output voltage tolerances as low as +100mV inciude transient response as part of the specification. Some microprocessors require only a single output voltage from which the core and 1/0 circuitry operate. Other higher performance processors require a Separate power supply voltage for the processor core and the I/O circuitry. These requirements mandate the need for very accurate, very high speed regulator circuits. Previously employed solutions included monolithic 3-terminal linear regulators, PNP transistors driven by low cost control circuits and simple buck converter switching regulators. The 3-terminal regulator achieves a high level of integration, the PNP driven regulator achieves very low dropout performance and the switching regulator achieves high electrical efficiency. However, the common trait manifested by these solutions is that transient response is measured in many microsec- onds. This fact translates to a regulator output decoupling capacitor scheme that requires several hundred microfar- ads of very low ESR bulk capacitance using multiple Capacitors surrounding the CPU. This required bulk ca- pacitance is in addition to the ceramic decoupling capaci- tor network that handles the transient load response during the first few hundred nanoseconds as well as providing microprocessor clock frequency noise immu- nity. The combined cost of all capacitors is a significant percentage of the total power supply cost. The LT1575/LT1577 family of single/dual controller ICs are unique, easy to use devices that drive external N-channel MOSFETs as source followers and permita user to realize an extremely low dropout, ultrafast transient response regulator. These circuits achieve superior regu- lator bandwidth and transient load performance by com- pletely eliminating expensive tantalum or bulk electrolytic capacitors in the most madern and demanding micropro- cessor applications. For example, a 200MHz Pentium processor can operate with only the recommended 24 1pF ceramic capacitors. Users benefit directly by saving sig- LT1575/L11577 nificant cost as all additional bulk capacitance is removed. The additional savings of insertion cost, purchasing/in- ventory cost and board space are readily apparent. Precision-trimmed adjustable and fixed output voltage versions accommodate any required microprocessor pawer supply voltage. Proper selection of the N-channel MOSFET Rpsion) allows user-settable dropout voltage performance. The only output capacitors required are the high frequency ceramic decoupling capacitors. This regu- lator design provides ample bandwidth and responds to transient load changes in a few hundred nanoseconds versus regulators that respond in many microseconds. The ceramic capacitor network generally consists of 10 to 24 1uF capacitors for individual microprocessor require- ments. The LT1575/LT1577 famity also incorporates cur- rent limiting for no additional system cost, provides on/off control and overvoltage protection or thermal shutdown with simple external components. Therefore, the unique design of these new ICs combines the benefits of low dropout voltage, high functional inte- gration, precision performance and ultrafast transient response, as well as providing significant cost savings on the output capacitance needed in fast load transient appli- cations. As lower input/output differential voltage applica- tions become increasingly prevalent, an LT1575-based solution achieves comparable efficiency performance with a switching regulator at an appreciable cost savings. The new LT1575/LT1577 family of low dropout regulator controller ICs step to the next level of performance re- quired by system designers for the latest generation motherboards and microprocessors. The simple versatil- ity and benefits derived from these circuits allow the power supply needs of todays high performance micro- processors to be met with ease. Block Diagram Operation The primary block diagram elements consist of a simpie feedback control loop and the secondary block diagram elements consist of multiple protection functions. Exam- ining the block diagram for the LT1575, a start-up circuit provides controlled start-up for the IC, including the precision-trimmed bandgap reference, and establishes all internal current and voltage biasing. LI te 4-51LT1575/LT1577 APPLICATIONS INFORMATION Reference voltage accuracy for the adjustable version and output voltage accuracy for the fixed voltage versions are specified as +0.6% at room temperature and as + 1% over the full operating temperature range. This places the L1575/LT1577 family among a select group of regulators with a very tightly specified output voltage tolerance. The accurate 1.21V reference is tied to the noninverting input of the main error amplifier in the feedback contro! loop. The error amplifier consists of a single high gain g, stage with a transconductance equal to 15 millimhos. The inverting terminal is brought out.as the FB pin in the adjustable voltage version and as the OUT pin in fixed voltage versions. The gm stage provides differential-to- single ended conversion at the COMP pin. The output impedance of the gp, stage is about 1MQ and thus, 84dB of typical DC error amplifier open-loop gain is realized along with a typical 75MHz uncompensated unity-gain crossover frequency. Note that the overall feedback ioops DC gain decreases from the gain provided by the error amplifier by the attenuation factor in the resistor divider network which sets the DC output voltage. These attenuation factors are already built into the Open-Loop Voltage Gain specifications for the LT1575 fixed voltage versions in the Electrical Characteristics table to simplify user calculations. External access to the high impedance gain node of the error amplifier permits typical loop compensation to be accomplished with a series RC network to ground. Ahigh speed, high current output stage buffers the COMP node and drives up to S000pF of effective MOSFET gate capacitance with almost no change in load transient per- formance. The output stage delivers up to 50mA peak when slewing the MOSFET gate in response to load current transients. The typical output impedance of the GATE pin is typically 2Q. This pushes the pale due to the error amplifier output impedance and the MOSFET input capacitance well beyond the loop crossover frequency. If the capacitance of the MOSFET used is less than 1500pF, it may be necessary to add a small value series gate resistor of 2Q to 10@. This gate resistor helps damp the LC resonance created by the MOSFET gate's lead induc- tance and input capacitance. In addition, the pole formed by this resistance and the MOSFET input capacitance can be fine tuned. Because the MOSFET pass transistor is connected as a source follower, the power path gain is much more pre- dictable than designs that employ a discrete PNP transis- tor as the pass device. This is due to the significant production variations encountered with PNP Beta. MOSFETs are aiso very high speed devices which enhance the ability to produce a stable wide bandwidth contro! loop. An additional advantage of the follower topology is inherently good line rejection. input supply disturbances do not propagate through to the output. The feedback loop for a regulator circuit is completed by providing an error signal to the FB pin in the adjustable voltage version and the OUT pin in the fixed voltage version. In both cases, a resistor divider network senses the output voltage and sets the regulated DC bias point. In general. the L71575 regulator feedback loop permits a loop crossover fre- quency on the order of 1MHz while maintaining good phase and gain margins. This unity-gain frequency is a factor of 20 to 30 times the bandwidth of currently implemented regulator solutions for microprecessor power supplies. This significant performance benefit is what permits the elimination of all bulk output capacitance. Several other unique features are included in the design that increase its functionality and robustness. These func- tions comprise the remainder of the block diagram. A high side sense, current limit amplifier provides active current limiting for the regulator. The current limit ampli- fier uses an external low value shunt resistor connected in series with the external MOSFETs drain. This resistor can be a discrete shunt resistor or can be manufactured from a Kelvin-sensed section of free PC board trace. All load current flows through the MOSFET drain and thus, through the sense resistor. The advantage of using high side current sensing in this topology is that the MOSFET's gain and the main feedback loops gain remain unaffected. The sense resistor develops a voltage equal to Iqu7(Rsense). The current limit amplifier's 50mV threshold valtage is a good compromise between power dissipation in the sense resistor, dropout voltage impact and noise immunity. Current limit activates when the sense resistor voltage equals the 50mV threshold. Two events occur when current limit activates: the first is that the current limit amplifier drives Q2 in the block 4-52 LT TNRAPPLICATIONS INFORMATION diagram and clamps the positive swing of the COMP node in the main error amplifier to a voltage that provides an output load current of 50mV/Rgense. This action contin- ues as long as the output current overload persists. The second event is that a timer circuit activates at the SHDN pin. This pinis normally held low by a 5A active pull-down that limits to = 100mV above ground. When current limit activates, the 5pA pull-down turns off and a 15yA pull-up current source turns on. Placing a capacitor in series with the SHON pin to ground generates a programmable time ramp voltage. The SHDN pin is also the positive input of COMP1. The negative inputis tied to the internal 1.21V reference. When the SHDN pin ramps above Vper, the comparator drives Q4 and Q5. This action pulls the COMP and GATE pins low and latches the external MOSFET drive off. This condition reduces the MOSFET power dissipation to zero. The time period until the iatched-off condition occurs is typically equal to Cgyy7(1.14V)/15pA. For example, a 1pF capacitor on the SHDN pin yields a 74ms ramp time. In short, this unique circuit block performs a current limit time-out function that latches off the regulator drive after a pre- defined time period. The time-out period selected is a function of system requirements including start-up and safe operating area. The SHDN pin is internally clamped to typically 1.85V by Q6 and R2. The comparator tied to the SHDN pin has 100mV of typical hysteresis to provide noise immunity. The hysteresis is especially useful when using the SHDN pin for thermal shutdown. Restoring normal operation after the joad current fault is cleared is accomplished in two ways. One option is to recycle the nominal 12V LT1575 supply voltage as long as an external bleed path for the Shutdown pin capacitor is provided. The second option is to provide an active reset circuit that pulls the SHDN pin below Vaer. Pulling the SHDN pin below Vper turns off the 154 pull-up current source and reactivates the 5yA pull-down. ifthe SHDN pin is held below Vper during a fault condition, the regulator continues to operate in current limit into a short. This action requires being able to sink 15pA from the SHDN pin at less than 1V. The 5p) pull-down current source and the 15yA pull-up current source are designed low enough in value so that an external resistor divider network can drive the SHDN pin to provide overvoltage protection or to LT1575/L11577 provide thermal shutdown with the use of a thermistor in the divider network. Diode-ORing these functions to- gether is simple to accomplish and provides multiple functionality for one pin. lf the current limit amplifier is not used, two choices present themselves. The simplest choice is to tie the INEG pin directly to the IPOS pin. This action defeats current limit and provides the simplest, no frills circuit. An appli- cation in which the current limit amplifier is not used is where an extremely low dropout voltage must be achieved and the 50mV threshold voltage cannot be tolerated. However, a second available choice permits a user to provide short-circuit protection with no external sensing. This technique is activated by grounding the INEG pin. This action disables the current limit amplifier because Schottky diode D1 clamps the amplifiers output and prevents Q2 fram pulling down the COMP node. in addi- tion, Schottky diode D2 turns off pull-down transistor Q1. Q1 is normally on and holds internal comparator COMP3s output low. This comparator circuit, now enabled, mani- tors the GATE pin and detects saturation at the positive rail. When a saturated condition is detected, COMPS activates the shutdown timer. Once the time-out period occurs, the output is shut down and latched off. The operation of resetting the latch remains the same. Note that this tech- nique does not limit the FET current during the time-out period. The output current is only limited by the input power supply and the input/output impedance. Setting the timer to a short period in this mode of operation keeps the external MOSFET within its SOA (safe operating area} boundary and keeps the MOSFET's temperature rise under control. Unique circuit design incorporated into the LT1575 allevi- ates all concerns about power supply sequencing. The issue of power supply sequencing is an important topic as the typical LT1575 application has inputs from two sepa- rate power supply voltages. If the typical 12V Vy supply voltage is slow in ramping up, insufficient MOSFET gate drive is present and therefore, the output voltage does not come up. lf the Vix Supply voltage is present, but the typical 5V supply voltage tied to the IPOS pin has not started yet, then the feedback loop wants to drive the GATE pin to the positive Viy rail. This would result in a LT Une 4-53LT1575/LT1577 APPLICATIONS INFORMATION very large current spike as soon as the 5V supply started to ramp up. However, undervottage iockout circuit COMP2, which monitors the IPOS supply voltage, holds Q3 onand pulls the COMP pin low until the IPOS voltage increases to greater than the internal 1.21 reference voltage. The undervoltage lockout circuit then smoothly releases the COMP pin and allows the output voltage fo come up in dropout from the input supply voltage. An additional benefit derived from the speed of the LT1575 feedback loop is that turn-on overshoot is virtually nonexistent in a properly compensated system. An additional circuit feature is built-in to the LT1575 fixed voltage versions. When the regulator circuit starts up, it must charge up the output capacitors. The output voltage typically tracks the input voltage supply as itramps up with the difference in input/output voltage defined by the drop- out voltage. Until the feedback loop comes into regulation, the circuit operation results in the GATE pin being at the positive Vix rail, which starts the timer at the SHDN pin if the current limit amplifier is disabled. However, internal comparator COMP4 monitors the input/output voltage differential. This comparator does not permit the shut- down timer to start until the differential voltage is greater than 500mV. This permits normal start-up to occur, One final benefit is derived in using an LT1575 fixed voltage version. Today's highest performance micropro- cessors dictate that precision resistors must De used with currently available adjustable voltage regulators to meet the initial set point tolerance. The LT1575 fixed voltage versions incorporate the precision resistor divider into the iG and still maintain a 1% output voltage tolerance over temperature. Thus, the LT1575 fixed voltage versions completely eliminate the requirement for precision resis- tors and this results in additional system cost savings. Applications Support Linear Technology invests an enormous amount of time, resources and technical expertise in understanding, de- signing and evaluating microprocessor power supply so- lutions for system designers. As processor speeds and power increase, the power supply challenges presented to the motherboard designer increase as well. Application Note 69. Using the LT1575 Linear Regulator Controller, has been written and Serves as an extremely useful guide for this new family of ICs. This Application Note covers topics including PC board layout for the LT1575/1T1577 family, MOSFET selection criteria, external component selection (capacitors) and loop compensation. Linear Technology welcomes the opportunity to discuss. design, evaluate and optimize a microprocessor power supply solution with a customer. For additional information, consult the factory. TYPICAL APPLICATIONS UitraFast Transient Response 5V to 3.5V Low Oropout Regulator with Current Limit and Timer Latchoff L11675-2.6 SHON IPaS . ali R3 s INEG F- ora GND GATE F v th os 5 _ e OUT COMP Fy se oO AP 226pF 124 1 t+ op ae 2 reseT| | uF AL 0 ep vn2o221] a 4 R3 IS MADE FROM [ FREE PC BOARD TRACE 0B = 24 Luk MPR CERAMIC SURFACE MOUNT CAPACITORS. PLACE C6 iN THE MICROPROCESSOR SOCKET CAVITY fone ta 7000pF GND "# [-1 4-54 LI UNTYPICAL APPLICATIONS Setting Output Voltage with the Adjustable 111575 Vout Vpyr = 1.2tvut + 2A) $578 Tags Setting Current Limit POS -p Ver 2 Reense INEG j GATE + 5 Vour hw = 5OmV Reese Rgense = DISCRETE SHUNT RESISTOR OR Aigeuse = KELVIN-SENSEO PC BOARD TRACE ACTIVATING CURRENT LIMIT ALSO ACTIVATES THE SHDN PIN TIMER STE Tate Shutdown Time-Out with Reset SHDN RESET a1 ovto sv] sri > 100% Cr = 15uAttyvti1y t = SHUTDOWN LATCHOFF TIME evs iaz Shutdown Time-Out with Reset R2 100k RESET AAA OV TO 5V SHDN Q2 2N3906 < { C2 = 15uA(t 1.11 t = SHUTDOWN LATGH-OFF TIME 138 FOE LT1575/L11577 Using Sense-Less Current Limit Rg 1022 _ SHDN IPOS Voc Ci Cy VOUT rst Setting Current Limit with Foldback Limiting IPOS Veo aS Sha iNEG > 1N4148 b2 eins pe GATE ++ Q3 $A6 < 2 12k To, Your Basic Thermal Shutdown 5V RTI 10k NTC SHDN -AT1 = DALE NTHS-1208N02 THERMALLY MOUNT RT1 Rd {N CLOSE PROXIMITY 54902 TO THE EXTERNAL = N-GHANNEL MOSFET c-s ta Overvoltage Protection Vout R6 SHON RS SSSA Vouryutn; = 1-24(R6/RS) + SARE? Vourth = 1.1 1R6/RS) 15pAtR6) LI Wye 4-55LT1575/LT1577 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1266 Current Mode, Step-Up/Down Switching Regulator Controller Synchronous N- or P-Channel FETs, Comparator/Low Battery Detector LT01392 Micrepower Temperature, Power Supply and Differential Temperature to Bits Control Voltage Monitor LTC1430 High Power Step-Down Switching Regulator Controiler Voltage Mode, 5V to 3.xxV at >10A LTC1435 High Efficiency, Low Noise Synchronous Step-Down Current Mode with Wide Input Voltage Rarige Switching Regulator LTC1552 Digitatly Cantrotled Synchronous Switching Regulator Controller _| Controller for Pentium Pra Processor LT1580 7A, Very Low Dropout Linear Regulator 0.54V Dropout at 7A, Fixed 2.5Voyr and Adjustable LT1585-1.5 Fixed 1.5V, 5A Low Dropout Fast Response Regulator GTL+ Regulator Pentium is a registered trademark of Intel Corporation. 4-56 LT We