Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator
•Wide Operating Voltage: 2.5~6V
•Low Dropout Voltage: 290mV @ 3V/300mA
•Fixed Output Voltages: 1.2~3.7V with Step 100mV,
and 2.85V, 4.75V
•Guaranteed 300mA Output Current
•High PSRR: 70dB
•Current-Limit Protection
•Controlled Short-Circuit Current: 50mA
•Over-Temperature Protection
•Stable with 1µF Capacitor for Any Load
•Excellent Load/Line Transient
•SOT-23-5, TSOT-23-5, SOT-23-3, SC-70-5,
VTDFN1.2x1.6-4, and TDFN1.6x1.6-6 Packages
•Lead Free and Green Devices Available
(RoHS Compliant)
The APL5320 is a P-channel low dropout linear regulator
which needs only one input voltage from 2.5 to 6V, and
delivers current up to 300mA to set output voltage. It also
can work with low ESR ceramic capacitors and is ideal for
using in the battery-powered applications such as note-
book computers and cellular phones. Typical dropout volt-
age is only 290mV at 300mA loading.
The APL5320 provides several versions of fixed output
voltages ranging from 1.2 to 3.7V with step 100mV and
2.85V, 4.75V. Current-limit with current foldback and ther-
mal shutdown functions protects the device against cur-
rent over-loads and over-temperature. The APL5320 is
available in SOT-23-5, TSOT-23-5, SOT-23-3, SC-70-5,
VTDFN1.2x1.6-4, and TDFN 1.6x1.6-6 packages.
FeaturesGeneral Description
Applications
•Cellular Phones
•Portable and Battery-Powered Equipments
•Laptops, Palmtops, Notebook Computers
•Wireless LANs
•Portable Information Appliances
•GPSes
Pin Configuration
Simplified Application Circuit
GND 25 VOUT
SHDN 34 NC
VIN 1
SOT23-5/TSOT-23-5/SC-70-5
(Top View)
VOUT 23 VIN
GND 1
SOT-23-3
(Top View)
VTDFN1.2x1.6-4
(Top View)
2
14
3SHDN
GND
VOUT VIN 1 6
5
43
2
SHDN
VIN
NC GND
VOUT
NC
TDFN1.6x1.6-6
(Top View)
= Exposed Pad (connected to ground
plane for better heat dissipation)
VIN VOUT
SHDN
GND
VIN VOUT
Enable
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw2
Ordering and Marking Information
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
SOT
-
23
-
5
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5320-12B
205X APL5320-13B
207X APL5320-14B
208X APL5320-15B
209X
APL5320-16B
20AX APL5320-17B
20BX APL5320-18B
20CX APL5320-19B
20DX
APL5320-20B
20EX APL5320-21B
20FX APL5320-22B
20GX APL5320-23B
20HX
APL5320-24B
20IX APL5320-25B
20JX APL5320-26B
20KX APL5320-27B
20LX
APL5320-28B
20MX APL5320-29B
20NX APL5320-30B
20OX APL5320-31B
20PX
APL5320-32B
20QX APL5320-33B
20RX APL5320-34B
20SX APL5320-35B
20TX
APL5320-36B
20gX APL5320-285B
20dX APL5320-37B
206X APL5320-475B
204X
Note: X - Code.
TSOT-23-5
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5320-12BT
205X APL5320-13BT
207X APL5320-14BT
208X APL5320-15BT
209X
APL5320-16BT
20AX APL5320-17BT
20BX APL5320-18BT
20CX APL5320-19BT
20DX
APL5320-20BT
20EX APL5320-21BT
20FX APL5320-22BT
20GX APL5320-23BT
20HX
APL5320-24BT
20IX APL5320-25BT
20JX APL5320-26BT
20KX APL5320-27BT
20LX
APL5320-28BT
20MX APL5320-29BT
20NX APL5320-30BT
20OX APL5320-31BT
20PX
APL5320-32BT
20QX APL5320-33BT
20RX APL5320-34BT
20SX APL5320-35BT
20TX
APL5320-36BT
20gX APL5320-285BT
20dX APL5320-37BT
206X APL5320-475BT
204X
Note: X - Code.
SOT-23-3
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5320-12A
205X APL5320-13A
207X APL5320-14A
208X APL5320-15A
209X
APL5320-16A
20AX APL5320-17A
20BX APL5320-18A
20CX APL5320-19A
20DX
APL5320-20A
20EX APL5320-21A
20FX APL5320-22A
20GX APL5320-23A
20HX
APL5320-24A
20IX APL5320-25A
20JX APL5320-26A
20KX APL5320-27A
20LX
APL5320-28A
20MX APL5320-29A
20NX APL5320-30A
20OX APL5320-31A
20PX
APL5320-32A
20QX APL5320-33A
20RX APL5320-34A
20SX APL5320-35A
20TX
APL5320-36A
20gX APL5320-285A
20dX APL5320-37A
206X APL5320-475A
204X
Note: X - Code.
APL5320 Package Code
B : SOT-23-5 BT : TSOT-23-5 A : SOT-23-3
S5 : SC-70-5 QB : TDFN1.6x1.6-6 QF: VTDFN1.2x1.6-4
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Voltage Code
12 : 1.2V 36 : 3.6V
Assembly Material
G : Halogen and Lead Free Device
Handling Code
Temperature Range
Package Code
Assembly Material
Voltage Code
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw3
Ordering and Marking Information (Cont.)
TDFN1.6x1.6-6
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5320-12QB
205
X APL5320-13QB
207
X APL5320-14QB
208
X APL5320-15QB
209
X
APL5320-16QB
20A
X APL5320-17QB
20B
X APL5320-18QB
20C
X APL5320-19QB
20D
X
APL5320-20QB
20E
X APL5320-21QB
20F
X APL5320-22QB
20G
X APL5320-23QB
20H
X
APL5320-24QB
20I
X APL5320-25QB
20J
X APL5320-26QB
20K
X APL5320-27QB
20L
X
APL5320-28QB
20M
X APL5320-29QB
20N
X APL5320-30QB
20O
X APL5320-31QB
20P
X
APL5320-32QB
20Q
X APL5320-33QB
20R
X APL5320-34QB
20S
X APL5320-35QB
20T
X
APL5320-36QB
20g
X APL5320-285QB
20d
X APL5320-37QB
206
X APL5320-475QB
204
X
Note: X - Code.
SC-70-5
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5320-12S5
205 AP5320-13S5
207 APL5320-14S5
208 APL5320-15S5
209
APL5320-16S5
20A APL5320-17S5
20B APL5320-18S5
20C APL5320-19S5
20D
APL5320-20S5
20E APL5320-21S5
20F APL5320-22S5
20G APL5320-23S5
20H
APL5320-24S5
20I APL5320-25S5
20J APL5320-26S5
20K APL5320-27S5
20L
APL5320-28S5
20M APL5320-29S5
20N APL5320-30S5
20O APL5320-31S5
20P
APL5320-32S5
20Q APL5320-33S5
20R APL5320-34S5
20S APL5320-35S5
20T
APL5320-36S5
20g APL5320-285S5
20d APL5320-37S5
206 APL5320-475S5
204
VTDFN1.2x1.6-4
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5320-12QF
05
X APL5320-13QF
07
X APL5320-14QF
08
X APL5320-15QF
09
X
APL5320-16QF
0A
X APL5320-17QF
0B
X APL5320-18QF
0C
X APL5320-19QF
0D
X
APL5320-20QF
0E
X APL5320-21QF
0F
X APL5320-22QF
0G
X APL5320-23QF
0H
X
APL5320-24QF
0I
X APL5320-25QF
0J
X APL5320-26QF
0K
X APL5320-27QF
0L
X
APL5320-28QF
0M
X APL5320-29QF
0N
X APL5320-30QF
0O
X APL5320-31QF
0P
X
APL5320-32QF
0Q
X APL5320-33QF
0R
X APL5320-34QF
0S
X APL5320-35QF
0T
X
APL5320-36QF
0g
X APL5320-285QF
0d
X APL5320-37QF
06
X APL5320-475QF
04
X
Note : X - Code.
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw4
Symbol
Parameter Range Unit
VIN VIN Input Voltage 2.5 ~ 6 V
VSHDN SHDN Input Voltage 2.5 ~ 6 V
IOUT VOUT Output Current 0 ~300 mA
VOUT Output Voltage Fixed Voltage
COUT Output Capacitor 1~22 µF
TA Ambient Temperature -40 ~ 85 oC
TJ Junction Temperature -40 ~ 125 oC
Recommended Operating Conditions (Note 3)
Note 3 : Refer to the typical application circuit.
Symbol
Parameter Typical Value Unit
θJA
Junction-to-Ambient Resistance in Free Air (Note 2) SOT-23-5
TSOT-23-5
SOT-23-3
SC-70-5
TDFN1.6x1.6-6
VTDFN1.2x1.6-4
240
250
240
325
165
100
oC/W
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Thermal Characteristics
Absolute Maximum Ratings (Note 1)
Symbol
Parameter Rating Unit
VIN VIN to GND Voltage -0.3 ~ 6.5 V
VOUT VOUT to GND Voltage -0.3 ~ 6.5 V
VSHDN SHDN to GND Voltage -0.3 ~ 6.5 V
TJ Maximum Junction Temperature -40 ~ 150 oC
TSTG Storage Temperature -65 ~ 150 oC
TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 oC
Note 1 : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN=VOUT+1V, CIN=COUT=1µF and TA=-40~85 oC. Typical
values are at TA=25oC.
APL5320
Symbol
Parameter Test Conditions Min.
Typ. Max.
Unit
UNDER-VOLTAGE LOCKAGE (UVLO) AND SUPPLY CURRENT
VIN UVLO Threshold Voltage VIN rising, TA=-40~85oC 1.9 2.2 2.4 V
VIN UVLO Hysteresis - 0.1 - V
IOUT=0mA, VSHDN=5V - 40 60 µA
IQ Quiescent Current IOUT=300mA VSHDN=5V - 40 60 µA
IQSHDN Shut Down Supply Current VSHDN=0V, VIN= VOUT+1V - - 1 µA
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw5
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VIN=VOUT+1V, CIN=COUT=1µF and TA=-40~85 oC. Typical
values are at TA=25oC.
APL5320
Symbol
Parameter Test Conditions Min. Typ. Max.
Unit
OUTPUT VOLTAGE
IOUT=1mA, TA=25 oC -2 - 2 %
Output Voltage Accuracy IOUT=1mA to 300mA, TA=-40~85oC -3 - 3 %
REGLINE
Line Regulation ΔVOUT%/ΔVIN, VOUT+0.3V<VIN<6V,
IOUT=1mA - - 0.2 %/V
REGLOAD
Load Regulation ΔVOUT%, VIN= VOUT+1V,
0mA<IOUT<300mA - - 0.6 %
VOUT=1.5V, IOUT=300mA - 0.52 0.68 V
VOUT=2V, IOUT=300mA - 0.43 0.56 V
VDROP
Dropout Voltage
VOUT=3V, IOUT=300mA - 0.29 0.38 V
OUTPUT VOLTAGE
f=1kHz - 70 - dB
f=10kHz - 63 - dB
PSRR
Ripple Rejection COUT=1µF,
IOUT=50mA f=100kHz - 35 - dB
Output Noise f=10Hz to 100kHz, COUT=10µF, IOUT = 1mA
- 100 - µVRMS
VOUT Discharge Resistance VSHDN=0V - 0.7 - kΩ
SHUT DOWN
High Threshold Voltage VIN=2.5 to 6V 1.5 - - V
VSHDN
Low Threshold Voltage VIN=2.5 to 6V - - 0.4 V
ISHDN SHDN Input Current VSHDN=5V - 0.2 - µA
PROTECTIONS
ILIMIT Current-Limit Threshold 330 450 750 mA
ISHORT
Short-Circuit Current VOUT =0V - 50 - mA
tSS Soft-Start VOUT rising from 0 to 90%, RLOAD=50Ω - 60 - µs
TOTP Over-Temperature Threshold TJ rising - 160 - oC
Over-Temperature Hysteresis - 40 - oC
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw6
Typical Operating Characteristics
Quiescent Current vs. Temperature
Quiescent Current (µA)
34
35
36
37
38
39
40
41
42
Temperature (oC)
APL5320-12,
VIN=VEN=4.2V
-40 -25 0 25 50 75 100 125
PSRR vs. Frequency Dropout Voltage vs. Output Current
Dropout Voltage (mV)
Output Current (mA)
TJ=-40oC
0
50
100
150
200
250
300
350
400
TJ=125oC
TJ=25oC
APL5320-30,
COUT=1µF
0 100 200 300
Output Noise Current-Limit Threshold vs. Input Voltage
-200
-100
0
100
200
Time (ms)
Output Noise (µV)
APL5320-12, IOUT=50mA,
VIN=VEN=4.2V(Battery)
0 20 40 60 80 100
Quiescent Current vs. Supply Voltage
Supply Voltage (V)
0123456
0
50
100
150
200
250
300
350
Quiescent Current (µA)
2.5 33.5 44.5 55.5
400
450
500
550
600
650
700
Current-Limit (mA)
Input Voltage (V) 6
PSRR (dB)
Frequency (Hz)
APL5320-12, VIN=4V,
COUT=1µF, IOUT=50mA
-100
-80
-60
-40
-20
0
100 1k 10k 100k 1M
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw7
Typical Operating Characteristics (Cont.)
Current-Limit Threshold vs. TemperatureQuiescent Current vs. Output Current
Output Current (mA)
Quiescent Current (µA)
APL5320-12, COUT=1µF,
VIN=VEN=4.2V
42
42.5
43
43.5
44
44.5
45
0 50 100 150 200 250 300
SHDN Pin Threshold Voltage vs.
Supply Voltage
EN Pin Threshold (V)
Supply Voltage (V)
2.5 33.5 44.5 55.5
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
6
SHDN Rising Threshold
SHDN Falling Threshold
Current-Limit (mA)
Temperature (oC)
300
350
400
450
500
550
600
650
700
-40 -25 025 50 75 100 125
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw8
Operating Waveforms
The test condition is VIN=4.2V, TA= 25oC unless otherwise specified.
Load Transient Response
CH1: VOUT, 50mV/Div, DC, Offset=1.2V
TIME: 20µs/Div
VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF,
IOUT =10mA to 300mA to 10mA (Rise/Fall time=1µs)
CH2: IOUT, 200mA/Div, DC
Load Transient Response
VOUT
1
IOUT
2
CH1: VOUT, 50mV/Div, DC, Offset=1.2V
TIME: 20µs/Div
VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF,
IOUT =10mA to 150mA to 10mA (Rise/Fall time=1µs)
CH2: IOUT, 100mA/Div, DC
Load Transient Response
IOUT
1
2
VOUT
1
2IOUT
VOUT
CH1: VOUT, 20mV/Div, DC, Offset=1.2V
TIME: 20µs/Div
VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF,
IOUT =10mA to 50mA to 10mA (Rise/Fall time=1µs)
CH2: IOUT, 50mA/Div, DC
Line Transient Response
1
2
VIN
VOUT
CH1: VIN, 500mV/Div, DC, Offset=3.8V
TIME: 20µs/Div
VIN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µs),
VOUT=1.2V, CIN =COUT =1µF, IOUT =100mA
CH2: VOUT, 20mV/Div, DC, Offset=1.2V
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw9
Operating Waveforms (Cont.)
The test condition is VIN=4.2V, TA= 25oC unless otherwise specified.
Line Transient Response Line Transient Response
VIN
1
2VOUT
1
2
VIN
VOUT
Exiting ShutdownEntering Shutdown
VSHDN
1
2VOUT
1
2
VSHDN
VOUT
CH1: VIN, 500mV/Div, DC, Offset=3.8V
TIME: 20µs/Div
VIN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µs),
VOUT=1.2V, CIN =COUT =1µF, IOUT =50mA
CH2: VOUT, 20mV/Div, DC, Offset=1.2V CH1: VIN, 500mV/Div, DC, Offset=3.8V
TIME: 20µs/Div
VIN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µs),
VOUT=1.2V, CIN =COUT =1µF, IOUT =10mA
CH2: VOUT, 20mV/Div, DC, Offset=1.2V
TIME: 10µs/Div
CH2: VOUT, 500mV/Div, DC
CH1: VSHDN, 2V/Div, DC
VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF,
IOUT =10mA
CH1: VSHDN, 2V/Div, DC
TIME: 20µs/Div
VIN =4.2V, VOUT=1.2V, CIN =COUT =1µF,
IOUT =10mA
CH2: VOUT, 500mV/Div, DC
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw10
Pin Description
PIN
NO.
SOT-23-5/
TSOT-23-5/
SC-70-5
SOT-23-3
TDFN
1.6x1.6-6
VTDFN
1.2x1.6-4
NAME FUNCTION
1 3 3 4 VIN Voltage Supply Input Pin.
2 1 6 2 GND Ground.
3 - 1 3 SHDN Shut Down Control Pin. Logic high: enable; logic low: shutdown
.
This pin can not be left floating.
4 - 2, 5 - NC NC Pin.
5 2 4 1 VOUT Regulator Output Pin.
Block Diagram
Typical Application Circuit
Shutdown
VIN
SHDN GND
VOUT
APL5320
VIN
Enable
CIN
1µF
VOUT
COUT
1µF
Thermal
Shutdown
GND
SHDN
VOUT
-
+
VIN
Current-
Limit
UVLO &
Shutdown
Logic
Foldback
Current-Limit
VREF
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw11
Function Description
Internal Soft-Start
An internal soft-start function controls rising rate of the
output voltage to limit the surge current at start-up. The
typical soft-start interval is about 60µs.
Thermal Shutdown
A thermal shutdown circuit limits the junction tempera-
ture of APL5320. When the junction temperature exceeds
+160oC, a thermal sensor turns off the output PMOS, al-
lowing the device to cool down. The regulator regulates
the output again through initiation of a new soft-start cycle
after the junction temperature cools by 40oC.The thermal
shutdown is designed with a 40oC hysteresis to lower
the average junction temperature during continuous ther-
mal overload conditions, extending lifetime of the device.
For normal operation, device power dissipation should
be externally limited so that junction temperature will not
exceed 125oC.
Current-Limit with Current Foldback
The APL5320 monitors the current via the output PMOS
and limits the maximum current. When the output current
reaches the current-limit threshold, current-limit with cur-
rent foldback circuit starts to work to prevent load and
APL5320 from damages during overload or short-circuit
conditions. Typical foldback current is about 50mA.
Shutdown Control
The APL5320 has an active-low shutdown function. Forc-
ing SHDN high (>1.5V) enables the VOUT; forcing SHDN
low (<0.4V) disables the VOUT. The SHDN can not be left
floating. If it is not used, connect it to VIN for normal
operation.
Under-Voltage Lock Out (UVLO)
The APL5320 monitors the input voltage to prevent wrong
logic control. The UVLO function initiates a soft-start pro-
cess after input voltage exceeds its rising UVLO thresh-
old during power on. The UVLO function also shuts off
the output when the input voltage falls below it’s falling
threshold.
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw12
Application Information
The APL5320 requires proper input capacitors to supply
surge current during stepping load transients to prevent
the input rail from dropping. Because the parasitic induc-
tor from the voltage sources or other bulk capacitors to
the VIN limit the slew rate of the surge current, place the
Input capacitors near VIN as close as possible. Input
capacitors should be larger than 1µF and a minimum
ceramic capacitor of 1µF is necessary.
Output Capacitor
The APL5320 needs a proper output capacitor to main-
tain circuit stability and improve transient response over-
temperature and current. In order to insure the circuit
stability, the proper output capacitor value should be larger
than 1µF. With X5R and X7R dielectrics, 1µF is sufficient
at all operating temperatures. Large output capacitor
value can reduce noise and improve load-transient re-
sponse and PSRR, Figure 1 shows the curves of allow-
able ESR range as the function of load current for various
output capacitor values.
Output Current (mA)
Region of Stable COUT ESR (Ω)
Region of Stable COUT ESR vs. Output Current
APL5320-12
VIN=VEN=4.2V
CIN=COUT=1µF/X7R
Unstable Range
Stable Range
Simulation Verify
050 100 150 200 250 300
0.001
0.01
0.1
1
10
Figure1. Stable COUT ESR Range
Operation Region and Power Dissipation
The APL5320 maximum power dissipation depends on
the thermal resistance and temperature difference be-
tween the die junction and ambient air. The TDFN1.6x1.6-6
package power dissipation PD across the device is:
PD = (TJ - TA) / θJA
where (TJ - TA) is the temperature difference between the
junction and ambient air. θJA is the thermal resistance
between Junction and ambient air. Assuming the TA=25oC
and maximum TJ=160oC (typical thermal limit threshold),
the maximum power dissipation is calculated as:
PD(max)=(160-25)/165=0.81(W)
For normal operation, do not exceed the maximum junc-
tion temperature rating of TJ=125oC. The calculated power
dissipation should be less than:
PD=(125-25)/165=0.6(W)
The GND provides an electrical connection to the ground
and channels heat away. Connect the GND to the ground
by using a large pad or a ground plane.
Layout Consideration
Figure 2 illustrates the layout. Below is a checklist for
your layout:
1. Please place the input capacitors close to the VIN.
2. Ceramic capacitors for load must be placed near the
load as close as possible.
3. To place APL5320 and output capacitors near the load
is good for performance.
4. Large current paths, the bold lines in figure 2, must
have wide tracks.
Figure2. Large Current Paths Shown as Bold Lines
Input capacitor
VIN VOUT
SHDN
GND
VIN VOUT
ON
OFF
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw13
Application Information(Cont.)
Recommended Minimum Footprint
1.27
0.5
2.54
0.95
1.90
Unit: mm
SOT-23-5/TSOT-23-5
1.17
0.3
2.06
0.65
1.30
Unit: mm
SC-70-5
0.45
2.0
1.6
0.25
0.5
0.6
0.8
Thermal Via
Φ0.30mm
Unit:mm
TDFN1.6x1.6-6
Unit: mm
VTDFN1.2x1.6-4
0.45
0.35
2.1
0.6
0.7
1.0
Thermal Via
Φ0.30mm
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw14
Package Information
SOT-23-5
MAX.
0.057
0.051
0.024
0.006
0.009
0.0200.012
L0.30
0
e
e1
E1
E
D
c
b
0.08
0.30
0.60 0.012
0.95 BSC
1.90 BSC
0.22
0.50
0.037 BSC
0.075 BSC
0.003
MIN.
MILLIMETERS
S
Y
M
B
O
L
A1
A2
A
0.00
0.90
SOT-23-5
MAX.
1.45
0.15
1.30
MIN.
0.000
0.035
INCHES
°
8
°
0
°
8
°
0
bc
e1
0
L
VIEW A
0.25
GAUGE PLANE
SEATING PLANE
A
A2A1
e
D
E
E1
SEE
VIEW A
1.40
2.60
1.80
3.00
2.70 3.10 0.122
0.071
0.1180.102
0.055
0.106
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw15
Package Information
TSOT-23-5
S
Y
M
B
O
LMIN. MAX.
1.00
0.01
0.08 0.22
0.10
A
A1
c
D
E
E1
e
e1
L
MILLIMETERS
b0.30 0.50
0.95 BSC
TSOT-23-5
0.30 0.60
0.037 BSC
MIN. MAX.
INCHES
0.039
0.000
0.028 0.035
0.003 0.009
0.012 0.024
0
0.004
A2 0.70 0.90
0.012 0.020
1.90BSC 0.075 BSC
°
0
°
8
°
0
°
8
1.40 1.80
2.60 3.00
2.70 3.10 0.106 0.122
0.055 0.071
0.102 0.118
Note : 1. Followed from JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per
side.
0.70 0.028
SEE VIEW A
c
E1
E
De
e1
b
A
A2A1
VIEW A
LSEATING PLANE
GAUGE PLANE
0.25
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw16
Package Information
SC-70-5
S
Y
M
B
O
LMIN. MAX.
1.10
0.00
0.08 0.25
0.10
A
A1
c
D
E
E1
e
e1
L
MILLIMETERS
b0.15 0.30
0.65 BSC
SC-70-5
0.15 0.45
0.026 BSC
MIN. MAX.
INCHES
0.043
0.000
0.031 0.040
0.003 0.010
0.006 0.018
00o8o0o8o
0.004
A2 0.80 1.00
0.006 0.012
1.30 BSC 0.051 BSC
1.90 2.20 0.075 0.087
2.00 2.40
1.15 1.35
0.079 0.095
0.045 0.053
0.80 0.031
Note : 1. Followed from JEDEC MO-223 AB.
2. Dimension D and E1 do not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
A
A2A1
VIEW A
L
0.15
GAUGE PLANE
SEATING PLANE
SEE VIEW A
c
e1
b
E
E1
e
D
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw17
Package Information
SOT-23-3
0
L
VIEW A
0.25
GAUGE PLANE
SEATING PLANE
A
A2
A1
e
D
E
E1
SEE
VIEW A
bc
e1
MAX.
0.057
0.051
0.024
0.006
0.009
0.0200.012
L0.30
0
e
e1
E1
E
D
c
b
0.08
0.30
0.60 0.012
0.95 BSC
1.90 BSC
0.22
0.50
0.037 BSC
0.075 BSC
0.003
MIN.
MILLIMETERS
S
Y
M
B
O
L
A1
A2
A
0.00
0.90
SOT-23-3
MAX.
1.45
0.15
1.30
MIN.
0.000
0.035
INCHES
°
8
°
0
°
8
°
0
1.40
2.60
1.80
3.00
2.70 3.10 0.122
0.071
0.1180.102
0.055
0.106
Note : Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw18
Package Information
TDFN1.6x1.6-6
MIN. MAX.
0.80
0.00
0.20 0.30
0.95 1.05
0.05
0.55
A
A1
b
D
D2
E
E2
e
K
MILLIMETERS
A3 0.20 REF
TDFN1.6x1.6-6
0.20 -
0.65
0.008 REF
MIN. MAX.
INCHES
0.031
0.000
0.008 0.012
0.037 0.041
0.022
0.008 -
0.70
0.026
0.028
0.002
0.50 BSC 0.020 BSC
S
Y
M
B
O
L
1.55 1.65 0.061 0.065
1.55 1.65 0.061 0.065
L0.19 0.29 0.007 0.011
D2
E2
KL
e
Pin 1 Corner
A
b
A1
A3
D
E
Pin 1
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw19
Package Information
VTDFN1.2x1.6-4
S
Y
M
B
O
LMIN. MAX.
0.60
0.25 0.35
0.65 0.75
0.95
A
b
D
D2
E
E2
e
MILLIMETERS
VTDFN1.2x1.6-4
1.05
MIN. MAX.
INCHES
0.024
0.010 0.014
0.026 0.030
0.037
0.50
0.041
0.020
0.60 BSC 0.024 BSC
1.55 1.65 0.061 0.065
1.15 1.25 0.045 0.049
L0.10 0.30 0.004 0.012
K0.20 0.008
LKD2
Pin 1 Cirner
e
E2
E
DA
b
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw20
Carrier Tape & Reel Dimensions
A
E1
A
B
W
F
T
P0
OD0
BA0
P2
K0
B0
SECTION B-B
SECTION A-A
OD1
P1
H
T1
A
d
Application
A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SOT-23-5
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
Application
A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
TSOT-23-5
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
Application
A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SOT-23-3
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
(mm)
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw21
Application A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-
0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.50±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SC-70-5
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.00 MIN.
0.6+0.00
-0.40
2.40±0.20
2.40±0.20
1.20±0.20
Application A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
TDFN1.6x1.6-6
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
1.70±0.20
1.70±0.20
0.90±0.20
Application A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.20
1.75±0.10
3.50±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
VTDFN1.2x1.6-4
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.4 1.4 MIN
1.8 MIN
0.75±0.20
(mm)
Carrier Tape & Reel Dimensions (Cont.)
Devices Per Unit
Taping Direction Information
(T)SOT-23-5
USER DIRECTION OF FEED
Package Type Unit Quantity
SOT-23-5 Tape & Reel 3000
TSOT-23-5 Tape & Reel 3000
SOT-23-3 Tape & Reel 3000
SC-70-5 Tape & Reel 3000
TDFN1.6x1.6-6 Tape & Reel 3000
VTDFN1.2x1.6-4 Tape & Reel 3000
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw22
Taping Direction Information (Cont.)
TDFN1.6x1.6-6
USER DIRECTION OF FEED
SC-70-5
USER DIRECTION OF FEED
SOT-23-3
USER DIRECTION OF FEED
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw23
VTDFN1.2x1.6-4
Taping Direction Information (Cont.)
USER DIRECTION OF FEED
Classification Profile
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw24
Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
Average ramp-up rate
(Tsmax to TP) 3 °C/second max. 3 °C/second max.
Liquidous temperature (TL)
Time at liquidous (tL) 183 °C
60-150 seconds 217 °C
60-150 seconds
Peak package body Temperature
(Tp)* See Classification Temp in table 1 See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc) 20** seconds 30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max. 6 °C/second max.
Time 25°C to peak temperature 6 minutes max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness Volume mm3
<350 Volume mm3
350-2000 Volume mm3
>2000
<1.6 mm 260 °C 260 °C 260 °C
1.6 mm – 2.5 mm 260 °C 250 °C 245 °C
≥2.5 mm 250 °C 245 °C 245 °C
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness Volume mm3
<350 Volume mm3
≥350
<2.5 mm 235 °C 220 °C
≥2.5 mm 220 °C 220 °C
Test item Method Description
SOLDERABILITY JESD-22, B102 5 Sec, 245°C
HOLT JESD-22, A108 1000 Hrs, Bias @ Tj=125°C
PCT JESD-22, A102 168 Hrs, 100%RH, 2atm, 121°C
TCT JESD-22, A104 500 Cycles, -65°C~150°C
HBM MIL-STD-883-3015.7 VHBM≧2KV
MM JESD-22, A115 VMM≧200V
Latch-Up JESD 78 10ms, 1tr≧100mA
Reliability Test Program
Copyright ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
APL5320
www.anpec.com.tw25
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
