ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters INNOVATION and EXCELLENCE FEATURES * * * * * * * * * * 12-bit resolution 5MHz minimum sampling rate Functionally complete Small 24-pin DDIP Requires only 5V supplies Low-power, 1.8 Watts Outstanding dynamic performance No missing codes over full military temperature range Edge-triggered, no pipeline delay Ideal for both time and frequency-domain applications INPUT/OUTPUT CONNECTIONS GENERAL DESCRIPTION DATEL's ADS-118 and ADS-118A are 12-bit, 5MHz, sampling A/D converters packaged in space-saving 24-pin DDIP's. The ADS-118 offers an input range of 1V and has three-state outputs. The ADS-118A has an input range of 1.25V and features direct adjustment of offset error. These functionally complete low-power devices (1.8 Watts) contain an internal fast-settling sample/hold amplifier, a 12-bit subranging A/D converter, a precise voltage reference, timing/ control logic, and error-correction circuitry. All timing and control logic operates from the rising edge of a single start convert pulse. Digital input and output levels are TTL. Models are available for use in either commercial (0 to +70C) or military (-55 to +125C) operating temperature ranges. Applications include radar, transient signal analysis, process control, medical/graphic imaging, and FFT spectrum analysis. PIN FUNCTION PIN FUNCTION 1 2 3 4 5 6 7 8 9 10 11 12 BIT 12 (LSB) BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 (MSB) 24 23 22 21 20 19 18 17 * 16 15 14 13 NO CONNECTION ANALOG GROUND NO CONNECTION +5V ANALOG SUPPLY -5V SUPPLY ANALOG INPUT ANALOG GROUND ENABLE/OFFSET ADJ. START CONVERT EOC DIGITAL GROUND +5V DIGITAL SUPPLY * ADS-118, Pin 17 is ENABLE ADS-118A, Pin 17 is OFFSET ADJUST OFFSET ADJUST 17 (ADS-118A only) 17 ENABLE (ADS-118A only) BUFFER REF AMP START CONVERT 16 REGISTER DAC FLASH ADC 2 12 BIT 1 (MSB) 11 BIT 2 3-STATE OUTPUT REGISTER FLASH ADC 1 + DIGITAL CORRECTION LOGIC S/H REGISTER - ANALOG INPUT 19 10 BIT 3 9 BIT 4 8 BIT 5 7 BIT 6 6 BIT 7 5 BIT 9 4 BIT 9 3 BIT 10 2 BIT 11 1 BIT 12 (LSB) TIMING AND CONTROL LOGIC EOC 15 21 13 14 20 18, 23 22, 24 +5V ANALOG SUPPLY +5V DIGITAL SUPPLY DIGITAL GROUND -5V SUPPLY ANALOG GROUND NO CONNECT Figure 1. ADS-118/118A Functional Block Diagram DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) * Tel: (508) 339-3000 Fax: (508) 339-6356 * For immediate assistance: (800) 233-2765 (R) (R) ADS-118/118A ABSOLUTE MAXIMUM RATINGS PARAMETERS +5V Supply (Pins 13, 21) -5V Supply (Pin 20) Digital Input (Pin 16, 17) Analog Input (Pin 19) Lead Temperature (10 seconds) PHYSICAL/ENVIRONMENTAL LIMITS UNITS 0 to +6 0 to -6 -0.3 to +VDD +0.3 5 +300 Volts Volts Volts Volts C PARAMETERS MIN. TYP. MAX. UNITS 0 -55 -- -- +70 +125 C C Operating Temp. Range, Case ADS-118/118AMC ADS-118/118AMM, GM, 883 Thermal Impedance jc ca Storage Temperature Range Package Type Weight -- 2 -- C/Watt -- 23 -- C/Watt -65 -- +150 C 24-pin, metal-sealed, ceramic DDIP or SMT 0.42 ounces (12 grams) FUNCTIONAL SPECIFICATIONS (TA = +25C, VDD = 5V, 5MHz sampling rate, and a minimum 3 minute warmup unless otherwise specified.) +25C ANALOG INPUT Input Voltage Range, ADS-118 Input Resistance Input Capacitance 0 to +70C MIN. TYP. MAX. -- 475 -- 1 500 6 +2.0 -- -- -- 50 -55 to +125C MIN. TYP. MAX. MIN. TYP. MAX. UNITS -- -- 15 -- 475 -- 1 500 6 -- -- 15 -- 475 -- 1 500 6 -- -- 15 Volts pF -- -- -- -- 100 -- +0.8 +20 -20 -- +2.0 -- -- -- 50 -- -- -- -- 100 -- +0.8 +20 -20 -- +2.0 -- -- -- 50 -- -- -- -- 100 -- +0.8 +20 -20 -- Volts Volts A A ns -- -- -- -- -- -- -- 12 12 0.75 0.5 0.1 0.1 0.1 0.1 -- -- -- +0.75 0.5 0.5 0.5 0.5 -- -- -- -- -- -- -- -- 12 12 1.0 0.5 0.5 0.5 0.5 0.5 -- -- -- 0.95 0.75 0.85 1.5 1.0 -- -- -- -- -- -- -- -- 12 12 1.5 0.75 0.75 0.85 1.5 1.0 -- -- -- +0.95 1.5 2.0 2.5 2.5 -- Bits LSB LSB %FSR %FSR %FSR % Bits -- -- -- -76 -75 -69 -71 -71 -69 -- -- -- -74 -74 -73 -70 -70 -67 -- -- -- -72 -70 -66 -66 -65 -60 dB dB dB -- -- -- -72 -71 -70 -68 -67 -66 -- -- -- -71 -70 -69 -67 -66 -65 -- -- -- -70 -67 -66 -65 -63 -60 dB dB dB 67 66 66 69 69 69 -- -- -- 66 65 65 69 68 68 -- -- -- 64 63 63 67 66 66 -- -- -- dB dB dB 65 65 64 -- 68 68 67 195 -- -- -- -- 64 64 63 -- 67 67 66 195 -- -- -- -- 62 61 60 -- 66 65 64 195 -- -- -- -- dB dB dB Vrms -- -74 -- -- -74 -- -- -74 -- dB -- -- -- -- -- -- 20 10 80 400 +10 3 -- -- -- -- -- -- -- -- -- -- -- -- 20 10 80 400 +10 3 -- -- -- -- -- -- -- -- -- -- -- -- 20 10 80 400 +10 3 -- -- -- -- -- -- MHz MHz dB V/s ns ps rms DIGITAL INPUT Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width STATIC PERFORMANCE Resolution Integral Nonlinearity (fin = 10kHz) Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Bipolar Zero Error (Tech Note 2) Bipolar Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) DYNAMIC PERFORMANCE Peak Harmonics (-0.5dB) dc to 500kHz 500kHz to 1MHz 1MHz to 2.5MHz Total Harmonic Distortion (-0.5dB) dc to 500kHz 500kHz to 1MHz 1MHz to 2.5MHz Signal-to-Noise Ratio (w/o distortion, -0.5dB) dc to 500kHz 500kHz to 1MHz 1MHz to 2.5MHz Signal-to-Noise Ratio (& distortion, -0.5dB) dc to 500kHz 500kHz to 1MHz 1MHz to 2.5MHz Noise Two-tone Intermodulation Distortion (fin = 1MHz, 975kHz, fs = 5MHz, -0.5dB) Input Bandwidth (-3dB) Small Signal (-20dB input) Large Signal (-0.5dB input) Feedthrough Rejection (fin = 2.5MHz) Slew Rate Aperture Delay Time Aperture Uncertainty 2 (R) (R) ADS-118/118A +25C DYNAMIC PERFORMANCE (Cont.) S/H Acquisition Time ( to 0.001%FSR, 10V step) Overvoltage Recovery Time A/D Conversion Rate MIN. 0 to +70C TYP. MAX. -- -- 5 85 200 -- 90 -- -- +2.4 -- -- -- -- -- -- -- -- MIN. -55 to +125C TYP. MAX. -- -- 5 85 200 -- 90 -- -- -- +0.4 -4 +4 +2.4 -- -- -- -- -- -- -- -- 20 -- -- -- -- 10 -- +4.75 -4.75 +5.0 -5.0 +5.25 -5.25 +4.75 -4.75 +5.0 -5.0 -- -- -- -- +205 -180 1.8 -- +220 -205 2.1 0.1 -- -- -- -- +205 -180 1.8 -- MIN. TYP. MAX. UNITS -- -- 5 85 200 -- 90 -- -- ns ns MHz -- +0.4 -4 +4 +2.4 -- -- -- -- -- -- -- -- +0.4 -4 +4 Volts Volts mA mA 20 -- -- 20 MHz -- 10 Offset Binary -- -- 10 MHz +5.25 -5.25 +4.9 -4.9 +5.0 -5.0 +5.25 -5.25 Volts Volts +220 -205 2.1 0.1 -- -- -- -- +205 -180 1.8 -- +220 -205 2.1 0.1 mA mA Watts %FSR/%V DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Delay, Falling Edge of EOC to Output Data Valid Delay, Falling Edge of ENABLE to Output Data Valid Output Coding POWER REQUIREMENTS Power Supply Ranges +5V Supply -5V Supply Power Supply Currents +5V Supply -5V Supply Power Dissipation Power Supply Rejection Footnotes: All power supplies should be on before applying a start convert pulse. All supplies and the clock (start convert pulses) must be present during warmup periods. The device must be continuously converting during this time. Effective bits is equal to: (SNR + Distortion) - 1.76 + Input voltage ranges for ADS-118A is 1.25V 20 log Full Scale Amplitude Actual Input Amplitude 6.02 This is the time required before the A/D output data is valid once the analog input is back within the specified range. A 100ns wide start convert pulse is used for all production testing. For applications requiring less than an 5MHz sampling rate, wider start convert pulses can be used. NOTE: The device only requires the rising edge of a start convert pulse to operate. The minimum supply voltages of +4.9V and -4.9V for VDD are required for -55C operation only. The minimum limits are +4.75V and -4.75V when operating at +125C TECHNICAL NOTES 1. Obtaining fully specified performance from the ADS-118 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (14, 18, and 23) directly to a large analog ground plane beneath the package. the adjustment circuitry shown in Figures 2a and 2b. When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. 3. To enable the three-state outputs, connect ENABLE (pin 17) to a logic "0" (low). To disable, connect pin 17 to logic "1" (high). The three-state outputs are permanently enabled in the ADS-118A. Bypass all power supplies to ground with 4.7F tantalum capacitors in parallel with 0.1F ceramic capacitors. Locate the bypass capacitors as close to the unit as possible. 4. Applying a start convert pulse while a conversion is in progress (EOC = logic "1") will initiate a new and inaccurate conversion cycle. 2. The ADS-118 achieves its specified accuracies without the need for external calibration. If required, the device's small initial offset and gain errors can be reduced to zero using 3 (R) (R) ADS-118/118A CALIBRATION PROCEDURE Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuits in Figures 2a and 2b are guaranteed to compensate for the ADS-118's initial accuracy errors and may not be able to compensate for additional system errors. ANALOG INPUT (pin 19). 3. Adjust the offset potentiometer until the output bits are 1000 0000 00000 and the LSB flickers between 0 and 1. Gain Adjust Procedure 1. Apply +0.99927V (ADS-118) or +1.249085V (ADS-118A) to the ANALOG INPUT (pin 19). A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting 2. Adjust the gain potentiometer until all output bits are 1's and the LSB flickers between 1 and 0. 3. To confirm proper operation of the device, vary the input signal to obtain the output coding listed in Table 1. LED's to the digital outputs and adjusting until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. Table 1. Output Coding for Bipolar Operation For the ADS-118, offset adjusting is normally accomplished at the point where the MSB is a 1 and all other output bits are 0's and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when the applied analog input is +1/2LSB (+244V for ADS-118; +305V for ADS-118A). Gain adjusting is accomplished when all bits are 1's and the LSB just changes from a 1 to a 0. This transition ideally occurs when the analog input is at +full scale minus 11/2 LSB's (+0.99927V for ADS-118; +1.249085V for ADS-118A). Zero/Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 16) so the converter is continuously converting. OUTPUT CODING BIPOLAR SCALE ADS-118 INPUT RANGE (1V ) OFFSET BINARY MSB LSB ADS-118A INPUT RANGE (1.25V ) +FS -1 LSB +3/4 FS +1/2 FS 0 -1/2 FS -3/4 FS -FS +1 LSB -FS +0.99951V +0.75000V +0.50000V 0.00000V -0.50000V -0.75000V -0.99951V -1.00000V 1111 1111 1111 1110 0000 0000 1100 0000 0000 1000 0000 0000 0100 0000 0000 0010 0000 0000 0000 0000 0001 0000 0000 0000 +1.2494V +0.9375V +0.6250V 0.0000V -0.6250V -0.9375V -1.2494V -1.2500V 2. Apply +244V (ADS-118) or +305V (ADS-118A) to the GAIN ADJUST +15V ZERO/ OFFSET ADJUST 20k -15V 1.2M 2k SIGNAL INPUT 50 GAIN ADJUST To Pin19 of ADS-118A Potentiometer is at 25 during the device's factory trim procedure. +15V 1.98k SIGNAL INPUT +15V (or +5V) 50 To Pin19 of ADS-118 ZERO/ OFFSET ADJUST 20k To Pin17 of ADS-118A -15V -15V (or -5V) Figure 2a. Optional ADS-118 External Gain and Offset Adjust Circuits Figure 2b. Optional ADS-118A Gain and Offset Adjust Circuits 4 (R) (R) ADS-118/118A \ X * { \ !<X * [ ; _ ADS-118 ADS-118A * !< { \ X { | < ; * [ _ \ ; # * $ < > | >@!? { ! < X ! < X ^ ^ ^ ! < X [ ^ ^ $ } ~ $ } * $ } ; $ } \ $ } < $ } | $ } { $ } _ $ } $ } $ } $ } } #~ * $ } ?@ * ~ @ # } @ @ ! Figure 3. Typical Connection Diagram > X >@!? ^ ] Q Q K # > @ $ < _ < [ \ [ < ; x < [ ; ?@ ? < [ \ * $ # ! $ # ! ; < $ # ! $ $ # ! $ < { Figure 4. ADS-118/118A Timing Diagram 5 (R) (R) ADS-118/118A THERMAL REQUIREMENTS Electrically-insulating, thermally-conductive "pads" may be installed underneath the package. Devices should be soldered to boards rather than socketed, and of course, minimal air flow over the surface can greatly help reduce the package temperature. All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70C and -55 to +125C. All room temperature (TA = +25C) production testing is performed without the use of heat sinks or forced air cooling. Thermal impedance figures for each device are listed in their respective specification tables. In more severe ambient conditions, the package/junction temperature of a given device can be reduced dramatically (typically 35%) by using one of DATEL's HS Series heat sinks. See Ordering Information for the assigned part number. See page 1-183 of the DATEL Data Acquisition Components Catalog for more information on the HS Series. Request DATEL Application Note AN8, "Heat Sinks for DIP Data Converters", or contact DATEL directly, for additional information. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. 0 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 0 250 kHz 500 kHz 750 kHz 1 MHz 1.25 MHz 1.5 MHz 1.75 MHz 2 MHz Frequency (fs = 5MHz, fin = 2.45MHz, Vin = -0.5dB, 4,096-point FFT) Figure 5. FFT Analysis of ADS-118 DNL (LSB's) { | X Number of Occurences Amplitude Relative to Full Scale (dB) -10 { \ Digital Output Code Digital Output Code |\ |\ Figure 6. ADS-118 Histogram and Differential Nonlinearity 6 2.25 MHz 2.5 MHz 7 P4 3 1 2 2 ANALOG INPUT R1 500 3 -15V R2 20K 1 +15V 5 4 1 3 5 7 9 11 13 15 17 19 21 23 25 4 6 8 10 12 14 16 18 20 22 24 26 P2 6 SG6 C7 2.2MF C4 2.2MF 20MHY L4 20MHY C5 2.2MF 20MHY C6 L5 2.2MF L6 C11 0.01MF -5VA C12 0.01MF -15V +15V C13 0.01MF SG3 SG2 SG1 3 20MHY C2 2.2MF 4 3 C9 0.01MF -5V C8 0.01MF +5VF C10 0.01MF 15 18 23 +5V -5V 20 17 21 22 24 19 16 14 13 7 14 8 2 118 119 +5V +5V 2 C21 0.1MF + X1 U5 74HCT86 U5 U5 74HCT86 7 U5 14 3 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 11 6 8 74HCT86 C15 0.1MF +5VF SPARE GATES 13 12 5 4 10 9 2 1 EOC AGND AGND -5V U1 ADS-118/119 ENABLE +5VA NOTES: 1 2 3 4 5 6 7 8 9 10 11 12 +5VF +5VF +5VF LE 11 9 LE 8D 10 OE OE 8Q 7Q 6Q 5Q 4Q 3Q 2Q 1Q + 1 12 13 14 15 16 17 18 19 1 12 13 2 1 3 JPR4 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 15 14 B1 16 17 18 19 C16 2.2MF 10 74HCT573 20 2 1D 3 2D 4 3D 5 4D 6 5D U2 7 6D 8 7D 11 8Q 7Q 6Q 5Q 4Q 3Q 2Q 1Q + C17 2.2MF 74HCT573 20 2 1D 3 2D 4 3D 5 4D 6 5D U3 7 6D 8 7D 9 8D +5VF P1 2 4 6 (LSB) 8 10 12 14 16 18 20 22 24 26 28 (MSB) 30 32 34 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 Figure 7. ADS-118/118A Evaluation Board Schematic (ADS-B118) 1. UNLESS OTHERWISE SPECIFIED ALL CAPACITORS ARE 50V C1-C6 ARE 20V ALL RESISTORS ARE IN OHMS 2. AS AN OPTION, COXIAL CABLE BETWEEN THESE TWO POINTS. FOR ADS-118/118A 5MHZ FOR ADS-119 10MHZ ANAIN TRIG DGND +5VD +5VF START CONVERT C22 4.7MF +5V 3 1 1 P3 JPR2 1 2 JPR1 118A 119A 118A 119A JPR6 50 118 119 20MHY C1 2.2MF L2 JPR3 2 R7 20MHY C3 2.2MF L1 L3 -5VA 3 1 +5VA 2 R3 20K 1 JPR5 +5VA C14 .01MF 0.1MF OPTION 118A 119 OFFSET C19 SEE NOTE 2 L7, 20MHY -5VA 10 C18 .1MF OPTION +5VA R4 2K SG8 11 -15V SG7 U4 C20 SG4 OPTIONAL +15V SG5 SEE NOTE 2 2 GAIN SG9 R5 1.98K R6 1.2M (R) (R) ADS-118/118A (R) (R) ADS-118/118A MECHANICAL DIMENSIONS INCHES (mm) 1.31 MAX. (33.27) 24-Pin DDIP Versions 24 ADS-118MC ADS-118MM ADS-118AMC ADS-118AMM Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) 0.010 (0.254) 3 place decimal (.XXX) 0.005 (0.127) 13 0.80 MAX. (20.32) 1 Lead Material: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 12 0.100 TYP. (2.540) 1.100 (27.940) 0.235 MAX. (5.969) PIN 1 INDEX 0.200 MAX. (5.080) 0.010 (0.254) 0.190 MAX. (4.826) 0.100 (2.540) 0.600 0.010 (15.240) SEATING PLANE 0.025 (0.635) 0.040 (1.016) 0.018 0.002 (0.457) +0.002 -0.001 0.100 (2.540) 1.31 MAX. (33.02) 24-Pin Surface Mount Versions Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) 0.010 (0.254) 3 place decimal (.XXX) 0.005 (0.127) 13 24 Lead Material: Kovar alloy 0.80 MAX. (20.32) 1 0.190 MAX. (4.826) Lead Finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 12 0.020 TYP. (0.508) 0.060 TYP. (1.524) 0.130 TYP. (3.302) PIN 1 INDEX 0.100 (2.540) 0.100 TYP. (2.540) 0.020 (0.508) 0.015 (0.381) MAX. radius for any pin 0.010 TYP. (0.254) 0.040 (1.016) ORDERING INFORMATION OPERATING MODEL NUMBER TEMP. RANGE ADS-118MC ADS-118MM ADS-118AMC ADS-118AMM 0 to +70C -55 to +125C 0 to +70C -55 to +125C 24-PIN PACKAGE DDIP DDIP SMT SMT ACCESSORIES ADS-B118 HS-24 Evaluation Board (without ADS-118) Heat Sink for all ADS-118 DDIP models Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket), 24 required. For MIL-STD-883 product, or surface mount packaging, contact DATEL. INNOVATION and EXCELLENCE ISO 9001 > @ $ @ > @ DS-0231E 2/04 DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.