General Description
The MAX8523 dual-phase gate driver, along with the
MAX8524*/MAX8525 multiphase controllers, provides
flexible 2- to 8-phase CPU core-voltage supplies. The
0.5/0.95driver resistance allows up to 30A output
current per phase.
Each MOSFET driver in the MAX8523 is capable of dri-
ving 3000pF capacitive loads with only 15ns propaga-
tion delay and 11ns typical rise and fall times, allowing
operations up to 1.2MHz per phase. Adaptive dead
time controls low-side MOSFET turn-on, and user-pro-
grammable dead time controls high-side MOSFET turn-
on. This maximizes converter efficiency while allowing
operation with a variety of MOSFETs and controller ICs.
An undervoltage lockout (UVLO) circuit allows proper
power-on sequencing. PWM_ signal inputs are both
TTL and CMOS compatible.
The MAX8523 is available in a space-saving 16-pin QSOP
package, and specified for -40°C to +85°C operation.
Applications
Core Voltage Supplies for Pentium™ IV
Microprocessors
Servers and Workstations
Desktop Computers
Voltage Regulator Modules (VRMs)
DC-to-DC Regulator Modules
Switches, Routers, and Storage
Features
6A Peak Gate-Drive Current
Up to 1.2MHz Operation
Up to 6.5V Gate-Drive Voltage
0.5/0.95Low-Side Drivers
Capable of 30A Output per Phase
Adaptive Shoot-Through Protection
User-Programmable Delay Time
TTL and CMOS Input Compatible
UVLO for Proper Sequencing
Flexible 2- to 8-Phase Implementation with
MAX8524 and MAX8525
Space-Saving (4.9mm 6mm) 16-Pin QSOP
Package
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
PWM1
LX1
PGND1
DL1
DLY
PV2
DL2
PGND2
PWM2
LX2
DH1
DH2
BST2
VCC
PV1
BST1
2
1
+4.5V TO +6.5V GATE
DRIVE SUPPLY
PHASE 1 OUTPUT
PHASE 2 OUTPUT
PHASE 2 PWM INPUT
PHASE 1 PWM INPUT
3V TO 13.2V
3
5
4
6
8
13
16
7
15
14
11
12
9
10
MAX8523
Typical Operating Circuit
19-2860; Rev 0; 4/03
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX8523EEE -40°C to +85°C 16 QSOP
Pentium is a trademark of Intel Corp.
*Future product. Contact factory for availability.
4
.
9
m
m
x
6
m
m
1
6
-
Q
S
O
P
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
BST_ to PGND_ ......................................................-0.3V to +26V
LX_ to PGND_............................................................-1V to +14V
DH_ to PGND_..........................................-0.3V to (BST_ + 0.3V)
DH_ to LX_................................................................-0.3V to +7V
BST_ to LX_ ..............................................................-0.3V to +7V
DL_ to PGND_.............................................-0.3V to (PV_ + 0.3V)
PV_ to PGND_ ..........................................................-0.3V to +7V
PGND2 to PGND1 .................................................-0.3V to +0.3V
VCC to PGND1..........................................................-0.3V to +7V
DLY to PGND1............................................-0.3V to (VCC + 0.3V)
PWM_ to PGND1 ........................................-0.3V to (PV2 + 0.3V)
VCC to PV1_..............................................................-7V to +0.3V
DH_, DL_ Continuous Current .......................................±200mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C).............667mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VVCC = VPV1 = VPV2 = VBST1 = VBST2 = VDLY = 5V, VPGND1 = VPGND2 = VLX1 = VLX2 = 0V; TA= 0°C to +85°C, unless otherwise
noted. Typical values are at TA= +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
UNDERVOLTAGE PROTECTION
Supply Voltage Range 4.5 6.5 V
VCC rising 3.25 3.5 3.8
UVLO VCC falling 3.0 3.5 V
DLY = VCC 50 100 µA
IVCC Dynamic, RDLY = 50k0.5 1 mA
PWM_ = GND 1 10 µA
IPV_PWM_ = VCC 1.2 2 mA
PWM_ = GND 0.1 10 µA
IBST_PWM_ = VCC 1.2 2 mA
IBST1 + IPV1 + IBST2 + IPV2 250kHz 4 8 mA
DRIVER SPECIFICATIONS
PWM_ = PGND1, VBST = 4.5V 0.65 1.2
DH_ Driver Resistance PWM_ = VCC, VBST_ = 4.5V 0.8 1.35
PWM_ = PGND1, VPV_ = 4.5V 0.95 1.6
DL_ Driver Resistance PWM_ = VCC, VPV = 4.5V 0.5 0.9
DH_ Rise Time PWM_ = VCC, VBST = 5V, 3nF load 11 ns
DH_ Fall Time PWM_ = PGND1, VBST = 5V, 3nF load 9.5 ns
DL_ Rise Time PWM_ = VCC, VPV = 5V, 3nF load 8.5 ns
DL_ Fall Time PWM_ = PGND1, VPV = 5V, 3nF load 6.5 ns
DH_ Propagation Delay PWM_falling, VBST = 5V 15 ns
DL_ Propagation Delay PWM_rising, VBST = 5V 8 ns
PWM_ INPUT
Input Current VPWM_ = 0V or 6.5V 0.01 1 µA
Input Voltage High 2.5 V
Input Voltage Low 0.8 V
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS
(VVCC = VPV1 = VPV2 = VBST1 = VBST2 = 5V, VPGND1 = VPGND2 = VLX1 = VLX2 = 0V; TA= -40°C to +85°C, unless otherwise noted.)
(Note 1)
PARAMETER CONDITIONS MIN TYP MAX UNITS
UNDERVOLTAGE PROTECTION
Supply Voltage Range 4.5 6.5 V
VCC rising 3.25 3.8
UVLO VCC falling 3.0 3.5 V
DLY = VCC 100 µA
IVCC Dynamic, RDLY = 50k1mA
PWM_ = GND 10 µA
IPV_PWM_ = VCC 2mA
PWM_ = GND 10 µA
IBST_PWM_ = VCC 2mA
IBST1 + IPV1 + IBST2 + IPV2 250kHz 8mA
DRIVER SPECIFICATIONS
PWM_ = PGND1, VBST_ = 4.5V 1.2
DH_ Driver Resistance PWM_ = VCC, VBST_ = 4.5V 1.35
PWM_ = PGND1, VPV_ = 4.5V 1.6
DL_ Driver Resistance PWM_ = VCC, VPV_ = 4.5V 0.9
PWM_ INPUT
Input Current VPWM_ = 0V or 6.5V 1 µA
Input Voltage High 2.5 V
Input Voltage Low 0.8 V
Note 1: Specifications at -40°C guaranteed by design.
Typical Operating Characteristics
(PV1 = PV2 = VCC = VDLY = 5V, 3nF capacitive load, TA= +25°C, unless otherwise noted.)
0
100
200
300
400
500
600
700
800
0 0.40.2 0.6 0.8 1.0 1.2
POWER DISSIPATION vs. SWITCHING
FREQUENCY (BOTH DRIVERS SWITCHING)
MAX8523toc01
FREQUENCY (MHz)
POWER (mW)
CLS = 3nF, CHS = 3nF
CLS = 6nF, CHS = 3nF
CLS = 3nF, CHS = 1.5nF
VCC = 6.5V
0
100
200
300
400
500
600
700
800
021 3456
POWER DISSIPATION vs. CAPACITIVE LOAD
(BOTH DRIVERS SWITCHING)
MAX8523toc02
CAPACITANCE (nF)
POWER (mW)
FREQ = 1.2MHz
FREQ = 600kHz
FREQ = 300kHz
VCC = 6.5V
0
2
4
6
8
10
12
14
021 3456
DL RISE AND FALL
vs. CAPACITIVE LOAD
MAX8523toc03
CAPACITANCE (nF)
RISE/FALL TIME (ns)
DL RISE
DL FALL
CDH = CDL
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
4 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(PV1 = PV2 = VCC = VDLY = 5V, 3nF capacitive load, TA= +25°C, unless otherwise noted.)
0
2
4
6
8
10
12
14
16
18
021 3456
DH RISE AND FALL vs.
CAPACITIVE LOAD
MAX8523toc04
CAPACITANCE (nF)
RISE/FALL TIME (ns)
DH RISE
DH FALL
CDH = CDL
0
6
4
2
8
10
14
12
16
-40 -20 0 20 40 60 80 100 120
DH AND DL RISE AND FALL TIMES
vs. TEMPERATURE
MAX8523toc05
TEMPERATURE (°C)
RISE/FALL TIME (ns)
DH RISE
DL RISE DL FALL
DH FALL
CDL = CDH = 3.0nF
0
20
10
30
40
50
0 0.2 0.4 0.6 0.8 1.0 1.2
VCC SUPPLY CURRENT
vs. SWITCHING FREQUENCY
MAX8523toc06
FREQUENCY (MHz)
ICC (µA)
VDLY = VCC
VCC = 5V
VCC = 6.5V
0
10
20
30
-40 -20 0 20 40 60 80 100 120
PROPAGATION DELAY
vs. TEMPERATURE
MAX8523toc07
TEMPERATURE (°C)
RISE (ns)
VDLY = VCC
PWM_FALL DH_FALL
PWM_RISE DL_FALL
DL_FALL DH_RISE
0
40
20
60
80
100
120
140
160
180
200
220
240
20 140100
PROGRAMMABLE DELAY
vs. RDLY
MAX8523 toc08
RDLY (k)
DELAY (ns)
0 40 60 12080
PWM SIGNAL
DH_ GATE
VOLTAGE
DL_ GATE
VOLTAGE
5V/div
LX SWITCHING
VOLTAGE
TYPICAL SWITCHING WAVEFORMS
MAX8523 toc09
100 ns
2XIRF7811W HIGH-SIDE
MOSFETS
2XIRF7822 LOW-SIDE
MOSFETS
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
_______________________________________________________________________________________ 5
Detailed Description
The MAX8523 dual-phase gate driver, along with the
MAX8524/MAX8525 multiphase controllers, provides
flexible 2- to 8-phase CPU core-voltage supplies. The
0.5/0.95driver resistance allows up to 30A output
current per phase.
Each MOSFET driver in the MAX8523 is capable of dri-
ving 3000pF capacitive loads with only 15ns propagation
delay and 11ns typical rise and fall times, allowing opera-
tions up to 1.2MHz per phase. Adaptive dead time con-
trols low-side MOSFET turn-on, and user-programmable
dead time controls high-side MOSFET turn-on. This maxi-
mizes converter efficiency, while allowing operation with a
variety of MOSFETs and PWM controller ICs. A UVLO cir-
cuit allows proper power-on sequencing. PWM_ signal
inputs are both TTL and CMOS compatible.
Principle of Operation
MOSFET Gate Drivers (DH_, DL_)
The high-side drivers (DH_) have typical 0.8sourcing
resistance and 0.65sinking resistance, resulting in 6A
peak sourcing current and 7A peak sinking current with
5V supply voltage. The low-side drivers (DL_) have typ-
ical 0.95sourcing resistance and 0.5sinking resis-
tance, yielding 5A peak sourcing current and 10A peak
sinking current. This reduces switching losses, making
the MAX8523 ideal for both high-frequency and high-
output-current applications.
Shoot-Through Protection
Adaptive shoot-through protection is incorporated for
the switching transition after the high-side MOSFET is
turned off and before the low-side MOSFET is turned
on. The low-side driver is turned on only when the LX
voltage falls below 1.8V. Furthermore, the delay time
between the low-side MOSFET turn-off and high-side
MOSFET turn-on can be adjusted by selecting the
value of R2 (see the RDLY Selection section).
Pin Description
PIN NAME FUNCTION
1 BST1 Boost Flying Capacitor Connection, Phase 1. Connect a 0.22µF or higher ceramic capacitor between
BST1 and LX1.
2 DH1 High-Side Gate-Driver Output, Phase 1
3 LX1 Switching Node (Inductor) Connection, Phase 1
4 PV1 Gate-Drive Supply for DL1. Bypass to PGND1 with a 2.2µF or higher capacitor. Connect PV1 and PV2
together.
5 DL1 Low-Side Gate-Driver Output, Phase 1
6 PGND1 Power Ground for DL1. Connect PGND1 and PGND2 together. Internal analog ground is connected to
PGND1.
7V
CC Supply Voltage. Bypass VCC to PGND1 with a 0.1µF (min) capacitor.
8 DLY Connect a resistor from DLY to PGND1 to set dead time between DL_ falling and DH_ rising. Connect to
VCC for default 20ns delay.
9 PWM1 Phase 1 PWM Logic Input. DH1 is high when PWM1 is high; DL1 is high when PWM1 is low.
10 PWM2 Phase 2 PWM Logic Input. DH2 is high when PWM2 is high; DL2 is high when PWM2 is low.
11 PGND2 Power Ground for DL2
12 DL2 Low-Side Gate-Driver Output, Phase 2
13 PV2 Gate-Drive Supply for DL2. Bypass to PGND2 with a 2.2µF or higher capacitor. Connect PV1 and PV2
together.
14 LX2 Switching Node (Inductor) Connection, Phase 2
15 DH2 High-Side Gate-Driver Output, Phase 2
16 BST2 Boost Flying Capacitor Connection, Phase 2. Connect a 0.22µF or higher ceramic capacitor between
BST2 and LX2.
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
6 _______________________________________________________________________________________
Undervoltage Lockout (UVLO)
When VCC is below the UVLO threshold (3.5V typ), DH_
and DL_ are held low. Once VCC is above the UVLO
threshold and PWM_ is low, DL_ is kept high and DH_
is kept low. This prevents output from rising before a
valid PWM signal is applied.
VCC Decoupling
VCC provides the supply voltage for the internal logical
circuit. To avoid malfunctions due to the switching
noise on the DH_, DL_, and LX_ pins, RC decoupling is
recommended for the VCC pin. Place a 10resistor
(R1) from the supply voltage to the VCC pin and a 0.1µF
(C7) capacitor from the VCC pin to PGND1.
Boost Capacitor Selection
The MAX8523 uses a bootstrap circuit to generate the
floating supply voltages for the high-side drivers (DH_).
The selected high-side MOSFET determines appropri-
ate boost capacitance values, according to the follow-
ing equation:
where QGATE is the total gate charge of the high-side
MOSFET and VBST is the voltage variation allowed on
the high-side MOSFET drive. Choose VBST = 0.1V to
0.2V when determining the CBST. Low-ESR ceramic
capacitors should be used for C3and C4.
CQ
V
BST GATE
BST
=
MAX8523 DHON
BST1
DH1
LX1
PV1
DL1
PGND1
DHLO
DLON
DLLO
DELAY
PROGRAM
PGND1
UVLO
DELAY
LOGIC
PWM1
VCC
DLY
PWM2
PHASE1
PHASE2
DHON
BST2
DH2
LX2
PV2
DL2
PGND2
DHLO
DLON
DLLO
LX2 LOW
DETECT
LX1 LOW
DETECT
Figure 1. MAX8523 Functional Diagram
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
_______________________________________________________________________________________ 7
PV_ Decoupling
PV_ provides the supply voltages for the low-side dri-
vers (DL_). The decoupling capacitors at PV_ also
charge the BST capacitors during the time period when
DL_ is high. Therefore, the decoupling capacitor C2 for
PV_ should be large enough to minimize the ripple volt-
age during switching transitions. C2 should be chosen
according to the following equation:
RDLY Selection
Connect DLY to VCC for the default delay time, typically
20ns. Add a delay resistor, RDLY, between DLY and
PGND1 to increase the delay between the low-side
MOSFET drive turn-off and the high-side MOSFET turn-
on. See the Typical Operating Characteristics to select
RDLY.
Avoiding dV/dt-Induced Low-Side
MOSFET Turn-On
At high input voltages, fast turn-on of the high-side
MOSFET could momentarily turn on the low-side
MOSFET due to the high dV/dt appearing at the drain of
the low-side MOSFET. The high dV/dt causes a current
flow through the Miller capacitance (CRSS) and the input
capacitance (CISS) of the low-side MOSFET. Improper
selection of the low-side MOSFET that has a high ratio of
CRSS/CISS makes the problem more severe. To avoid
the problem, give special attention to the ratio of
CRSS/CISS when selecting the low-side MOSFET.
Adding a resistor between the BST and the CBST can
slow the high-side MOSFET turn-on. Similarly, adding a
capacitor from the gate to the source of the high-side
MOSFET has the same effect. However, both methods
are at the expense of increasing the switching losses.
CC
BST
210
PWM1
LX1
PGND1
DL1
DLY
PV2
DL2
PGND2
PWM2
LX2
DH1
DH2
BST2
VCC
PV1
BST1
2
1
D1
C3
Q4
C4
C6
C7
R1
Q3
C2
R2
C5
C1
+4.5V - 6.5V
1.6V/20A
1.6V/20A
PWM2 CONTROL SIGNAL
PWM1 CONTROL SIGNAL
3V TO 13.5V
Q1
3
5
4
6
8
13
16
7
15
14
11
12
9
10
MAX8523
Q2
L1
L2
Figure 2. Typical Application Circuit
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
8 _______________________________________________________________________________________
COMPONENT DESCRIPTION PART NUMBER
C1 5 x 330µF/25V, 23m (max) ESR input filtering
capacitor Sanyo 25MV330WX
C2 2.2µF/10V ceramic capacitor Taiyo Yuden JMK107BJ225MA
C3, C4 0.22µF/10V ceramic capacitors Taiyo Yuden GMK212BJ224MG
C5, C6 3 x 820µF/4V, 12m (max) ESR electrolytic capacitors Sanyo 4SP820M
C7 0.1µF/10V ceramic capacitor Taiyo Yuden UMK212BJ104MG
D1 Dual Schottky diode Central Semiconductor CMPSH-3A
L1, L2 0.66µH/29A, 2.1m (typ),
2.5m (max) RDC inductors Sumida CDEP134-H
Q1, Q2 High-side MOSFETs Siliconix SUB70N03-09BP
Q3, Q4 Low-side MOSFETs Fairchild FDB7045L
R1 10 ±5% resistor (0603) VCC decoupling resistor
R2 2k to 125k ±1% dead-time delay programming
resistor (0603)
Table 1. Typical Component Values (250kHz Operation, 20A/Phase Output Current)
COMPONENT DESCRIPTION PART NUMBER
C1 5 x 10µF/25V, 10m (max) ESR input filtering capacitor
(1812) Taiyo Yuden TMK432BJ106MM
C2 2.2µF/10V ceramic capacitor Taiyo Yuden JMK107BJ225MA
C3, C4 0.22µF/10V ceramic capacitors Taiyo Yuden GMK212BJ224MG
C5, C6 3 x 680µF/2V, 5m (max) ESR SP capacitors Sanyo 2RSTPD680M5
C7 0.1µF/10V ceramic capacitor Taiyo Yuden UMK212BJ104MG
D1 Dual Schottky diode Central Semiconductor CMPSH-3A
L1, L2 0.23µH/30A, 1.1m (max) RDC inductors TDK SPM12535T-R23M300
Q1, Q2 High-side MOSFETs IR IRF7801
Q3, Q4 Low-side MOSFETs IR 2XIRF7822
R1 10 ±5% resistor (0603) VCC decoupling resistor
R2 2k to 125k ±1% dead-time delay programming
resistor (0603)
Table 2. Typical Component Values (800kHz Operation, 20A/Phase Output Current)
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
_______________________________________________________________________________________ 9
Chip Information
TRANSISTOR COUNT: 1187
PROCESS: BiCMOS
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
BST1 BST2
DH2
LX2
PV2
DL2
PGND2
PWM2
PWM1
TOP VIEW
MAX8523
QSOP
DH1
LX1
PGND1
PV1
DL1
VCC
DLY
Pin Configuration
Applications Information
Power Dissipation
Power dissipation in the IC package comes mainly from
switching the MOSFETs. Therefore, it is a function of
both switching frequency and the total gate charge of
the selected MOSFETs. The total power dissipation
when both drivers are switching is given by:
where fSis the switching frequency, QG_TOTAL_HS is
the total gate charge of the selected high-side
MOSFET, QG_TOTAL_LS is the total gate charge of the
selected low-side MOSFET, N is the total number of the
high-side MOSFETs in parallel, M is the total number of
the low-side MOSFETs in parallel, VPV_ is the voltage at
the PV_ pin, RHS is the on-resistance of the high-side
driver, RLS is the on-resistance of the low-side driver,
RG_HS is the gate resistance of the selected high-side
MOSFET, RG_LS is the gate resistance of the selected
low-side MOSFETs, VVCC is the voltage at the VCC pin,
and IVCC is the supply current at the VCC pin.
PC Board Layout Considerations
The MAX8523 MOSFET driver sources and sinks large
currents to drive MOSFETs at high switching speeds.
The high di/dt can cause unacceptable ringing if the
trace lengths and impedances are not well controlled.
The following PC board layout guidelines are recom-
mended when designing with the MAX8523:
1) Place all decoupling capacitors (C2, C3, C4, C7) as
close to their respective pins as possible.
2) Minimize the high-current loops from the input capaci-
tor, upper-switching MOSFET, and low-side MOSFET
back to the input capacitor negative terminal.
3) Provide enough copper area at and around the
switching MOSFETs and inductors to aid in thermal
dissipation.
4) Connect the PGND1 and PGND2 pins of the
MAX8523 as close as possible to the source of the
low-side MOSFETs.
5) Keep LX1 and LX2 away from sensitive analog com-
ponents and nodes. Place the IC and analog com-
ponents on the opposite side of the board from the
power-switching node if possible.
PfNQ
R
RR N
MQ
R
RR MVVI
IC S G TOTAL HS
HS
HS G HS G TOTAL LS
LS
LS G LS PV VCC VCC
(
(/)
(/)
)
__
___
__
× × ×
+ ×
+×+ ×
2
MAX8523
High-Speed, Dual-Phase Gate Driver for
Multiphase, Step-Down Converters
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS