REV. 0
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Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
ADG3233
*
Low Voltage 1.65 V to 3.6 V, Bidirectional
Logic Level Translation, Bypass Switch
PRODUCT HIGHLIGHTS
1. Bidirectional level translation matches any voltage level from
1.65 V to 3.6 V.
2. The bypass switch offers high performance and is fully
guaranteed across the supply range.
3. Short circuit protection.
4. Tiny 8-lead SOT-23 package, 8.26 mm 8.26 mm board area,
or 8-lead MSOP.
Table I. Truth Table
EN Signal Path Function
LA1Y2, Y1V
CC1
Enable Bypass Mode
HA1Y1, A2Y2 Enable Normal Mode
*Patent Pending
FUNCTIONAL BLOCK DIAGRAM
E
N
A1
A2
V
CC1
GND
Y2
Y1
0
1
V
CC1
V
CC1
V
CC2
V
CC1
V
CC2
V
CC2
FEATURES
Operates from 1.65 V to 3.6 V Supply Rails
Bidirectional Level Translation, Unidirectional
Signal Path
8-Lead SOT-23 and MSOP Packages
Bypass or Normal Operation
Short Circuit Protection
APPLICATIONS
JTAG Chain Bypassing
Daisy-Chain Bypassing
Digital Switching
GENERAL DESCRIPTION
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.
This type of device may be used in applications that require a
bypassing function. It is ideally suited to bypassing devices in a
JTAG chain or in a daisy-chain loop. One switch could be used for
each device or a number of devices, thus allowing easy bypassing
of one or more devices in a chain. This may be particularly
useful in reducing the time overhead in testing devices in the
JTAG chain or in daisy-chain applications where the user does
not wish to change the settings of a particular device.
The bypass switch is packaged in two of the smallest footprints
available for its required pin count. The 8-lead SOT-23 package
requires only 8.26 mm 8.26 mm board space, while the MSOP
package occupies approximately 15 mm 15 mm board area.
REV. 0–2–
ADG3233–SPECIFICATIONS
1
Parameter Symbol Conditions Min Typ
2
Max Unit
LOGIC INPUTS/OUTPUTS
3
(V
CC2
= 1.65 V to 3.6 V, GND = 0 V)
Input High Voltage
4
V
IH
V
CC1
= 3.0 V to 3.6 V 1.35 V
V
CC1
= 2.3 V to 2.7 V 1.35 V
V
CC1
= 1.65 V to 1.95 V 0.65 V
CC
V
Input Low Voltage
4
V
IL
V
CC1
= 3.0 V to 3.6 V 0.8 V
V
CC1
= 2.3 V to 2.7 V 0.7 V
V
CC1
= 1.65 V to 1.95 V 0.35 V
CC
V
Output High Voltage (Y1) V
OH
I
OH
= 100 µA, V
CC1
= 3.0 V to 3.6 V 2.4 V
V
CC1
= 2.3 V to 2.7 V 2.0 V
V
CC1
= 1.65 V to 1.95 V V
CC
0.45 V
I
OH
= 4 mA, V
CC1
= 2.3 V to 2.7 V 2.0 V
V
CC1
= 1.65 V to 1.95 V V
CC
0.45 V
I
OH
= 8 mA, V
CC1
= 3.0 V to 3.6 V 2.4 V
Output Low Voltage (Y1) V
OL
I
OL
= +100 µA, V
CC1
= 3.0 V to 3.6 V 0.40 V
V
CC1
= 2.3 V to 2.7 V 0.40 V
V
CC1
= 1.65 V to 1.95 V 0.45 V
I
OL
= +4 mA, V
CC1
= 2.3 V to 2.7 V 0.40 V
V
CC1
= 1.65 V to 1.95 V 0.45 V
I
OL
= +8 mA, V
CC1
= 3.0 V to 3.6 V 0.40 V
LOGIC OUTPUTS
3
(V
CC1
= 1.65 V to 3.6 V, GND = 0 V)
Output High Voltage (Y2) V
OH
I
OH
= 100 µA, V
CC2
= 3.0 V to 3.6 V 2.4 V
V
CC2
= 2.3 V to 2.7 V 2.0 V
V
CC2
= 1.65 V to 1.95 V V
CC
0.45 V
I
OH
= 4 mA, V
CC2
= 2.3 V to 2.7 V 2.0 V
V
CC2
= 1.65 V to 1.95 V V
CC
0.45 V
I
OH
= 8 mA, V
CC2
= 3.0 V to 3.6 V 2.4 V
Output Low Voltage (Y2) V
OL
I
OL
= +100 µA, V
CC2
= 3.0 V to 3.6 V 0.40 V
V
CC2
= 2.3 V to 2.7 V 0.40 V
V
CC2
= 1.65 V to 1.95 V 0.45 V
I
OL
= +4 mA, V
CC2
= 2.3 V to 2.7 V 0.40 V
V
CC2
= 1.65 V to 1.95 V 0.45 V
I
OL
= +8 mA, V
CC2
= 3.0 V to 3.6 V 0.40 V
SWITCHING CHARACTERISTICS
4, 5
V
CC
= V
CC1
= V
CC2
= 3.3 V
±
0.3 V
Propagation Delay,
t
PD
A1 to Y1 Normal Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 3.5 5.4 ns
A2 to Y2 Normal Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 3.5 5.4 ns
A1 to Y2 Bypass Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 4 6.5 ns
ENABLE Time EN to Y1 t
EN
C
L
= 30 pF, V
T
= V
CC
/2 4 6 ns
DISABLE Time EN to Y1 t
DIS
C
L
= 30 pF, V
T
= V
CC
/2 2.8 4 ns
ENABLE Time EN to Y2 t
EN
C
L
= 30 pF, V
T
= V
CC
/2 4.5 6.5 ns
DISABLE Time EN to Y2 t
DIS
C
L
= 30 pF, V
T
= V
CC
/2 4 6.5 ns
V
CC
= V
CC1
= V
CC2
= 2.5 V
±
0.2 V
Propagation Delay, t
PD
A1 to Y1 Normal Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 4.5 6.2 ns
A2 to Y2 Normal Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 4.5 6.2 ns
A1 to Y2 Bypass Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 4.5 6.5 ns
ENABLE Time EN to Y1 t
EN
C
L
= 30 pF, V
T
= V
CC
/2 5 7.2 ns
DISABLE Time EN to Y1 t
DIS
C
L
= 30 pF, V
T
= V
CC
/2 3.2 4.7 ns
ENABLE Time EN to Y2 t
EN
C
L
= 30 pF, V
T
= V
CC
/2 5 7.7 ns
DISABLE Time EN to Y2 t
DIS
C
L
= 30 pF, V
T
= V
CC
/2 4.8 7.2 ns
V
CC
= V
CC1
= V
CC2
= 1.8 V
±
0.15 V
Propagation Delay, t
PD
A1 to Y1 Normal Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 6.7 10 ns
A2 to Y2 Normal Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 6.5 10 ns
A1 to Y2 Bypass Mode t
PHL
, t
PLH
C
L
= 30 pF, V
T
= V
CC
/2 6.5 10.25 ns
ENABLE Time EN to Y1 t
EN
C
L
= 30 pF, V
T
= V
CC
/2 7 10.5 ns
DISABLE Time EN to Y1 t
DIS
C
L
= 30 pF, V
T
= V
CC
/2 4.4 6.5 ns
ENABLE Time EN to Y2 t
EN
C
L
= 30 pF, V
T
= V
CC
/2 7 12 ns
DISABLE Time EN to Y2 t
DIS
C
L
= 30 pF, V
T
= V
CC
/2 6.5 10.5 ns
(VCC1 = VCC2 = 1.65 V to 3.6 V, GND = 0 V, All specifications TMIN to TMAX, unless
otherwise noted.)
REV. 0
ADG3233
–3–
Parameter Symbol Conditions Min Typ
2
Max Unit
SWITCHING CHARACTERISTICS
4, 5
(continued)
Input Leakage Current I
I
0 V
IN
3.6 V ±1µA
Output Leakage Current I
O
0 V
IN
3.6 V ±1µA
POWER REQUIREMENTS
Power Supply Voltages V
CC1
1.65 3.6 V
V
CC2
1.65 3.6 V
Quiescent Power Supply Current I
CC1
Digital Inputs = 0 V or V
CC
2µA
I
CC2
Digital Inputs = 0 V or V
CC
2µA
Increase in I
CC
per Input I
CC1
V
CC
= 3.6 V, One Input at 3.0 V;
Others at V
CC
or GND 0.75 µA
NOTES
1
Temperature range is as follows: B Version: 40°C to +85°C.
2
All typical values are at V
CC
= V
CC1
= V
CC2
, T
A
= 25°C, unless otherwise stated.
3
V
IL
and V
IH
levels are specified with respect to V
CC1
, V
OH
and V
OL
levels for Y1 are specified with respect to V
CC1
, and V
OH
and V
OL
levels are specified for Y2 with
respect to V
CC2
.
4
Guaranteed by design, not subject to production test.
5
See Test Circuits and Waveforms.
Specifications subject to change without notice.
REV. 0–4–
ADG3233
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C, unless otherwise noted.)
V
CC
to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Digital Inputs
to GND . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
A1, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
A2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
CC1
+ 0.3V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
8-Lead MSOP
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 43°C/W
8-Lead SOT-23
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 211°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C
*
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.
PIN CONFIGURATIONS
8-Lead SOT-23 Package (RJ-8)
ADG3233
TOP VIEW
(Not to Scale)
VCC1 1
A1 2
A2 3
EN 4
VCC2
Y1
Y2
GND
8
7
6
5
8-Lead MSOP Package (RM-8)
ADG3233
TOP VIEW
(Not to Scale)
VCC2 1
Y1 2
Y2 3
GND 4
VCC1
A1
A2
EN
8
7
6
5
PIN FUNCTION DESCRIPTIONS
Pin
RJ-8 RM-8 Mnemonic Description
18 V
CC1
Supply Voltage 1, can be any supply voltage from 1.65 V to 3.6 V.
81 V
CC2
Supply Voltage 2, can be any supply voltage from 1.65 V to 3.6 V.
27 A1 Input Referred to V
CC1
.
36 A2 Input Referred to V
CC2
.
72 Y1 Output Referred to V
CC1
.
63 Y2 Output Referred to V
CC2
. Voltage levels appearing at Y2 will be translated from V
CC1
voltage level to a
V
CC2
voltage level.
45 EN Active Low Device Enable. When low, bypass mode is enabled; when high, the device is in normal mode.
54 GND Device Ground.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG3233 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Model Temperature Range Package Description Branding Package Option
ADG3233BRJ-REEL –40°C to +85°CSOT-23 W1B RJ-8
ADG3233BRJ-REEL7 –40°C to +85°CSOT-23 W1B RJ-8
ADG3233BRM 40°C to +85°CMSOP W1B RM-8
ADG3233BRM-REEL –40°C to +85°CMSOP W1B RM-8
ADG3233BRM-REEL7 –40°C to +85°CMSOP W1B RM-8
REV. 0
Typical Performance Characteristics–ADG3233
–5–
VCC1 – V
ICC1 – nA
5.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
1.5 2.0 3.02.5 3.5 4.0
VCC2 = 3.3V
TA = 25C
VCC2 = 2.5V
VCC2 = 1.8V
TPC 1. I
CC1
vs. V
CC1
TEMPERATURE – C
ICC2 – nA
30
–5
5
0
10
15
20
25
08070605040302010
VCC1 = 3.3V
TA = 25C
VCC2 = 2.5V
VCC2 = 3.3V
VCC2 = 1.8V
TPC 4. I
CC2
vs. Temperature
FREQUENCY – Hz
I
CC2
A
0
10k 100k 1M
200
400
600
800
1000
1200
1400
1600
1800
2000
10M 100M
T
A =
25C
V
CC1 =
V
CC2
= 3.3V
V
CC1 =
V
CC2
= 1.8V
TPC 7. I
CC2
vs. Frequency,
Normal Mode
TEMPERATURE – C
I
CC1
– nA
30
0
5
10
15
20
25
08070605040302010
V
CC1
= 2.5V
V
CC1
= 3.3V
V
CC1
= 1.8V
V
CC2
= 3.3V
T
A
= 25C
TPC 3. I
CC1
vs. Temperature
FREQUENCY – Hz
I
CC1
A
0
10k 100k 1M
10
20
30
40
50
60
70
80
10M 100M
T
A =
25C
V
CC1 =
V
CC2
= 1.8V
V
CC1 =
V
CC2
= 3.3V
TPC 6. I
CC1
vs. Frequency,
Bypass Mode
SUPPLY – V
TIME – ns
4
6
8
10
0
2
1.5 2.0 3.02.5 3.5 4.0
t
EN
t
DIS
TA = 25C
VCC1 = VCC2
TPC 9. Y1 Enable, Disable Time
vs. Supply
V
CC2
– V
I
CC2
– nA
5.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
1.5 2.0 3.02.5 3.5 4.0
T
A
= 25C
V
CC1
= 2.5V
V
CC1
= 3.3V
V
CC1
= 1.8V
TPC 2. I
CC2
vs. V
CC2
FREQUENCY – Hz
I
CC1
A
0
10k 100k 1M
200
400
600
800
1000
1200
1400
1600
1800
2000
10M 100M
T
A =
25C
V
CC1 =
V
CC2
= 1.8V
V
CC1 =
V
CC2
= 3.3V
TPC 5. I
CC1
vs. Frequency,
Normal Mode
FREQUENCY – Hz
I
CC2
A
0
10k 100k 1M
200
400
600
800
1000
1200
1400
1600
1800
2000
10M 100M
T
A =
25C
V
CC1 =
V
CC2
= 3.3V
V
CC1 =
V
CC2
= 1.8V
TPC 8. I
CC2
vs. Frequency,
Bypass Mode
REV. 0–6–
ADG3233
TEMPERATURE – C
TIME – ns
3
4
5
6
0
2
1
–40 –20 200408060
tEN
tDIS
VCC1 = VCC2 = 3.3V
TPC 11. Y1 Enable, Disable
Time vs. Temperature
CAPACITIVE LOAD – pF
RISE/FALL TIME – ns
16
2
4
6
8
10
12
14
0
22 10292827262524232
t
PLH, LOW-TO-HIGH TRANSITION
t
PHL, HIGH-TO-LOW TRANSITION
VCC1 = 3.3V
VCC2 = 1.8V
TA = 25C
DATA RATE 10Mbps
TPC 14. Rise/Fall Time vs. Capacitive
Load, A1–Y2, Bypass Mode
CAPACITIVE LOAD – pF
PROPAGATION DELAY – ns
1
2
3
4
5
6
7
8
0
22 10292827262524232
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
VCC1 = 3.3V
VCC2 = 3.3V
TA = 25C
DATA RATE 10Mbps
TPC 17. Propagation Delay
vs. Capacitive Load A1 to Y1
SUPPLY – V
TIME – ns
4
6
8
10
0
2
1.5 2.0 3.02.5 3.5 4.0
t
EN
t
DIS
TA = 25C
VCC1 = VCC2
TPC 10. Y2 Enable, Disable
Time vs. Supply
CAPACITIVE LOAD – pF
RISE/FALL TIME – ns
16
2
4
6
8
10
12
14
0
22 10292827262524232
tPHL
, HIGH-TO-LOW TRANSITION
V
CC1
= 3.3V
V
CC2
= 1.8V
T
A
= 25C
DATA RATE 10Mbps
tPLH
, LOW-TO-HIGH TRANSITION
TPC 13. Rise/Fall Time vs.
Capacitive Load, A1–Y1, A2–Y2
CAPACITIVE LOAD – pF
RISE/FALL TIME – ns
1
2
3
4
5
6
7
8
9
10
0
22 10292827262524232
t
LH
, LOW-TO-HIGH TRANSITION
t
HL
, HIGH-TO-LOW TRANSITION
V
CC1
= 1.8V
V
CC2
= 3.3V
T
A
= 25C
DATA RATE 10Mbps
TPC 16. Rise/Fall Time vs. Capacitive
Load, A1–Y2, Bypass Mode
TEMPERATURE – C
TIME – ns
3
4
5
6
0
2
1
–40 –20 200408060
tEN
tDIS
VCC1 = VCC2 = 3.3V
TPC 12. Y2 Enable, Disable
Time vs. Temperature
CAPACITIVE LOAD – pF
RISE/FALL TIME – ns
1
2
3
4
5
6
7
8
9
10
0
22 10292827262524232
t
PHL
, HIGH-TO-LOW TRANSITION
V
CC1
= 1.8V
V
CC2
= 3.3V
T
A
= 25C
DATA RATE 10Mbps
t
PLH
, LOW-TO-HIGH TRANSITION
TPC 15. Rise/Fall Time vs. Capacitive
Load, A1–Y1, A2–Y2
CAPACITIVE LOAD – pF
PROPAGATION DELAY – ns
1
2
3
4
5
6
7
8
0
22 10292827262524232
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
VCC1 = 3.3V
VCC2 = 3.3V
TA = 25C
DATA RATE 10Mbps
TPC 18. Propagation Delay
vs. Capacitive Load A2 to Y2
REV. 0
ADG3233
–7–
CAPACITIVE LOAD – pF
PROPAGATION DELAY – ns
1
2
3
4
5
6
7
8
0
22 10292827262524232
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HIGH-TO-LOW TRANSITION
VCC1 = 3.3V
VCC2 = 3.3V
TA = 25C
DATA RATE 10Mbps
TPC 19. Propagation Delay vs.
Capacitive Load A1 to Y2, Bypass Mode
TEMPERATURE – C
PROPAGATION DELAY – ns
2.5
3.0
3.5
4.0
0
0.5
1.0
1.5
2.0
806040200–20–40
tPLH
, A2–Y2
tPHL
, A2–Y2
tPHL
, A1–Y1
tPLH
, A1–Y1
T
A
= 25C
V
CC1
= V
CC2
= 3.3V
TPC 22. Propagation Delay
vs. Temperature, Normal Mode
3
T
A
= 25C
DATA RATE = 10MHz
Y2 1.8V
3.3V
A1
2
TPC 25. Bypass Mode, V
CC1
= 3.3 V,
V
CC2
= 1.8 V
SUPPLY – V
PROPAGATION DELAY – ns
5.0
6.0
7.0
8.0
0
1.0
2.0
3.0
4.0
1.5 2.0 3.02.5 3.5 4.0
TA = 25C
VCC1 = VCC2
t
PLH, A1–Y1
t
PHL, A2–Y2
t
PHL, A1–Y1
t
PLH, A2–Y2
TPC 20. Propagation Delay
vs. Supply, Normal Mode
TEMPERATURE – C
PROPAGATION DELAY – ns
3.0
4.0
0
1.0
2.0
806040200–20–40
TA = 25C
VCC1 = VCC2 = 3.3V
t
PHL, A1–Y2
t
PLH, A1–Y2
TPC 23. Propagation Delay vs.
Temperature, Bypass Mode
4
2
1
3
TA = 25C
DATA RATE = 10MHz
Y2
A2
Y1
1.8V
1.8V
3.3V
3.3V
A1
TPC 26. Normal Mode V
CC1
= 1.8 V,
V
CC2
= 3.3 V
SUPPLY – V
PROPAGATION DELAY – ns
6.0
8.0
0
2.0
4.0
1.5 2.0 3.02.5 3.5 4.0
TA = 25C
VCC1 = VCC2
tPLH , A1–Y2
tPHL, A1–Y2
TPC 21. Propagation Delay
vs. Supply, Bypass Mode
2
4
1
3
TA = 25C
EN = HIGH
Y2
A2
Y1
1.8V
3.3V
3.3V
A1
DATA RATE = 10MHz
TPC 24. Normal Mode V
CC1
= 3.3 V,
V
CC2
= 1.8 V
2
3
TA = 25C
DATA RATE = 10MHz
Y1
Y2
1.8V
1.8V
3.3V
A1
1
TPC 27. Bypass Mode, V
CC1
= 1.8 V,
V
CC2
= 3.3 V
REV. 0–8–
ADG3233
CURRENT – mA
VOLTAGE – V
3.5
0.5
1
1.5
2
2.5
3
0
02015105
SINK
T
A
= 25C
V
CC =
V
CC1
= V
CC2
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= 1.8V
V
CC
= 1.8V V
CC
= 2.5V
V
CC
= 3.3V
SOURCE
TPC 28. Y1 and Y2 Source and Sink Current
INPUT
V
OL
V
T
V
OH
0V
V
T
V
CC1
tPHL
OUTPUT
tPLH
Figure 1. Propagation Delay
EN
tEN
Y1 (A1 @ GND) V
T
0V
V
OL
V
OH
V
CC1
V
T
V
T
tDIS
Figure 2. Y1 Enable and Disable Times
E
N
Y
2
tDIS
VT
0V
VOH
VT
VT
0V
0V
VOL
A1
A2
VCC1
VCC1
VCC1
tEN
Figure 3. Y2 Enable and Disable Times
REV. 0
ADG3233
–9–
DESCRIPTION
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.
A1 and EN Input
The A1 and enable (EN) inputs have V
IL
/V
IH
logic levels so that
the part can accept logic levels of V
OL
/V
OH
from Device 0 or the
controlling device independent of the value of the supply being
used by the controlling device. These inputs (A1,
EN
) are capable
of accepting inputs outside the V
CC1
supply range. For example,
the V
CC1
supply applied to the bypass switch could be 1.8 V
while Device 0 could be operating from a 2.5 V or 3.3 V supply
rail, there are no internal diodes to the supply rails, so the device
can handle inputs above the supply but inside the absolute
maximum ratings.
Normal Operation
Figure 4 shows the bypass switch being used in normal mode.
In this mode, the signal paths are from A1 to Y1 and A2 to Y2.
The device will level translate the signal applied to A1 to a V
CC1
logic level (this level translation can be either to a higher or
lower supply) and route the signal to the Y1 output, which will
have standard V
OL
/V
OH
levels for V
CC1
supplies. The signal is
then passed through Device 1 and back to the A2 input pin of
the bypass switch.
The logic level inputs of A2 are with respect to the V
CC1
supply.
The signal will be level translated from V
CC1
to V
CC2
and routed
to the Y2 output pin of the bypass switch. Y2 output logic levels
are with respect to the V
CC2
supply.
SIGNAL INPUT
V
CC0
DEVICE 0
A1
A2
Y1
Y2
EN
BYPASS SWITCH
SIGNAL OUTPUT
V
CC1
DEVICE 1
V
CC2
DEVICE 2
V
CC1
V
CC2
LOGIC 1
Figure 4. Bypass Switch in Normal Mode
REV. 0–10–
ADG3233
SIGNAL INPUT
V
CC0
DEVICE 0
A1
A2
Y1
Y2
EN
BYPASS SWITCH
SIGNAL OUTPUT
V
CC1
DEVICE 1
V
CC2
DEVICE 2
V
CC1
V
CC2
LOGIC 0
Figure 5. Bypass Switch in Bypass Mode
Bypass Operation
Figure 5 illustrates the device as used in bypass operation.
The signal path is now from A1 directly to Y2, thus bypassing
Device 1 completely. The signal will be level translated to a
V
CC2
logic level and available on Y2, where it may be applied
directly to the input of Device 2. In bypass mode, Y1 is pulled
up to V
CC1
.
The three supplies in Figures 4 and 5 may be any combination
of supplies, i.e., V
CC0
, V
CC1
, and V
CC2
may be any combination
of supplies, for example, 1.8 V, 2.5 V, and 3.3 V.
REV. 0
ADG3233
–11–
OUTLINE DIMENSIONS
8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
0.23
0.08
0.80
0.40
8
0
85
4
1
4.90
BSC
PIN 1
0.65 BSC
3.00
BSC
SEATING
PLANE
0.15
0.00
0.38
0.22
1.10 MAX
3.00
BSC
COMPLIANT TO JEDEC STANDARDS MO-187AA
COPLANARITY
0.10
8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
1 3
5 6
2
8
4
7
2.90 BSC
PIN 1
1.60 BSC
1.95
BSC
0.65 BSC
0.38
0.22
0.15 MAX
1.30
1.15
0.90
SEATING
PLANE
1.45 MAX 0.22
0.08 0.60
0.45
0.30
8
4
0
2.80 BSC
COMPLIANT TO JEDEC STANDARDS MO-178BA
C03297–0–5/03(0)
–12–